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You forgot the G43.

T1 M6 loads tool 1, but you need a G43 to apply the tool offsets.

Modes may change/replace pins, (they just dont happen to on the 7I76 but do on the 7i69, 7I73 and others)

The reason that you do not just always have the maximum amount of data (like mode 2 on the 7I76)
is that it may be too much data for a given servo thread period, that is if you need a fast servo thread you may need to reduce unwanted data transfers (for example mode 2 takes an average of 24 uSec longer than mode 0 as it means the 7I76 echos 48 more bits)

We dont want to unnecessarily limit thread rates if we dont have to, especially with data that may not be used.

If there is no disadvantage to mode 2 then yes.
I see mode ADDS not replaces.
Why is there a mode 2 then?

Forum does not let me attach a .py file, so I renamed it as .txt. You need to rename it back as a .py

I also had to resize the image file.

cmorley wrote:

I will just hard code the pin names for mode 0.

Does it make more sense to hard-code the pins for mode 2?

I'm learning some python and I needed a quick hack to get a visual map on hal nets, so I made this little python script that reads input from "halcmd show" and outputs a graphviz file. Maybe you will find it useful.

You need to:
1) install graphviz, using "sudo apt-get install graphviz"
2) download the hal_sigs_graphviz.py attachment in a directory of your choice.
3) make a shell script inside the same dir, with the following lines in it and run it:
Attached is an example of what I get when running it with my (stepconf generated) hal configuration I use on my first cnc router. Tables are components and circles are nets.

I will probably add more features like colors and some fine tuning on how graphviz outputs the image, when I find some time to learn more about this excellent application. But it's probably good enough for a quick visualization as it is now.

I have got a problem because Emc2 dont want to compensate.

G21
G90
G64 P0.01
G17
G40
G49
G10 L1 T1 R1.17
T1M6
M8
S5000M03
G0 Z 15.000
G0 X 53.077 Y -5.541
G0 Z 3.000
F150
G1 Z -0.500
F400
G41 D1
G1 X 54.247 Y -3.041
G3 X 50.577 Y 0.629 I -3.670 J 0.000
G1 X 0.577 Y 0.629
G1 X 0.577 Y 50.629
G1 X 50.577 Y 50.629
G1 X 50.577 Y 0.629
F150
G1 Z -1.000
F400
G1 X 0.577 Y 0.629
G1 X 0.577 Y 50.629
G1 X 50.577 Y 50.629
G1 X 50.577 Y 0.629
G1 Z 3.000
G0 Z 15.000
G40
G0 X 0.000 Y 0.000
M9
M5
M2

Pliz help me this is a simple square and Emc2 dont want to compensate the tool diameter.

Yes,I think lowercase would be most consistent with hostmot2 pin names, I think.
self discovery of course would be best., but in the mean time I will just hard code the pin names for mode 0.
I'm, not sure what boards are most popular. After i code the framework adding cards should be easier.
As long as the pin names for each mode on the card don't change this will work ok.

cmorley wrote:

Thanks that's perfect. This looks like a 5i25 with one 7i76 connected?

Indeed. I can also tag on a 7i69, 7i70 and 7i71 if you want?

But, really, as the boards now choose their own pin names, I need to work on a way to self-discover for pncconf.

On a related note, Mesa use mixed-case labels, do you think I should lcase them all?

Thanks that's perfect. This looks like a 5i25 with one 7i76 connected?

It's a long list.

Mode 2 adds:
Pins
5 float OUT 12.54921 hm2_5i25.0.7i76.0.0.FieldVoltage

Mode 1 adds:
5 float OUT 0 hm2_5i25.0.7i76.0.0.Analog0
5 float OUT 0 hm2_5i25.0.7i76.0.0.Analog1
5 float OUT 12.52706 hm2_5i25.0.7i76.0.0.Analog2
5 float OUT 0 hm2_5i25.0.7i76.0.0.Analog3

Modes 0, 1, 2 have:

5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-00
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-00-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-01
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-01-not
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-02
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-02-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-03
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-03-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-04
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-04-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-05
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-05-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-06
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-06-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-07
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-07-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-08
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-08-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-09
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-09-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-10
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-10-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-11
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-11-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-12
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-12-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-13
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-13-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-14
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-14-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-15
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-15-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-16
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-16-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-17
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-17-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-18
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-18-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-19
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-19-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-20
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-20-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-21
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-21-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-22
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-22-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-23
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-23-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-24
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-24-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-25
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-25-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-26
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-26-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-27
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-27-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-28
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-28-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-29
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-29-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-30
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-30-not
5 bit OUT FALSE hm2_5i25.0.7i76.0.0.Input-31
5 bit OUT TRUE hm2_5i25.0.7i76.0.0.Input-31-not
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-00
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-01
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-02
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-03
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-04
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-05
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-06
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-07
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-08
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-09
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-10
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-11
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-12
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-13
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-14
5 bit IN FALSE hm2_5i25.0.7i76.0.0.Output-15
5 bit IN FALSE hm2_5i25.0.7i76.0.0.SpinDir
5 bit IN FALSE hm2_5i25.0.7i76.0.0.SpinEna
5 float IN 0 hm2_5i25.0.7i76.0.0.SpinOut
5 s32 OUT 0 hm2_5i25.0.encoder.00.count
5 s32 OUT 0 hm2_5i25.0.encoder.00.count-latched
5 bit I/O FALSE hm2_5i25.0.encoder.00.index-enable
5 bit IN FALSE hm2_5i25.0.encoder.00.latch-enable
5 bit IN FALSE hm2_5i25.0.encoder.00.latch-polarity
5 float OUT 0 hm2_5i25.0.encoder.00.position
5 float OUT 0 hm2_5i25.0.encoder.00.position-latched
5 s32 OUT 0 hm2_5i25.0.encoder.00.rawcounts
5 s32 OUT 0 hm2_5i25.0.encoder.00.rawlatch
5 bit IN FALSE hm2_5i25.0.encoder.00.reset
5 float OUT 0 hm2_5i25.0.encoder.00.velocity
5 s32 OUT 0 hm2_5i25.0.encoder.01.count
5 s32 OUT 0 hm2_5i25.0.encoder.01.count-latched
5 bit I/O FALSE hm2_5i25.0.encoder.01.index-enable
5 bit IN FALSE hm2_5i25.0.encoder.01.latch-enable
5 bit IN FALSE hm2_5i25.0.encoder.01.latch-polarity
5 float OUT 0 hm2_5i25.0.encoder.01.position
5 float OUT 0 hm2_5i25.0.encoder.01.position-latched
5 s32 OUT 0 hm2_5i25.0.encoder.01.rawcounts
5 s32 OUT 0 hm2_5i25.0.encoder.01.rawlatch
5 bit IN FALSE hm2_5i25.0.encoder.01.reset
5 float OUT 0 hm2_5i25.0.encoder.01.velocity
5 bit OUT FALSE hm2_5i25.0.gpio.000.in
5 bit OUT TRUE hm2_5i25.0.gpio.000.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.001.in
5 bit OUT TRUE hm2_5i25.0.gpio.001.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.002.in
5 bit OUT TRUE hm2_5i25.0.gpio.002.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.003.in
5 bit OUT TRUE hm2_5i25.0.gpio.003.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.004.in
5 bit OUT TRUE hm2_5i25.0.gpio.004.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.005.in
5 bit OUT TRUE hm2_5i25.0.gpio.005.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.006.in
5 bit OUT TRUE hm2_5i25.0.gpio.006.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.007.in
5 bit OUT TRUE hm2_5i25.0.gpio.007.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.008.in
5 bit OUT TRUE hm2_5i25.0.gpio.008.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.009.in
5 bit OUT TRUE hm2_5i25.0.gpio.009.in_not
5 bit OUT TRUE hm2_5i25.0.gpio.010.in
5 bit OUT FALSE hm2_5i25.0.gpio.010.in_not
5 bit OUT TRUE hm2_5i25.0.gpio.011.in
5 bit OUT FALSE hm2_5i25.0.gpio.011.in_not
5 bit OUT TRUE hm2_5i25.0.gpio.012.in
5 bit OUT FALSE hm2_5i25.0.gpio.012.in_not
5 bit IN FALSE hm2_5i25.0.gpio.012.out
5 bit OUT TRUE hm2_5i25.0.gpio.013.in
5 bit OUT FALSE hm2_5i25.0.gpio.013.in_not
5 bit IN FALSE hm2_5i25.0.gpio.013.out
5 bit OUT FALSE hm2_5i25.0.gpio.014.in
5 bit OUT TRUE hm2_5i25.0.gpio.014.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.015.in
5 bit OUT TRUE hm2_5i25.0.gpio.015.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.016.in
5 bit OUT TRUE hm2_5i25.0.gpio.016.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.017.in
5 bit OUT TRUE hm2_5i25.0.gpio.017.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.018.in
5 bit OUT TRUE hm2_5i25.0.gpio.018.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.019.in
5 bit OUT TRUE hm2_5i25.0.gpio.019.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.020.in
5 bit OUT TRUE hm2_5i25.0.gpio.020.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.021.in
5 bit OUT TRUE hm2_5i25.0.gpio.021.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.022.in
5 bit OUT TRUE hm2_5i25.0.gpio.022.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.023.in
5 bit OUT TRUE hm2_5i25.0.gpio.023.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.024.in
5 bit OUT TRUE hm2_5i25.0.gpio.024.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.025.in
5 bit OUT TRUE hm2_5i25.0.gpio.025.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.026.in
5 bit OUT TRUE hm2_5i25.0.gpio.026.in_not
5 bit OUT TRUE hm2_5i25.0.gpio.027.in
5 bit OUT FALSE hm2_5i25.0.gpio.027.in_not
5 bit IN FALSE hm2_5i25.0.gpio.027.out
5 bit OUT TRUE hm2_5i25.0.gpio.028.in
5 bit OUT FALSE hm2_5i25.0.gpio.028.in_not
5 bit IN FALSE hm2_5i25.0.gpio.028.out
5 bit OUT TRUE hm2_5i25.0.gpio.029.in
5 bit OUT FALSE hm2_5i25.0.gpio.029.in_not
5 bit IN FALSE hm2_5i25.0.gpio.029.out
5 bit OUT TRUE hm2_5i25.0.gpio.030.in
5 bit OUT FALSE hm2_5i25.0.gpio.030.in_not
5 bit IN FALSE hm2_5i25.0.gpio.030.out
5 bit OUT TRUE hm2_5i25.0.gpio.031.in
5 bit OUT FALSE hm2_5i25.0.gpio.031.in_not
5 bit OUT TRUE hm2_5i25.0.gpio.032.in
5 bit OUT FALSE hm2_5i25.0.gpio.032.in_not
5 bit OUT TRUE hm2_5i25.0.gpio.033.in
5 bit OUT FALSE hm2_5i25.0.gpio.033.in_not
5 bit IN FALSE hm2_5i25.0.led.CR01
5 bit IN FALSE hm2_5i25.0.led.CR02
5 u32 IN 0x00000000 hm2_5i25.0.sserial.channel
5 u32 IN 0x00000000 hm2_5i25.0.sserial.parameter
5 u32 IN 0x00000000 hm2_5i25.0.sserial.port
5 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.fault-count
5 u32 OUT 0x00000001 hm2_5i25.0.sserial.port-0.port_state
5 bit IN TRUE hm2_5i25.0.sserial.port-0.run
5 bit IN FALSE hm2_5i25.0.sserial.read
5 u32 OUT 0x00000000 hm2_5i25.0.sserial.state
5 u32 IN 0x00000000 hm2_5i25.0.sserial.value
5 bit IN FALSE hm2_5i25.0.sserial.write
5 bit IN FALSE hm2_5i25.0.stepgen.00.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.00.counts
5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.00.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.00.enable
5 float IN 0 hm2_5i25.0.stepgen.00.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.00.position-fb
5 float IN 0 hm2_5i25.0.stepgen.00.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.00.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.01.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.01.counts
5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.01.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.01.enable
5 float IN 0 hm2_5i25.0.stepgen.01.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.01.position-fb
5 float IN 0 hm2_5i25.0.stepgen.01.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.01.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.02.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.02.counts
5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.02.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.02.enable
5 float IN 0 hm2_5i25.0.stepgen.02.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.02.position-fb
5 float IN 0 hm2_5i25.0.stepgen.02.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.02.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.03.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.03.counts
5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.03.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.03.enable
5 float IN 0 hm2_5i25.0.stepgen.03.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.03.position-fb
5 float IN 0 hm2_5i25.0.stepgen.03.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.03.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.04.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.04.counts
5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.04.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.04.enable
5 float IN 0 hm2_5i25.0.stepgen.04.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.04.position-fb
5 float IN 0 hm2_5i25.0.stepgen.04.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.04.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.05.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.05.counts
5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.05.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.05.enable
5 float IN 0 hm2_5i25.0.stepgen.05.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.05.position-fb
5 float IN 0 hm2_5i25.0.stepgen.05.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.05.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.06.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.06.counts
5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.06.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.06.enable
5 float IN 0 hm2_5i25.0.stepgen.06.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.06.position-fb
5 float IN 0 hm2_5i25.0.stepgen.06.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.06.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.07.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.07.counts
5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.07.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.07.enable
5 float IN 0 hm2_5i25.0.stepgen.07.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.07.position-fb
5 float IN 0 hm2_5i25.0.stepgen.07.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.07.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.08.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.08.counts
5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.08.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.08.enable
5 float IN 0 hm2_5i25.0.stepgen.08.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.08.position-fb
5 float IN 0 hm2_5i25.0.stepgen.08.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.08.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.09.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.09.counts
5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.09.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.09.enable
5 float IN 0 hm2_5i25.0.stepgen.09.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.09.position-fb
5 float IN 0 hm2_5i25.0.stepgen.09.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.09.velocity-fb
5 bit I/O FALSE hm2_5i25.0.watchdog.has_bit

halcmd: show param
Parameters:
Owner Type Dir Value Name
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-00-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-01-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-02-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-03-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-04-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-05-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-06-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-07-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-08-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-09-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-10-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-11-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-12-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-13-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-14-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.Output-15-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.SpinDir-invert
5 bit RW FALSE hm2_5i25.0.7i76.0.0.SpinEna-invert
5 float RW 100 hm2_5i25.0.7i76.0.0.SpinOut-maxlim
5 float RW 0 hm2_5i25.0.7i76.0.0.SpinOut-minlim
5 float RW 100 hm2_5i25.0.7i76.0.0.SpinOut-scalemax
5 u32 RO 0x10000000 hm2_5i25.0.7i76.0.0.serial-number
5 u32 RO 0x00420000 hm2_5i25.0.7i76.0.0.status
5 bit RW FALSE hm2_5i25.0.encoder.00.counter-mode
5 bit RW TRUE hm2_5i25.0.encoder.00.filter
5 bit RW FALSE hm2_5i25.0.encoder.00.index-invert
5 bit RW FALSE hm2_5i25.0.encoder.00.index-mask
5 bit RW FALSE hm2_5i25.0.encoder.00.index-mask-invert
5 float RW 1 hm2_5i25.0.encoder.00.scale
5 float RW 0.5 hm2_5i25.0.encoder.00.vel-timeout
5 bit RW FALSE hm2_5i25.0.encoder.01.counter-mode
5 bit RW TRUE hm2_5i25.0.encoder.01.filter
5 bit RW FALSE hm2_5i25.0.encoder.01.index-invert
5 bit RW FALSE hm2_5i25.0.encoder.01.index-mask
5 bit RW FALSE hm2_5i25.0.encoder.01.index-mask-invert
5 float RW 1 hm2_5i25.0.encoder.01.scale
5 float RW 0.5 hm2_5i25.0.encoder.01.vel-timeout
5 bit RW FALSE hm2_5i25.0.gpio.000.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.000.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.001.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.001.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.002.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.002.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.003.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.003.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.004.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.004.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.005.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.005.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.006.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.006.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.007.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.007.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.008.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.008.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.009.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.009.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.010.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.010.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.012.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.012.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.012.is_output
5 bit RW FALSE hm2_5i25.0.gpio.013.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.013.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.013.is_output
5 bit RW FALSE hm2_5i25.0.gpio.017.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.017.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.018.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.018.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.019.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.019.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.020.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.020.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.021.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.021.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.022.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.022.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.023.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.023.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.024.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.024.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.025.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.025.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.026.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.026.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.027.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.027.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.027.is_output
5 bit RW FALSE hm2_5i25.0.gpio.028.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.028.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.028.is_output
5 bit RW FALSE hm2_5i25.0.gpio.029.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.029.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.029.is_output
5 bit RW FALSE hm2_5i25.0.gpio.030.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.030.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.030.is_output
5 bit RW FALSE hm2_5i25.0.io_error
5 s32 RO 2090 hm2_5i25.0.pet_watchdog.time
5 s32 RW 5120 hm2_5i25.0.pet_watchdog.tmax
5 s32 RO 36310 hm2_5i25.0.read.time
5 s32 RW 64090 hm2_5i25.0.read.tmax
5 s32 RO 0 hm2_5i25.0.read_gpio.time
5 s32 RW 0 hm2_5i25.0.read_gpio.tmax
5 u32 RW 0x00000001 hm2_5i25.0.sserial.port-0.fault-dec
5 u32 RW 0x0000000A hm2_5i25.0.sserial.port-0.fault-inc
5 u32 RW 0x000000C8 hm2_5i25.0.sserial.port-0.fault-lim
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.00.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.00.maxvel
5 float RW 1 hm2_5i25.0.stepgen.00.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.01.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.01.maxvel
5 float RW 1 hm2_5i25.0.stepgen.01.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.02.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.02.maxvel
5 float RW 1 hm2_5i25.0.stepgen.02.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.03.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.03.maxvel
5 float RW 1 hm2_5i25.0.stepgen.03.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.04.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.04.maxvel
5 float RW 1 hm2_5i25.0.stepgen.04.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.05.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.05.maxvel
5 float RW 1 hm2_5i25.0.stepgen.05.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.06.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.06.maxvel
5 float RW 1 hm2_5i25.0.stepgen.06.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.07.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.07.maxvel
5 float RW 1 hm2_5i25.0.stepgen.07.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.08.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.08.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.08.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.08.maxvel
5 float RW 1 hm2_5i25.0.stepgen.08.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.08.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.08.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.08.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.09.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.09.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.09.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.09.maxvel
5 float RW 1 hm2_5i25.0.stepgen.09.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.09.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.09.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.09.stepspace
5 u32 RW 0x3B9ACA00 hm2_5i25.0.watchdog.timeout_ns
5 s32 RO 22290 hm2_5i25.0.write.time
5 s32 RW 30920 hm2_5i25.0.write.tmax
5 s32 RO 0 hm2_5i25.0.write_gpio.time
5 s32 RW 0 hm2_5i25.0.write_gpio.tmax

cmorley wrote:

If possible could you show separately the pinouts when using different modes?

I can do that this evening.

cmorley wrote:

John can you post the complete HAL pin list with the 7i76 connected? or do you have two connected?

I can do that this afternoon. Unfortunately only mode 0 is working at this time.

John

pncconf should be able to config the steppers and encoder now but not the spindle or I/O yet (till I see the pinouts)

If possible could you show separately the pinouts when using different modes?