7i76e all P1 pins are 5v high (except 18 ~25 which are 0v common as expected)

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6 years 1 month ago #180609 by jhandel
At first I thought I had a bad 5axis BOB because no inputs or outputs seem to do anything so I hooked up a little test bench and validated every pin, and each one worked...

Now I am testing P1, which is the port I am hooking the BOB up to (W7 is low, so all grounds no power). And darned if every single pin is showing 5v. Even when I turn on LinuxCNC and use setp hm2_7i76e.0.gpio.XXX.out TRUE (or false) the port always shows 5v.. No sign change, nothing..

Also (maybe related or not).. all of the pins show continuity with 0v/common from the power supply.

P2 works fine as it is connected to a 7i89.

here is the relevant part of the readhmid if that helps... I hope this port isn't DOA that would be super sad :-(..
Code:
IO Connections for P1 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 17 IOPort None 14 18 IOPort None 2 19 IOPort None 15 20 IOPort None 3 21 IOPort None 16 22 IOPort StepGen 5 Step/Table1 (Out) 4 23 IOPort None 17 24 IOPort StepGen 5 Dir/Table2 (Out) 5 25 IOPort None 6 26 IOPort None 7 27 IOPort None 8 28 IOPort None 9 29 IOPort None 10 30 IOPort None 11 31 IOPort None 12 32 IOPort None 13 33 IOPort None IO Connections for P2 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 34 IOPort MuxedQCount 0 MuxQ-A (In) 14 35 IOPort MuxedQCount 0 MuxQ-B (In) 2 36 IOPort MuxedQCount 0 MuxQ-IDX (In) 15 37 IOPort MuxedQCount 1 MuxQ-A (In) 3 38 IOPort MuxedQCount 1 MuxQ-B (In) 16 39 IOPort MuxedQCount 1 MuxQ-IDX (In) 4 40 IOPort MuxedQCount 2 MuxQ-A (In) 17 41 IOPort MuxedQCount 2 MuxQ-B (In) 5 42 IOPort MuxedQCount 2 MuxQ-IDX (In) 6 43 IOPort MuxedQCount 3 MuxQ-A (In) 7 44 IOPort MuxedQCount 3 MuxQ-B (In) 8 45 IOPort MuxedQCount 3 MuxQ-IDX (In) 9 46 IOPort MuxedQCountSel 0 MuxSel0 (Out) 10 47 IOPort None 11 48 IOPort SSerial 0 RXData3 (In) 12 49 IOPort SSerial 0 TXData3 (Out) 13 50 IOPort SSerial 0 TXEn3 (Out)

Thanks in advance for any suggestions

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6 years 1 month ago #180610 by PCW
All pins are expected to be at 5V at startup unless its configured for a specific daughter-board and output functions are enabled in hal

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6 years 1 month ago #180614 by jhandel
I kind of thought I had wired up the output in the HAL with this
Code:
# --- COOLANT-MIST --- setp hm2_7i76e.0.gpio.025.is_output true net coolant-mist => hm2_7i76e.0.gpio.017.out

however the voltage does not change on any pin (much less Pin 1 which is the one I espect a change on) when I turn the coolent mist off or on OR if I do a "setp hm2_7i76e.0.gpio.017.out [TRUE|FALSE]"

here is the whole HAL that came from pncconf and loads.. encoders work from the 7i89 (well with varering degrees of work given my X is bad from its controller) and servos move...
Code:
# Generated by PNCconf at Thu Sep 3 17:54:38 2020 # Using LinuxCNC version: UNAVAILABLE # If you make changes to this file, they will be # overwritten when you run PNCconf again loadrt [KINS]KINEMATICS loadrt [EMCMOT]EMCMOT servo_period_nsec=[EMCMOT]SERVO_PERIOD num_joints=[KINS]JOINTS loadrt hostmot2 loadrt hm2_eth board_ip="10.10.10.10" config="num_encoders=10 num_pwmgens=0 num_stepgens=6 sserial_port_0=0000xx" setp hm2_7i76e.0.watchdog.timeout_ns 5000000 loadrt pid names=pid.x,pid.y,pid.z,pid.s loadrt abs names=abs.spindle loadrt lowpass names=lowpass.spindle loadrt scale names=scale.spindle loadrt charge_pump addf charge-pump servo-thread addf hm2_7i76e.0.read servo-thread addf motion-command-handler servo-thread addf motion-controller servo-thread addf pid.x.do-pid-calcs servo-thread addf pid.y.do-pid-calcs servo-thread addf pid.z.do-pid-calcs servo-thread addf pid.s.do-pid-calcs servo-thread addf scale.spindle servo-thread addf abs.spindle servo-thread addf lowpass.spindle servo-thread addf hm2_7i76e.0.write servo-thread # external output signals # --- COOLANT-MIST --- setp hm2_7i76e.0.gpio.025.is_output true net coolant-mist => hm2_7i76e.0.gpio.017.out #******************* # AXIS X JOINT 0 #******************* setp pid.x.Pgain [JOINT_0]P setp pid.x.Igain [JOINT_0]I setp pid.x.Dgain [JOINT_0]D setp pid.x.bias [JOINT_0]BIAS setp pid.x.FF0 [JOINT_0]FF0 setp pid.x.FF1 [JOINT_0]FF1 setp pid.x.FF2 [JOINT_0]FF2 setp pid.x.deadband [JOINT_0]DEADBAND setp pid.x.maxoutput [JOINT_0]MAX_OUTPUT setp pid.x.error-previous-target true setp pid.x.maxerror .0005 net x-index-enable <=> pid.x.index-enable net x-enable => pid.x.enable net x-pos-cmd => pid.x.command net x-pos-fb => pid.x.feedback net x-output <= pid.x.output # Step Gen signals/setup setp hm2_7i76e.0.stepgen.00.dirsetup [JOINT_0]DIRSETUP setp hm2_7i76e.0.stepgen.00.dirhold [JOINT_0]DIRHOLD setp hm2_7i76e.0.stepgen.00.steplen [JOINT_0]STEPLEN setp hm2_7i76e.0.stepgen.00.stepspace [JOINT_0]STEPSPACE setp hm2_7i76e.0.stepgen.00.position-scale [JOINT_0]STEP_SCALE setp hm2_7i76e.0.stepgen.00.step_type 0 setp hm2_7i76e.0.stepgen.00.control-type 1 setp hm2_7i76e.0.stepgen.00.maxaccel [JOINT_0]STEPGEN_MAXACCEL setp hm2_7i76e.0.stepgen.00.maxvel [JOINT_0]STEPGEN_MAXVEL # ---closedloop stepper signals--- net x-pos-cmd <= joint.0.motor-pos-cmd net x-vel-cmd <= joint.0.vel-cmd net x-output <= hm2_7i76e.0.stepgen.00.velocity-cmd net x-pos-fb <= hm2_7i76e.0.stepgen.00.position-fb net x-pos-fb => joint.0.motor-pos-fb net x-enable <= joint.0.amp-enable-out net x-enable => hm2_7i76e.0.stepgen.00.enable # ---setup home / limit switch signals--- net home-x => joint.0.home-sw-in net x-neg-limit => joint.0.neg-lim-sw-in net x-pos-limit => joint.0.pos-lim-sw-in # ---Encoder feedback signals/setup--- net x-index-enable joint.0.index-enable <=> hm2_7i76e.0.encoder.00.index-enable #******************* # AXIS Y JOINT 1 #******************* setp pid.y.Pgain [JOINT_1]P setp pid.y.Igain [JOINT_1]I setp pid.y.Dgain [JOINT_1]D setp pid.y.bias [JOINT_1]BIAS setp pid.y.FF0 [JOINT_1]FF0 setp pid.y.FF1 [JOINT_1]FF1 setp pid.y.FF2 [JOINT_1]FF2 setp pid.y.deadband [JOINT_1]DEADBAND setp pid.y.maxoutput [JOINT_1]MAX_OUTPUT setp pid.y.error-previous-target true setp pid.y.maxerror .0005 net y-index-enable <=> pid.y.index-enable net y-enable => pid.y.enable net y-pos-cmd => pid.y.command net y-pos-fb => pid.y.feedback net y-output <= pid.y.output # Step Gen signals/setup setp hm2_7i76e.0.stepgen.01.dirsetup [JOINT_1]DIRSETUP setp hm2_7i76e.0.stepgen.01.dirhold [JOINT_1]DIRHOLD setp hm2_7i76e.0.stepgen.01.steplen [JOINT_1]STEPLEN setp hm2_7i76e.0.stepgen.01.stepspace [JOINT_1]STEPSPACE setp hm2_7i76e.0.stepgen.01.position-scale [JOINT_1]STEP_SCALE setp hm2_7i76e.0.stepgen.01.step_type 0 setp hm2_7i76e.0.stepgen.01.control-type 1 setp hm2_7i76e.0.stepgen.01.maxaccel [JOINT_1]STEPGEN_MAXACCEL setp hm2_7i76e.0.stepgen.01.maxvel [JOINT_1]STEPGEN_MAXVEL # ---closedloop stepper signals--- net y-pos-cmd <= joint.1.motor-pos-cmd net y-vel-cmd <= joint.1.vel-cmd net y-output <= hm2_7i76e.0.stepgen.01.velocity-cmd net y-pos-fb <= hm2_7i76e.0.stepgen.01.position-fb net y-pos-fb => joint.1.motor-pos-fb net y-enable <= joint.1.amp-enable-out net y-enable => hm2_7i76e.0.stepgen.01.enable # ---Encoder feedback signals/setup--- setp hm2_7i76e.0.encoder.01.counter-mode 0 setp hm2_7i76e.0.encoder.01.filter 1 setp hm2_7i76e.0.encoder.01.index-invert 0 setp hm2_7i76e.0.encoder.01.index-mask 0 setp hm2_7i76e.0.encoder.01.index-mask-invert 0 setp hm2_7i76e.0.encoder.01.scale [JOINT_1]ENCODER_SCALE net y-index-enable joint.1.index-enable <=> hm2_7i76e.0.encoder.01.index-enable # ---setup home / limit switch signals--- net y-home-sw => joint.1.home-sw-in net y-neg-limit => joint.1.neg-lim-sw-in net y-pos-limit => joint.1.pos-lim-sw-in #******************* # AXIS Z JOINT 2 #******************* setp pid.z.Pgain [JOINT_2]P setp pid.z.Igain [JOINT_2]I setp pid.z.Dgain [JOINT_2]D setp pid.z.bias [JOINT_2]BIAS setp pid.z.FF0 [JOINT_2]FF0 setp pid.z.FF1 [JOINT_2]FF1 setp pid.z.FF2 [JOINT_2]FF2 setp pid.z.deadband [JOINT_2]DEADBAND setp pid.z.maxoutput [JOINT_2]MAX_OUTPUT setp pid.z.error-previous-target true setp pid.z.maxerror .0005 net z-index-enable <=> pid.z.index-enable net z-enable => pid.z.enable net z-pos-cmd => pid.z.command net z-pos-fb => pid.z.feedback net z-output <= pid.z.output # Step Gen signals/setup setp hm2_7i76e.0.stepgen.02.dirsetup [JOINT_2]DIRSETUP setp hm2_7i76e.0.stepgen.02.dirhold [JOINT_2]DIRHOLD setp hm2_7i76e.0.stepgen.02.steplen [JOINT_2]STEPLEN setp hm2_7i76e.0.stepgen.02.stepspace [JOINT_2]STEPSPACE setp hm2_7i76e.0.stepgen.02.position-scale [JOINT_2]STEP_SCALE setp hm2_7i76e.0.stepgen.02.step_type 0 setp hm2_7i76e.0.stepgen.02.control-type 1 setp hm2_7i76e.0.stepgen.02.maxaccel [JOINT_2]STEPGEN_MAXACCEL setp hm2_7i76e.0.stepgen.02.maxvel [JOINT_2]STEPGEN_MAXVEL # ---closedloop stepper signals--- net z-pos-cmd <= joint.2.motor-pos-cmd net z-vel-cmd <= joint.2.vel-cmd net z-output <= hm2_7i76e.0.stepgen.02.velocity-cmd net z-pos-fb <= hm2_7i76e.0.stepgen.02.position-fb net z-pos-fb => joint.2.motor-pos-fb net z-enable <= joint.2.amp-enable-out net z-enable => hm2_7i76e.0.stepgen.02.enable # ---Encoder feedback signals/setup--- setp hm2_7i76e.0.encoder.02.counter-mode 0 setp hm2_7i76e.0.encoder.02.filter 1 setp hm2_7i76e.0.encoder.02.index-invert 0 setp hm2_7i76e.0.encoder.02.index-mask 0 setp hm2_7i76e.0.encoder.02.index-mask-invert 0 setp hm2_7i76e.0.encoder.02.scale [JOINT_2]ENCODER_SCALE net z-index-enable joint.2.index-enable <=> hm2_7i76e.0.encoder.02.index-enable # ---setup home / limit switch signals--- net z-home-sw => joint.2.home-sw-in net z-neg-limit => joint.2.neg-lim-sw-in net z-pos-limit => joint.2.pos-lim-sw-in #******************* # SPINDLE #******************* setp pid.s.Pgain [SPINDLE_0]P setp pid.s.Igain [SPINDLE_0]I setp pid.s.Dgain [SPINDLE_0]D setp pid.s.bias [SPINDLE_0]BIAS setp pid.s.FF0 [SPINDLE_0]FF0 setp pid.s.FF1 [SPINDLE_0]FF1 setp pid.s.FF2 [SPINDLE_0]FF2 setp pid.s.deadband [SPINDLE_0]DEADBAND setp pid.s.maxoutput [SPINDLE_0]MAX_OUTPUT setp pid.s.error-previous-target true net spindle-index-enable <=> pid.s.index-enable net spindle-enable => pid.s.enable net spindle-vel-cmd-rpm => pid.s.command net spindle-vel-fb-rpm => pid.s.feedback net spindle-output <= pid.s.output # ---Encoder feedback signals/setup--- setp hm2_7i76e.0.encoder.09.counter-mode 0 setp hm2_7i76e.0.encoder.09.filter 1 setp hm2_7i76e.0.encoder.09.index-invert 0 setp hm2_7i76e.0.encoder.09.index-mask 0 setp hm2_7i76e.0.encoder.09.index-mask-invert 0 setp hm2_7i76e.0.encoder.09.scale [SPINDLE_0]ENCODER_SCALE net spindle-revs <= hm2_7i76e.0.encoder.09.position net spindle-vel-fb-rps <= hm2_7i76e.0.encoder.09.velocity net spindle-index-enable <=> hm2_7i76e.0.encoder.09.index-enable # ---setup spindle control signals--- net spindle-vel-cmd-rps <= spindle.0.speed-out-rps net spindle-vel-cmd-rps-abs <= spindle.0.speed-out-rps-abs net spindle-vel-cmd-rpm <= spindle.0.speed-out net spindle-vel-cmd-rpm-abs <= spindle.0.speed-out-abs net spindle-enable <= spindle.0.on net spindle-cw <= spindle.0.forward net spindle-ccw <= spindle.0.reverse net spindle-brake <= spindle.0.brake net spindle-revs => spindle.0.revs net spindle-at-speed => spindle.0.at-speed net spindle-vel-fb-rps => spindle.0.speed-in net spindle-index-enable <=> spindle.0.index-enable # ---Setup spindle at speed signals--- sets spindle-at-speed true # Use ACTUAL spindle velocity from spindle encoder # spindle-velocity bounces around so we filter it with lowpass # spindle-velocity is signed so we use absolute component to remove sign # ACTUAL velocity is in RPS not RPM so we scale it. setp scale.spindle.gain 60 setp lowpass.spindle.gain 1.000000 net spindle-vel-fb-rps => scale.spindle.in net spindle-fb-rpm scale.spindle.out => abs.spindle.in net spindle-fb-rpm-abs abs.spindle.out => lowpass.spindle.in net spindle-fb-rpm-abs-filtered lowpass.spindle.out #****************************** # connect miscellaneous signals #****************************** # ---HALUI signals--- net axis-select-x halui.axis.x.select net jog-x-pos halui.axis.x.plus net jog-x-neg halui.axis.x.minus net jog-x-analog halui.axis.x.analog net x-is-homed halui.joint.0.is-homed net axis-select-y halui.axis.y.select net jog-y-pos halui.axis.y.plus net jog-y-neg halui.axis.y.minus net jog-y-analog halui.axis.y.analog net y-is-homed halui.joint.1.is-homed net axis-select-z halui.axis.z.select net jog-z-pos halui.axis.z.plus net jog-z-neg halui.axis.z.minus net jog-z-analog halui.axis.z.analog net z-is-homed halui.joint.2.is-homed net jog-selected-pos halui.axis.selected.plus net jog-selected-neg halui.axis.selected.minus net spindle-manual-cw halui.spindle.0.forward net spindle-manual-ccw halui.spindle.0.reverse net spindle-manual-stop halui.spindle.0.stop net machine-is-on halui.machine.is-on net jog-speed halui.axis.jog-speed net MDI-mode halui.mode.is-mdi # ---charge pump signals--- net estop-out => charge-pump.enable net charge-pump <= charge-pump.out # ---coolant signals--- net coolant-mist <= iocontrol.0.coolant-mist net coolant-flood <= iocontrol.0.coolant-flood # ---probe signal--- net probe-in => motion.probe-input # ---motion control signals--- net in-position <= motion.in-position net machine-is-enabled <= motion.motion-enabled # ---digital in / out signals--- net dout-00 <= motion.digital-out-00 net dout-01 <= motion.digital-out-01 net dout-02 <= motion.digital-out-02 net dout-03 <= motion.digital-out-03 net din-00 => motion.digital-in-00 net din-01 => motion.digital-in-01 net din-02 => motion.digital-in-02 net din-03 => motion.digital-in-03 # ---estop signals--- net estop-out <= iocontrol.0.user-enable-out net estop-out => iocontrol.0.emc-enable-in # ---manual tool change signals--- loadusr -W hal_manualtoolchange net tool-change-request iocontrol.0.tool-change => hal_manualtoolchange.change net tool-change-confirmed iocontrol.0.tool-changed <= hal_manualtoolchange.changed net tool-number iocontrol.0.tool-prep-number => hal_manualtoolchange.number net tool-prepare-loopback iocontrol.0.tool-prepare => iocontrol.0.tool-prepared

I did double check the hm2_eth command and the config parameter in the MAN page (HOSTMOT2 MAN page), nothing leaped out at me as to why the port might not be getting enabled when pncconf generates the HAL

Thanks

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6 years 1 month ago #180615 by PCW
A couple things:

P1 would have the 7I89 connected normally (at least the standard firmware
always allocates P1 first and then P2)

If you are using P2, it comprises GPIO 34 through GPIO 51 so for example to set
P2 pin 1 as an output for coolant, you would:

setp hm2_7i76e.0.gpio.034.is_output true
net coolant-mist => hm2_7i76e.0.gpio.34.out

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6 years 1 month ago #180617 by jhandel
Sadly it is not that straight forward..

1) because of Box layout and wire runs, yes the 7i89 is in P2 & the BOB is in P1 (though nothing is plugged into P1 right now, as I am testing the pins given I thought it was the BOB that was bad, but manual testing shows that it is working)
2) because i need more outputs I needed to remove step generators from the BOB layout anyways
3) there wasn't a standard 7i76e bitfile with the 7i89 + BOB that I could find anyways..

So, yes this is a custom bitfile

(here is the VHD)
Code:
library IEEE; use IEEE.std_logic_1164.all; -- defines std_logic types use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Copyright (C) 2007, Peter C. Wallace, Mesa Electronics -- http://www.mesanet.com -- -- This program is is licensed under a disjunctive dual license giving you -- the choice of one of the two following sets of free software/open source -- licensing terms: -- -- * GNU General Public License (GPL), version 2.0 or later -- * 3-clause BSD License -- -- -- The GNU GPL License: -- -- This program is free software; you can redistribute it and/or modify -- it under the terms of the GNU General Public License as published by -- the Free Software Foundation; either version 2 of the License, or -- (at your option) any later version. -- -- This program is distributed in the hope that it will be useful, -- but WITHOUT ANY WARRANTY; without even the implied warranty of -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- GNU General Public License for more details. -- -- You should have received a copy of the GNU General Public License -- along with this program; if not, write to the Free Software -- Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -- -- -- The 3-clause BSD License: -- -- Redistribution and use in source and binary forms, with or without -- modification, are permitted provided that the following conditions -- are met: -- -- * Redistributions of source code must retain the above copyright -- notice, this list of conditions and the following disclaimer. -- -- * Redistributions in binary form must reproduce the above -- copyright notice, this list of conditions and the following -- disclaimer in the documentation and/or other materials -- provided with the distribution. -- -- * Neither the name of Mesa Electronics nor the names of its -- contributors may be used to endorse or promote products -- derived from this software without specific prior written -- permission. -- -- -- Disclaimer: -- -- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -- COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- POSSIBILITY OF SUCH DAMAGE. -- use work.IDROMConst.all; package PIN_7i76x1_7i89x2D_x15ABOB_51 is constant ModuleID : ModuleIDType :=( (HM2DPLLTag, x"00", ClockLowTag, x"01", HM2DPLLBaseRateAddr&PadT, HM2DPLLNumRegs, x"00", HM2DPLLMPBitMask), (WatchDogTag, x"00", ClockLowTag, x"01", WatchDogTimeAddr&PadT, WatchDogNumRegs, x"00", WatchDogMPBitMask), (IOPortTag, x"00", ClockLowTag, x"03", PortAddr&PadT, IOPortNumRegs, x"00", IOPortMPBitMask), (StepGenTag, x"02", ClockLowTag, x"06", StepGenRateAddr&PadT, StepGenNumRegs, x"00", StepGenMPBitMask), (MuxedQcountTag, MQCRev, ClockLowTag, x"0A", MuxedQcounterAddr&PadT, MuxedQCounterNumRegs,x"00", MuxedQCounterMPBitMask), (MuxedQCountSelTag, x"00", ClockLowTag, x"01", NullAddr&PadT, x"00", x"00", x"00000000"), (SSerialTag, x"00", ClockLowTag, x"01", SSerialCommandAddr&PadT, SSerialNumRegs, x"10", SSerialMPBitMask), (LEDTag, x"00", ClockLowTag, x"01", LEDAddr&PadT, LEDNumRegs, x"00", LEDMPBitMask), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000") ); constant PinDesc : PinDescType :=( -- Base func sec unit sec func sec pin IOPortTag & x"00" & StepGenTag & StepGenDirPin, -- I/O 00 embedded 7I76 IOPortTag & x"00" & StepGenTag & StepGenStepPin, -- I/O 01 IOPortTag & x"01" & StepGenTag & StepGenDirPin, -- I/O 02 IOPortTag & x"01" & StepGenTag & StepGenStepPin, -- I/O 03 IOPortTag & x"02" & StepGenTag & StepGenDirPin, -- I/O 04 IOPortTag & x"02" & StepGenTag & StepGenStepPin, -- I/O 05 IOPortTag & x"03" & StepGenTag & StepGenDirPin, -- I/O 06 IOPortTag & x"03" & StepGenTag & StepGenStepPin, -- I/O 07 IOPortTag & x"04" & StepGenTag & StepGenDirPin, -- I/O 08 IOPortTag & x"04" & StepGenTag & StepGenStepPin, -- I/O 09 IOPortTag & x"00" & SSerialTag & SSerialTX0Pin, -- I/O 10 IOPortTag & x"00" & SSerialTag & SSerialRX0Pin, -- I/O 11 IOPortTag & x"00" & SSerialTag & SSerialTX1Pin, -- I/O 12 IOPortTag & x"00" & SSerialTag & SSerialRX1Pin, -- I/O 13 IOPortTag & x"04" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 14 IOPortTag & x"04" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 15 IOPortTag & x"04" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 16 -- P1 -- 5ABOB pinout -- 26 HDR -- IDC DB25 IOPortTag & x"00" & NullTag & NullPin, -- I/O 17 PIN 1 PIN 1 Spindle DAC PWM IOPortTag & x"00" & NullTag & NullPin, -- I/O 18 PIN 2 PIN 14 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 19 PIN 3 PIN 2 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 20 PIN 4 PIN 15 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 21 PIN 5 PIN 3 just GPIO IOPortTag & x"05" & StepGenTag & StepGenStepPin, -- I/O 22 PIN 6 PIN 16 B2 Step IOPortTag & x"00" & NullTag & NullPin, -- I/O 23 PIN 7 PIN 4 just GPIO IOPortTag & x"05" & StepGenTag & StepGenDirPin, -- I/O 24 PIN 8 PIN 17 B2 Dir IOPortTag & x"00" & NullTag & NullPin, -- I/O 25 PIN 9 PIN 5 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 26 PIN 11 PIN 6 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 27 PIN 13 PIN 7 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 28 PIN 15 PIN 8 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 29 PIN 17 PIN 9 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 30 PIN 19 PIN 10 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 31 PIN 21 PIN 11 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 32 PIN 23 PIN 12 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 33 PIN 25 PIN 13 just GPIO -- P2 HDR26 DB25 IOPortTag & x"00" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 34 PIN 1 PIN 1 IOPortTag & x"00" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 35 PIN 14 PIN 2 IOPortTag & x"00" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 36 PIN 2 PIN 3 IOPortTag & x"01" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 37 PIN 15 PIN 4 IOPortTag & x"01" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 38 PIN 3 PIN 5 IOPortTag & x"01" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 39 PIN 16 PIN 6 IOPortTag & x"02" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 40 PIN 4 PIN 7 IOPortTag & x"02" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 41 PIN 17 PIN 8 IOPortTag & x"02" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 42 PIN 5 PIN 9 IOPortTag & x"03" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 43 PIN 6 PIN 11 IOPortTag & x"03" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 44 PIN 7 PIN 13 IOPortTag & x"03" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 45 PIN 8 PIN 15 IOPortTag & x"00" & MuxedQCountSelTag & MuxedQCountSel0Pin, -- I/O 46 PIN 9 PIN 17 IOPortTag & x"00" & NullTag & NullPin, -- I/O 47 PIN 10 PIN 19 powop IOPortTag & x"00" & SSerialTag & SSerialRX2Pin, -- I/O 48 PIN 11 PIN 21 IOPortTag & x"00" & SSerialTag & SSerialTX2Pin, -- I/O 49 PIN 12 PIN 23 IOPortTag & x"00" & SSerialTag & SSerialTXEN2Pin, -- I/O 50 PIN 13 PIN 25 LIOPortTag & x"00" & SSerialTag & SSerialNTXEn1Pin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, -- added for IDROM v3 emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin); end package PIN_7i76x1_7i89x2D_x15ABOB_51;

and I am definitely getting data from the 7i89 and the encoders attached to it. My understand is that for pins I want to be generic IO I should use NullTag & NullPin, and then for inputs there is something I have to do in the HAL to configure the pin as an Input. But outputs should "just work" (given they aren't I am clearly wrong about that)

here is the current readhmid output
Code:
Configuration Name: HOSTMOT2 General configuration information: BoardName : MESA7I76 FPGA Size: 16 KGates FPGA Pins: 256 Number of IO Ports: 3 Width of one I/O port: 17 Clock Low frequency: 100.0000 MHz Clock High frequency: 200.0000 MHz IDROM Type: 3 Instance Stride 0: 4 Instance Stride 1: 64 Register Stride 0: 256 Register Stride 1: 256 Modules in configuration: Module: DPLL There are 1 of DPLL in configuration Version: 0 Registers: 7 BaseAddress: 7000 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: WatchDog There are 1 of WatchDog in configuration Version: 0 Registers: 3 BaseAddress: 0C00 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: IOPort There are 3 of IOPort in configuration Version: 0 Registers: 5 BaseAddress: 1000 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: StepGen There are 6 of StepGen in configuration Version: 2 Registers: 10 BaseAddress: 2000 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: MuxedQCount There are 10 of MuxedQCount in configuration Version: 4 Registers: 5 BaseAddress: 3600 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: MuxedQCountSel There are 1 of MuxedQCountSel in configuration Version: 0 Registers: 0 BaseAddress: 0000 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: SSerial There are 1 of SSerial in configuration Version: 0 Registers: 6 BaseAddress: 5B00 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 64 bytes Module: LED There are 1 of LED in configuration Version: 0 Registers: 1 BaseAddress: 0200 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Configuration pin-out: IO Connections for on-card Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 0 IOPort StepGen 0 Dir/Table2 (Out) 14 1 IOPort StepGen 0 Step/Table1 (Out) 2 2 IOPort StepGen 1 Dir/Table2 (Out) 15 3 IOPort StepGen 1 Step/Table1 (Out) 3 4 IOPort StepGen 2 Dir/Table2 (Out) 16 5 IOPort StepGen 2 Step/Table1 (Out) 4 6 IOPort StepGen 3 Dir/Table2 (Out) 17 7 IOPort StepGen 3 Step/Table1 (Out) 5 8 IOPort StepGen 4 Dir/Table2 (Out) 6 9 IOPort StepGen 4 Step/Table1 (Out) 7 10 IOPort SSerial 0 TXData1 (Out) 8 11 IOPort SSerial 0 RXData1 (In) 9 12 IOPort SSerial 0 TXData2 (Out) 10 13 IOPort SSerial 0 RXData2 (In) 11 14 IOPort MuxedQCount 4 MuxQ-IDX (In) 12 15 IOPort MuxedQCount 4 MuxQ-B (In) 13 16 IOPort MuxedQCount 4 MuxQ-A (In) IO Connections for P1 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 17 IOPort None 14 18 IOPort None 2 19 IOPort None 15 20 IOPort None 3 21 IOPort None 16 22 IOPort StepGen 5 Step/Table1 (Out) 4 23 IOPort None 17 24 IOPort StepGen 5 Dir/Table2 (Out) 5 25 IOPort None 6 26 IOPort None 7 27 IOPort None 8 28 IOPort None 9 29 IOPort None 10 30 IOPort None 11 31 IOPort None 12 32 IOPort None 13 33 IOPort None IO Connections for P2 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 34 IOPort MuxedQCount 0 MuxQ-A (In) 14 35 IOPort MuxedQCount 0 MuxQ-B (In) 2 36 IOPort MuxedQCount 0 MuxQ-IDX (In) 15 37 IOPort MuxedQCount 1 MuxQ-A (In) 3 38 IOPort MuxedQCount 1 MuxQ-B (In) 16 39 IOPort MuxedQCount 1 MuxQ-IDX (In) 4 40 IOPort MuxedQCount 2 MuxQ-A (In) 17 41 IOPort MuxedQCount 2 MuxQ-B (In) 5 42 IOPort MuxedQCount 2 MuxQ-IDX (In) 6 43 IOPort MuxedQCount 3 MuxQ-A (In) 7 44 IOPort MuxedQCount 3 MuxQ-B (In) 8 45 IOPort MuxedQCount 3 MuxQ-IDX (In) 9 46 IOPort MuxedQCountSel 0 MuxSel0 (Out) 10 47 IOPort None 11 48 IOPort SSerial 0 RXData3 (In) 12 49 IOPort SSerial 0 TXData3 (Out) 13 50 IOPort SSerial 0 TXEn3 (Out)

I have gone ahead and attached the bitfile

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6 years 1 month ago #180619 by PCW
OK so GPIO on P1
Your example has the wrong GPIO numbers:

setp hm2_7i76e.0.gpio.025.is_output true
net coolant-mist => hm2_7i76e.0.gpio.017.out

(they should both be 17 for P1 pin 1)

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6 years 1 month ago #180621 by jhandel
your right, I totally typo-ed that.. while yanking everything else out regarding outputs I had configured in pncconf to limit the scope of my testing..

sadly it did not change the outcome :-(

Voltage between pin 1 and pin 25 (gnd) is 5.04v no matter the state of coolant or setp (doesn't even flicker)

voltage between pin 1 and the common for the power supply is 5.06v and also doesn't even flicker

I guess my next step is to flip the firmware around re-flash and see if the 7i89 reads fine on P1.. If it does then the issue is clearly with the vhd... if not then perhaps P1 got damaged :-(..

its late, I'll have to fiddle with it more in the morning..

Thanks for the help thus far, night.

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6 years 1 month ago #180679 by jhandel
Well that went from bad to worse :-(....

So grabbed the vhd for the 7i76e + 7i89 built that, plugged the 7i89 into P1 - Encoders stopped working :-(..

Went back to the other firmware and put the 7i89 in P2 and the encoders still don't work..

Validated the encoder signals are good by plugging one of them them into TB3 it had a signal, plugged it back into 7i89 and nothing..

So new (expensive) question... Can a bad P1 kill a 7i89? and by extension can a bad 7i89 then kill P2? (the only thing I haven't specifically tried to test is if P2 is "bad" now too..

Any suggestions on how to test P1, P2 and 7i89s to see if they are truely bad or not would be awesome so I can figure out if I am going to the couch to find pennies or if its just some weird firmware issue with my Vhds that I built..

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6 years 1 month ago #180680 by PCW
Does
mesaflash --device 7i76e --addr some_ip_address --readhmid
report a reasonable pinout?

A bad 7I89 cannot damage a 7I76E and neither can a bad 7I76E output damage a 7I89
Are you sure the 7I89 is powered (make double sure the cable power jumpers are correct)

BTW you should not plug/unplug P1 or P2 with system power on, as its possible
that ground currents (say from encoder connections) can flow through a signal pin
before the ground pins make contact.

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6 years 1 month ago #180722 by jhandel
So probably best to summorize where I am, and the steps that got me here, maybe there is an "aha" in all of it that will help...

Current State:
P1: all pins high (except grounds) all the time
P2: TBD (however the 7i89 no longer sends data to LinuxCNC
7i89: No longer sends encoding information received from its ports to linux CNC on either P1 or P2 (Encoder signals tested on the spindle encoder ports on the 7i76 and it works fine so I know encoder data is making it to the plug

How I got here:
1) Custom Bitfile (see above)
- 7i89 worked
- inputs from the BOB looked like they worked but never tested outputs
- tried to get the step generator to work
- direction pin was stuck at 5v and wouldn't change based on direction
- step pin was stuck at ~450mv and oscilloscope did not show any signals
- Tested other pins, everything was 5v
- inputs seem to have stop working, but frankly I stopped testing them so can't say for sure
2) removed the BOB, tested pins directly
- everything was 5v high
3) custom firmware to move 7i89 to P1
4) flash, reload,
- linux CNC caused the 2nd led on the 7i76 to stick amber and nothing worked
- readhmid looks fine (see above for the old one, but it was checked and looked right for the situation of having just P1 programmed to run the 7i89 instead of P2)
- power cycle machine (amber went away linux CNC worked
- W7 turned "on" so P1 includes 5v like W12 on P2 was
- 7i89 stopped working on P1 (I DID move this while there was power, but I had never moved them since being plugged in originally so IF that is the cause it was a failed on the first time )
5) flash the original firmware, power cycle the machine (rollback to original 7i89 firmware on P2) <-- where we are now


There is already a copy of THAT bit file and readhmid, and those are both accurate so I'm not going to copy them back into this post.

My gut says I f-ed up and killed both P1 and P2 somehow (and maybe the 7i89)... I don't want that to be true, but gosh it just seems

possible..

FYI: the 7i89 has always required both 5v from the 7i76e (W12 or 7 high) AND 5v plugged in.. not sure if that is important.. And its Amber power LED was on in all test scenarios.

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