mesa 7i76e (7i76e_7i77x2)

cnc5@debian:~$ halcmd show all hm2 Loaded HAL Components: ID Type Name PID State 26 RT hm2_eth ready Component Pins: Owner Type Dir Value Name 26 s32 OUT 2098000000 hm2_7i76e.0.0.debug 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-00 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-00-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-01 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-01-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-02 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-02-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-03 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-03-not 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-04 ==> estop-ext 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-04-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-05 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-05-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-06 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-06-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-07 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-07-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-08 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-08-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-09 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-09-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-10 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-10-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-11 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-11-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-12 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-12-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-13 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-13-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-14 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-14-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-15 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-15-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-16 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-16-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-17 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-17-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-18 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-18-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-19 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-19-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-20 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-20-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-21 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-21-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-22 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-22-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-23 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-23-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-24 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-24-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-25 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-25-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-26 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-26-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-27 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-27-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-28 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-28-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-29 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-29-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-30 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-30-not 26 bit OUT FALSE hm2_7i76e.0.7i76.0.0.input-31 26 bit OUT TRUE hm2_7i76e.0.7i76.0.0.input-31-not 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-00 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-01 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-02 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-03 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-04 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-05 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-06 26 bit IN TRUE hm2_7i76e.0.7i76.0.0.output-07 <== estop-ext 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-08 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-09 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-10 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-11 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-12 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-13 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-14 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.output-15 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.spindir 26 bit IN FALSE hm2_7i76e.0.7i76.0.0.spinena 26 float IN 0 hm2_7i76e.0.7i76.0.0.spinout 26 float IN -50 hm2_7i76e.0.dpll.01.timer-us 26 float IN 100 hm2_7i76e.0.dpll.02.timer-us 26 float IN 100 hm2_7i76e.0.dpll.03.timer-us 26 float IN 100 hm2_7i76e.0.dpll.04.timer-us 26 float IN 1 hm2_7i76e.0.dpll.base-freq-khz 26 u32 OUT 0x0000002A hm2_7i76e.0.dpll.ddsize 26 float OUT 2.018958 hm2_7i76e.0.dpll.phase-error-us 26 u32 IN 0x00400000 hm2_7i76e.0.dpll.plimit 26 u32 OUT 0x00000018 hm2_7i76e.0.dpll.prescale 26 u32 IN 0x000007D0 hm2_7i76e.0.dpll.time-const 26 s32 OUT 0 hm2_7i76e.0.encoder.00.count 26 s32 OUT 0 hm2_7i76e.0.encoder.00.count-latched 26 bit I/O FALSE hm2_7i76e.0.encoder.00.index-enable 26 bit OUT FALSE hm2_7i76e.0.encoder.00.input-a 26 bit OUT FALSE hm2_7i76e.0.encoder.00.input-b 26 bit OUT TRUE hm2_7i76e.0.encoder.00.input-index 26 bit IN FALSE hm2_7i76e.0.encoder.00.latch-enable 26 bit IN FALSE hm2_7i76e.0.encoder.00.latch-polarity 26 float OUT 0 hm2_7i76e.0.encoder.00.position 26 float OUT 0 hm2_7i76e.0.encoder.00.position-latched 26 bit OUT FALSE hm2_7i76e.0.encoder.00.quad-error 26 bit IN FALSE hm2_7i76e.0.encoder.00.quad-error-enable 26 s32 OUT 0 hm2_7i76e.0.encoder.00.rawcounts 26 s32 OUT 0 hm2_7i76e.0.encoder.00.rawlatch 26 bit IN FALSE hm2_7i76e.0.encoder.00.reset 26 float OUT 0 hm2_7i76e.0.encoder.00.velocity 26 float OUT 0 hm2_7i76e.0.encoder.00.velocity-rpm 26 u32 IN 0x017D7840 hm2_7i76e.0.encoder.sample-frequency 26 s32 IN -1 hm2_7i76e.0.encoder.timer-number 26 bit OUT FALSE hm2_7i76e.0.gpio.000.in 26 bit OUT TRUE hm2_7i76e.0.gpio.000.in_not 26 bit OUT FALSE hm2_7i76e.0.gpio.001.in 26 bit OUT TRUE hm2_7i76e.0.gpio.001.in_not 26 bit OUT FALSE hm2_7i76e.0.gpio.002.in 26 bit OUT TRUE hm2_7i76e.0.gpio.002.in_not 26 bit OUT FALSE hm2_7i76e.0.gpio.003.in 26 bit OUT TRUE hm2_7i76e.0.gpio.003.in_not 26 bit OUT FALSE hm2_7i76e.0.gpio.004.in 26 bit OUT TRUE hm2_7i76e.0.gpio.004.in_not 26 bit OUT FALSE hm2_7i76e.0.gpio.005.in 26 bit OUT TRUE hm2_7i76e.0.gpio.005.in_not 26 bit OUT FALSE hm2_7i76e.0.gpio.006.in 26 bit OUT TRUE hm2_7i76e.0.gpio.006.in_not 26 bit OUT FALSE hm2_7i76e.0.gpio.007.in 26 bit OUT TRUE hm2_7i76e.0.gpio.007.in_not 26 bit OUT FALSE hm2_7i76e.0.gpio.008.in 26 bit OUT TRUE hm2_7i76e.0.gpio.008.in_not 26 bit OUT FALSE hm2_7i76e.0.gpio.009.in 26 bit OUT TRUE hm2_7i76e.0.gpio.009.in_not 26 bit OUT TRUE hm2_7i76e.0.gpio.010.in 26 bit OUT FALSE hm2_7i76e.0.gpio.010.in_not 26 bit OUT TRUE hm2_7i76e.0.gpio.011.in 26 bit OUT FALSE hm2_7i76e.0.gpio.011.in_not 26 bit OUT TRUE hm2_7i76e.0.gpio.012.in 26 bit OUT FALSE hm2_7i76e.0.gpio.012.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.012.out 26 bit OUT TRUE hm2_7i76e.0.gpio.013.in 26 bit OUT FALSE hm2_7i76e.0.gpio.013.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.013.out 26 bit OUT FALSE hm2_7i76e.0.gpio.014.in 26 bit OUT TRUE hm2_7i76e.0.gpio.014.in_not 26 bit OUT FALSE hm2_7i76e.0.gpio.015.in 26 bit OUT TRUE hm2_7i76e.0.gpio.015.in_not 26 bit OUT FALSE hm2_7i76e.0.gpio.016.in 26 bit OUT TRUE hm2_7i76e.0.gpio.016.in_not 26 bit OUT TRUE hm2_7i76e.0.gpio.017.in 26 bit OUT FALSE hm2_7i76e.0.gpio.017.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.017.out 26 bit OUT TRUE hm2_7i76e.0.gpio.018.in 26 bit OUT FALSE hm2_7i76e.0.gpio.018.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.018.out 26 bit OUT TRUE hm2_7i76e.0.gpio.019.in 26 bit OUT FALSE hm2_7i76e.0.gpio.019.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.019.out 26 bit OUT TRUE hm2_7i76e.0.gpio.020.in 26 bit OUT FALSE hm2_7i76e.0.gpio.020.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.020.out 26 bit OUT TRUE hm2_7i76e.0.gpio.021.in 26 bit OUT FALSE hm2_7i76e.0.gpio.021.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.021.out 26 bit OUT TRUE hm2_7i76e.0.gpio.022.in 26 bit OUT FALSE hm2_7i76e.0.gpio.022.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.022.out 26 bit OUT TRUE hm2_7i76e.0.gpio.023.in 26 bit OUT FALSE hm2_7i76e.0.gpio.023.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.023.out 26 bit OUT TRUE hm2_7i76e.0.gpio.024.in 26 bit OUT FALSE hm2_7i76e.0.gpio.024.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.024.out 26 bit OUT TRUE hm2_7i76e.0.gpio.025.in 26 bit OUT FALSE hm2_7i76e.0.gpio.025.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.025.out 26 bit OUT TRUE hm2_7i76e.0.gpio.026.in 26 bit OUT FALSE hm2_7i76e.0.gpio.026.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.026.out 26 bit OUT TRUE hm2_7i76e.0.gpio.027.in 26 bit OUT FALSE hm2_7i76e.0.gpio.027.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.027.out 26 bit OUT TRUE hm2_7i76e.0.gpio.028.in 26 bit OUT FALSE hm2_7i76e.0.gpio.028.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.028.out 26 bit OUT TRUE hm2_7i76e.0.gpio.029.in 26 bit OUT FALSE hm2_7i76e.0.gpio.029.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.029.out 26 bit OUT TRUE hm2_7i76e.0.gpio.030.in 26 bit OUT FALSE hm2_7i76e.0.gpio.030.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.030.out 26 bit OUT FALSE hm2_7i76e.0.gpio.031.in 26 bit OUT TRUE hm2_7i76e.0.gpio.031.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.031.out 26 bit OUT TRUE hm2_7i76e.0.gpio.032.in 26 bit OUT FALSE hm2_7i76e.0.gpio.032.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.032.out 26 bit OUT FALSE hm2_7i76e.0.gpio.033.in 26 bit OUT TRUE hm2_7i76e.0.gpio.033.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.033.out 26 bit OUT TRUE hm2_7i76e.0.gpio.034.in 26 bit OUT FALSE hm2_7i76e.0.gpio.034.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.034.out 26 bit OUT TRUE hm2_7i76e.0.gpio.035.in 26 bit OUT FALSE hm2_7i76e.0.gpio.035.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.035.out 26 bit OUT TRUE hm2_7i76e.0.gpio.036.in 26 bit OUT FALSE hm2_7i76e.0.gpio.036.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.036.out 26 bit OUT TRUE hm2_7i76e.0.gpio.037.in 26 bit OUT FALSE hm2_7i76e.0.gpio.037.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.037.out 26 bit OUT TRUE hm2_7i76e.0.gpio.038.in 26 bit OUT FALSE hm2_7i76e.0.gpio.038.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.038.out 26 bit OUT TRUE hm2_7i76e.0.gpio.039.in 26 bit OUT FALSE hm2_7i76e.0.gpio.039.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.039.out 26 bit OUT TRUE hm2_7i76e.0.gpio.040.in 26 bit OUT FALSE hm2_7i76e.0.gpio.040.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.040.out 26 bit OUT TRUE hm2_7i76e.0.gpio.041.in 26 bit OUT FALSE hm2_7i76e.0.gpio.041.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.041.out 26 bit OUT TRUE hm2_7i76e.0.gpio.042.in 26 bit OUT FALSE hm2_7i76e.0.gpio.042.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.042.out 26 bit OUT TRUE hm2_7i76e.0.gpio.043.in 26 bit OUT FALSE hm2_7i76e.0.gpio.043.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.043.out 26 bit OUT TRUE hm2_7i76e.0.gpio.044.in 26 bit OUT FALSE hm2_7i76e.0.gpio.044.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.044.out 26 bit OUT TRUE hm2_7i76e.0.gpio.045.in 26 bit OUT FALSE hm2_7i76e.0.gpio.045.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.045.out 26 bit OUT TRUE hm2_7i76e.0.gpio.046.in 26 bit OUT FALSE hm2_7i76e.0.gpio.046.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.046.out 26 bit OUT TRUE hm2_7i76e.0.gpio.047.in 26 bit OUT FALSE hm2_7i76e.0.gpio.047.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.047.out 26 bit OUT TRUE hm2_7i76e.0.gpio.048.in 26 bit OUT FALSE hm2_7i76e.0.gpio.048.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.048.out 26 bit OUT TRUE hm2_7i76e.0.gpio.049.in 26 bit OUT FALSE hm2_7i76e.0.gpio.049.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.049.out 26 bit OUT TRUE hm2_7i76e.0.gpio.050.in 26 bit OUT FALSE hm2_7i76e.0.gpio.050.in_not 26 bit IN FALSE hm2_7i76e.0.gpio.050.out 26 bit IN FALSE hm2_7i76e.0.led.CR01 26 bit IN FALSE hm2_7i76e.0.led.CR02 26 bit IN FALSE hm2_7i76e.0.led.CR03 26 bit IN FALSE hm2_7i76e.0.led.CR04 26 bit OUT FALSE hm2_7i76e.0.packet-error 26 bit OUT FALSE hm2_7i76e.0.packet-error-exceeded 26 s32 OUT 0 hm2_7i76e.0.packet-error-level 26 s32 OUT 0 hm2_7i76e.0.read-request.time 26 s32 OUT 206516 hm2_7i76e.0.read.time 26 u32 OUT 0x00000000 hm2_7i76e.0.sserial.port-0.fault-count 26 u32 OUT 0x00000003 hm2_7i76e.0.sserial.port-0.port_state 26 u32 OUT 0x00000000 hm2_7i76e.0.sserial.port-0.port_state2 26 u32 OUT 0x00000000 hm2_7i76e.0.sserial.port-0.port_state3 26 bit IN TRUE hm2_7i76e.0.sserial.port-0.run 26 bit IN TRUE hm2_7i76e.0.stepgen.00.control-type 26 s32 OUT 0 hm2_7i76e.0.stepgen.00.counts 26 float OUT 0 hm2_7i76e.0.stepgen.00.dbg_err_at_match 26 float OUT 0 hm2_7i76e.0.stepgen.00.dbg_ff_vel 26 float OUT 0 hm2_7i76e.0.stepgen.00.dbg_pos_minus_prev_cmd 26 float OUT 0 hm2_7i76e.0.stepgen.00.dbg_s_to_match 26 s32 OUT 0 hm2_7i76e.0.stepgen.00.dbg_step_rate 26 float OUT 0 hm2_7i76e.0.stepgen.00.dbg_vel_error 26 bit IN FALSE hm2_7i76e.0.stepgen.00.enable <== x-enable 26 float IN 0 hm2_7i76e.0.stepgen.00.position-cmd 26 float OUT 0 hm2_7i76e.0.stepgen.00.position-fb ==> x-pos-fb 26 float IN 0 hm2_7i76e.0.stepgen.00.velocity-cmd <== x-output 26 float OUT 0 hm2_7i76e.0.stepgen.00.velocity-fb 26 bit IN TRUE hm2_7i76e.0.stepgen.01.control-type 26 s32 OUT 0 hm2_7i76e.0.stepgen.01.counts 26 float OUT 0 hm2_7i76e.0.stepgen.01.dbg_err_at_match 26 float OUT 0 hm2_7i76e.0.stepgen.01.dbg_ff_vel 26 float OUT 0 hm2_7i76e.0.stepgen.01.dbg_pos_minus_prev_cmd 26 float OUT 0 hm2_7i76e.0.stepgen.01.dbg_s_to_match 26 s32 OUT 0 hm2_7i76e.0.stepgen.01.dbg_step_rate 26 float OUT 0 hm2_7i76e.0.stepgen.01.dbg_vel_error 26 bit IN FALSE hm2_7i76e.0.stepgen.01.enable <== y-enable 26 float IN 0 hm2_7i76e.0.stepgen.01.position-cmd 26 float OUT 0 hm2_7i76e.0.stepgen.01.position-fb ==> y-pos-fb 26 float IN 0 hm2_7i76e.0.stepgen.01.velocity-cmd <== y-output 26 float OUT 0 hm2_7i76e.0.stepgen.01.velocity-fb 26 bit IN TRUE hm2_7i76e.0.stepgen.02.control-type 26 s32 OUT 0 hm2_7i76e.0.stepgen.02.counts 26 float OUT 0 hm2_7i76e.0.stepgen.02.dbg_err_at_match 26 float OUT 0 hm2_7i76e.0.stepgen.02.dbg_ff_vel 26 float OUT 0 hm2_7i76e.0.stepgen.02.dbg_pos_minus_prev_cmd 26 float OUT 0 hm2_7i76e.0.stepgen.02.dbg_s_to_match 26 s32 OUT 0 hm2_7i76e.0.stepgen.02.dbg_step_rate 26 float OUT 0 hm2_7i76e.0.stepgen.02.dbg_vel_error 26 bit IN FALSE hm2_7i76e.0.stepgen.02.enable <== z-enable 26 float IN 0 hm2_7i76e.0.stepgen.02.position-cmd 26 float OUT 0 hm2_7i76e.0.stepgen.02.position-fb ==> z-pos-fb 26 float IN 0 hm2_7i76e.0.stepgen.02.velocity-cmd <== z-output 26 float OUT 0 hm2_7i76e.0.stepgen.02.velocity-fb 26 bit IN TRUE hm2_7i76e.0.stepgen.03.control-type 26 s32 OUT 0 hm2_7i76e.0.stepgen.03.counts 26 float OUT 0 hm2_7i76e.0.stepgen.03.dbg_err_at_match 26 float OUT 0 hm2_7i76e.0.stepgen.03.dbg_ff_vel 26 float OUT 0 hm2_7i76e.0.stepgen.03.dbg_pos_minus_prev_cmd 26 float OUT 0 hm2_7i76e.0.stepgen.03.dbg_s_to_match 26 s32 OUT 0 hm2_7i76e.0.stepgen.03.dbg_step_rate 26 float OUT 0 hm2_7i76e.0.stepgen.03.dbg_vel_error 26 bit IN FALSE hm2_7i76e.0.stepgen.03.enable <== a-enable 26 float IN 0 hm2_7i76e.0.stepgen.03.position-cmd 26 float OUT 0 hm2_7i76e.0.stepgen.03.position-fb ==> a-pos-fb 26 float IN 0 hm2_7i76e.0.stepgen.03.velocity-cmd <== a-output 26 float OUT 0 hm2_7i76e.0.stepgen.03.velocity-fb 26 bit IN FALSE hm2_7i76e.0.stepgen.04.control-type 26 s32 OUT 0 hm2_7i76e.0.stepgen.04.counts 26 float OUT 0 hm2_7i76e.0.stepgen.04.dbg_err_at_match 26 float OUT 0 hm2_7i76e.0.stepgen.04.dbg_ff_vel 26 float OUT 0 hm2_7i76e.0.stepgen.04.dbg_pos_minus_prev_cmd 26 float OUT 0 hm2_7i76e.0.stepgen.04.dbg_s_to_match 26 s32 OUT 0 hm2_7i76e.0.stepgen.04.dbg_step_rate 26 float OUT 0 hm2_7i76e.0.stepgen.04.dbg_vel_error 26 bit IN FALSE hm2_7i76e.0.stepgen.04.enable 26 float IN 0 hm2_7i76e.0.stepgen.04.position-cmd 26 float OUT 0 hm2_7i76e.0.stepgen.04.position-fb 26 float IN 0 hm2_7i76e.0.stepgen.04.velocity-cmd 26 float OUT 0 hm2_7i76e.0.stepgen.04.velocity-fb 26 s32 IN 1 hm2_7i76e.0.stepgen.timer-number 26 bit I/O FALSE hm2_7i76e.0.watchdog.has_bit 26 s32 OUT 27144 hm2_7i76e.0.write.time Pin Aliases: Alias Original Name Signals: Type Value Name (linked to) Parameters: Owner Type Dir Value Name 26 u32 RO 0x00000000 hm2_7i76e.0.7i76.0.0.analogin0 26 u32 RO 0x00000000 hm2_7i76e.0.7i76.0.0.analogin1 26 u32 RO 0x00000000 hm2_7i76e.0.7i76.0.0.analogin2 26 u32 RO 0x00000000 hm2_7i76e.0.7i76.0.0.analogin3 26 u32 RW 0x00000000 hm2_7i76e.0.7i76.0.0.encmode0 26 u32 RW 0x00000000 hm2_7i76e.0.7i76.0.0.encmode1 26 u32 RO 0x0000A8C0 hm2_7i76e.0.7i76.0.0.fieldvoltage 26 u32 RW 0x00000001 hm2_7i76e.0.7i76.0.0.hwrevision 26 u32 RW 0x00000009 hm2_7i76e.0.7i76.0.0.nvbaudrate 26 u32 RW 0x00000000 hm2_7i76e.0.7i76.0.0.nvencmode0 26 u32 RW 0x00000000 hm2_7i76e.0.7i76.0.0.nvencmode1 26 u32 RW 0x1A000835 hm2_7i76e.0.7i76.0.0.nvunitnumber 26 u32 RW 0x00000032 hm2_7i76e.0.7i76.0.0.nvwatchdogtimeout 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-00-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-01-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-02-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-03-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-04-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-05-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-06-invert 26 bit RW TRUE hm2_7i76e.0.7i76.0.0.output-07-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-08-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-09-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-10-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-11-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-12-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-13-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-14-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-15-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.spindir-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.spinena-invert 26 float RW 100 hm2_7i76e.0.7i76.0.0.spinout-maxlim 26 float RW 0 hm2_7i76e.0.7i76.0.0.spinout-minlim 26 float RW 100 hm2_7i76e.0.7i76.0.0.spinout-scalemax 26 u32 RW 0x0000000F hm2_7i76e.0.7i76.0.0.swrevision 26 bit RW FALSE hm2_7i76e.0.encoder.00.counter-mode 26 bit RW TRUE hm2_7i76e.0.encoder.00.filter 26 bit RW FALSE hm2_7i76e.0.encoder.00.index-invert 26 bit RW FALSE hm2_7i76e.0.encoder.00.index-mask 26 bit RW FALSE hm2_7i76e.0.encoder.00.index-mask-invert 26 float RW 1 hm2_7i76e.0.encoder.00.scale 26 float RW 0.5 hm2_7i76e.0.encoder.00.vel-timeout 26 bit RW FALSE hm2_7i76e.0.gpio.012.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.012.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.012.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.013.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.013.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.013.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.017.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.017.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.017.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.018.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.018.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.018.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.019.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.019.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.019.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.020.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.020.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.020.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.021.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.021.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.021.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.022.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.022.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.022.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.023.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.023.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.023.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.024.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.024.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.024.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.025.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.025.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.025.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.026.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.026.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.026.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.027.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.027.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.027.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.028.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.028.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.028.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.029.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.029.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.029.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.030.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.030.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.030.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.031.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.031.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.031.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.032.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.032.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.032.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.033.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.033.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.033.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.034.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.034.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.034.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.035.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.035.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.035.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.036.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.036.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.036.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.037.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.037.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.037.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.038.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.038.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.038.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.039.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.039.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.039.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.040.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.040.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.040.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.041.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.041.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.041.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.042.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.042.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.042.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.043.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.043.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.043.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.044.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.044.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.044.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.045.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.045.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.045.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.046.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.046.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.046.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.047.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.047.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.047.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.048.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.048.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.048.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.049.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.049.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.049.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.050.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.050.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.050.is_output 26 bit RW FALSE hm2_7i76e.0.io_error 26 s32 RO 1 hm2_7i76e.0.packet-error-decrement 26 s32 RW 2 hm2_7i76e.0.packet-error-increment 26 s32 RW 10 hm2_7i76e.0.packet-error-limit 26 s32 RW 80 hm2_7i76e.0.packet-read-timeout 26 s32 RW 0 hm2_7i76e.0.read-request.tmax 26 bit RO FALSE hm2_7i76e.0.read-request.tmax-increased 26 s32 RW 339434 hm2_7i76e.0.read.tmax 26 bit RO FALSE hm2_7i76e.0.read.tmax-increased 26 bit RW FALSE hm2_7i76e.0.sserial.00.tx0.invert_output 26 bit RW FALSE hm2_7i76e.0.sserial.00.tx0.is_opendrain 26 u32 RW 0x00000001 hm2_7i76e.0.sserial.port-0.fault-dec 26 u32 RW 0x0000000A hm2_7i76e.0.sserial.port-0.fault-inc 26 u32 RW 0x000000C8 hm2_7i76e.0.sserial.port-0.fault-lim 26 bit RW FALSE hm2_7i76e.0.stepgen.00.direction.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.00.direction.is_opendrain 26 u32 RW 0x00001388 hm2_7i76e.0.stepgen.00.dirhold 26 u32 RW 0x00001388 hm2_7i76e.0.stepgen.00.dirsetup 26 float RW 37.5 hm2_7i76e.0.stepgen.00.maxaccel 26 float RW 4.17 hm2_7i76e.0.stepgen.00.maxvel 26 float RW 1016 hm2_7i76e.0.stepgen.00.position-scale 26 bit RW FALSE hm2_7i76e.0.stepgen.00.step.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.00.step.is_opendrain 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.00.step_type 26 u32 RW 0x00001388 hm2_7i76e.0.stepgen.00.steplen 26 u32 RW 0x00001388 hm2_7i76e.0.stepgen.00.stepspace 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.00.table-data-0 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.00.table-data-1 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.00.table-data-2 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.00.table-data-3 26 bit RW FALSE hm2_7i76e.0.stepgen.01.direction.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.01.direction.is_opendrain 26 u32 RW 0x00002710 hm2_7i76e.0.stepgen.01.dirhold 26 u32 RW 0x00002710 hm2_7i76e.0.stepgen.01.dirsetup 26 float RW 37.5 hm2_7i76e.0.stepgen.01.maxaccel 26 float RW 1.25 hm2_7i76e.0.stepgen.01.maxvel 26 float RW 1016 hm2_7i76e.0.stepgen.01.position-scale 26 bit RW FALSE hm2_7i76e.0.stepgen.01.step.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.01.step.is_opendrain 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.01.step_type 26 u32 RW 0x00001388 hm2_7i76e.0.stepgen.01.steplen 26 u32 RW 0x00001388 hm2_7i76e.0.stepgen.01.stepspace 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.01.table-data-0 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.01.table-data-1 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.01.table-data-2 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.01.table-data-3 26 bit RW FALSE hm2_7i76e.0.stepgen.02.direction.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.02.direction.is_opendrain 26 u32 RW 0x00002710 hm2_7i76e.0.stepgen.02.dirhold 26 u32 RW 0x00002710 hm2_7i76e.0.stepgen.02.dirsetup 26 float RW 37.5 hm2_7i76e.0.stepgen.02.maxaccel 26 float RW 1.25 hm2_7i76e.0.stepgen.02.maxvel 26 float RW 1016 hm2_7i76e.0.stepgen.02.position-scale 26 bit RW FALSE hm2_7i76e.0.stepgen.02.step.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.02.step.is_opendrain 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.02.step_type 26 u32 RW 0x00001388 hm2_7i76e.0.stepgen.02.steplen 26 u32 RW 0x00001388 hm2_7i76e.0.stepgen.02.stepspace 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.02.table-data-0 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.02.table-data-1 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.02.table-data-2 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.02.table-data-3 26 bit RW FALSE hm2_7i76e.0.stepgen.03.direction.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.03.direction.is_opendrain 26 u32 RW 0x00002710 hm2_7i76e.0.stepgen.03.dirhold 26 u32 RW 0x00002710 hm2_7i76e.0.stepgen.03.dirsetup 26 float RW 1500 hm2_7i76e.0.stepgen.03.maxaccel 26 float RW 450 hm2_7i76e.0.stepgen.03.maxvel 26 float RW 2.8222 hm2_7i76e.0.stepgen.03.position-scale 26 bit RW FALSE hm2_7i76e.0.stepgen.03.step.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.03.step.is_opendrain 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.03.step_type 26 u32 RW 0x00001388 hm2_7i76e.0.stepgen.03.steplen 26 u32 RW 0x00001388 hm2_7i76e.0.stepgen.03.stepspace 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.03.table-data-0 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.03.table-data-1 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.03.table-data-2 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.03.table-data-3 26 bit RW FALSE hm2_7i76e.0.stepgen.04.direction.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.04.direction.is_opendrain 26 u32 RW 0x00027FF6 hm2_7i76e.0.stepgen.04.dirhold 26 u32 RW 0x00027FF6 hm2_7i76e.0.stepgen.04.dirsetup 26 float RW 1 hm2_7i76e.0.stepgen.04.maxaccel 26 float RW 0 hm2_7i76e.0.stepgen.04.maxvel 26 float RW 1 hm2_7i76e.0.stepgen.04.position-scale 26 bit RW FALSE hm2_7i76e.0.stepgen.04.step.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.04.step.is_opendrain 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.04.step_type 26 u32 RW 0x00027FF6 hm2_7i76e.0.stepgen.04.steplen 26 u32 RW 0x00027FF6 hm2_7i76e.0.stepgen.04.stepspace 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.04.table-data-0 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.04.table-data-1 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.04.table-data-2 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.04.table-data-3 26 u32 RW 0x004C4B40 hm2_7i76e.0.watchdog.timeout_ns 26 s32 RW 43036 hm2_7i76e.0.write.tmax 26 bit RO FALSE hm2_7i76e.0.write.tmax-increased Parameter Aliases: Alias Original Name hm2_7i76e.0.sserial.00.tx0.invert_output hm2_7i76e.0.gpio.010.invert_output hm2_7i76e.0.sserial.00.tx0.is_opendrain hm2_7i76e.0.gpio.010.is_opendrain hm2_7i76e.0.stepgen.00.direction.invert_output hm2_7i76e.0.gpio.000.invert_output hm2_7i76e.0.stepgen.00.direction.is_opendrain hm2_7i76e.0.gpio.000.is_opendrain hm2_7i76e.0.stepgen.00.step.invert_output hm2_7i76e.0.gpio.001.invert_output hm2_7i76e.0.stepgen.00.step.is_opendrain hm2_7i76e.0.gpio.001.is_opendrain hm2_7i76e.0.stepgen.01.direction.invert_output hm2_7i76e.0.gpio.002.invert_output hm2_7i76e.0.stepgen.01.direction.is_opendrain hm2_7i76e.0.gpio.002.is_opendrain hm2_7i76e.0.stepgen.01.step.invert_output hm2_7i76e.0.gpio.003.invert_output hm2_7i76e.0.stepgen.01.step.is_opendrain hm2_7i76e.0.gpio.003.is_opendrain hm2_7i76e.0.stepgen.02.direction.invert_output hm2_7i76e.0.gpio.004.invert_output hm2_7i76e.0.stepgen.02.direction.is_opendrain hm2_7i76e.0.gpio.004.is_opendrain hm2_7i76e.0.stepgen.02.step.invert_output hm2_7i76e.0.gpio.005.invert_output hm2_7i76e.0.stepgen.02.step.is_opendrain hm2_7i76e.0.gpio.005.is_opendrain hm2_7i76e.0.stepgen.03.direction.invert_output hm2_7i76e.0.gpio.006.invert_output hm2_7i76e.0.stepgen.03.direction.is_opendrain hm2_7i76e.0.gpio.006.is_opendrain hm2_7i76e.0.stepgen.03.step.invert_output hm2_7i76e.0.gpio.007.invert_output hm2_7i76e.0.stepgen.03.step.is_opendrain hm2_7i76e.0.gpio.007.is_opendrain hm2_7i76e.0.stepgen.04.direction.invert_output hm2_7i76e.0.gpio.008.invert_output hm2_7i76e.0.stepgen.04.direction.is_opendrain hm2_7i76e.0.gpio.008.is_opendrain hm2_7i76e.0.stepgen.04.step.invert_output hm2_7i76e.0.gpio.009.invert_output hm2_7i76e.0.stepgen.04.step.is_opendrain hm2_7i76e.0.gpio.009.is_opendrain Exported Functions: Owner CodeAddr Arg FP Users Name 00026 7f2b17a16835 5638009f9bc0 YES 1 hm2_7i76e.0.read 00026 7f2b17a167c1 5638009f9bc0 YES 0 hm2_7i76e.0.read-request 00026 7f2b17a166e1 5638009f9bc0 YES 1 hm2_7i76e.0.write Realtime Threads: Period FP Name ( Time, Max-Time ) cnc5@debian:~$