bit TRUE machine-is-enabled <== motion.motion-enabled bit TRUE machine-is-on <== halui.machine.is-on bit FALSE max-y <== hm2_7i76e.0.7i76.0.0.input-00 ==> joint.1.pos-lim-sw-in bit FALSE min-y <== hm2_7i76e.0.7i76.0.0.input-01 ==> joint.1.neg-lim-sw-in bit FALSE probe-in ==> motion.probe-input bit TRUE spindle-at-speed ==> motion.spindle-at-speed bit TRUE spindle-brake <== motion.spindle-brake bit FALSE spindle-ccw <== motion.spindle-reverse bit FALSE spindle-cw <== motion.spindle-forward bit FALSE spindle-enable <== motion.spindle-on ==> pid.s.enable bit FALSE spindle-index-enable <=> motion.spindle-index-enable ==> pid.s.index-enable bit FALSE spindle-manual-ccw ==> halui.spindle.reverse bit FALSE spindle-manual-cw ==> halui.spindle.forward bit FALSE spindle-manual-stop ==> halui.spindle.stop float 0 spindle-output <== pid.s.output float 0 spindle-revs ==> motion.spindle-revs float 0 spindle-vel-cmd-rpm <== motion.spindle-speed-out ==> pid.s.command float 0 spindle-vel-cmd-rpm-abs <== motion.spindle-speed-out-abs float 0 spindle-vel-cmd-rps <== motion.spindle-speed-out-rps float 0 spindle-vel-cmd-rps-abs <== motion.spindle-speed-out-rps-abs float 0 spindle-vel-fb-rpm ==> pid.s.feedback float 0 spindle-vel-fb-rps ==> motion.spindle-speed-in bit FALSE tool-change-confirmed <== hal_manualtoolchange.changed ==> iocontrol.0.tool-changed bit FALSE tool-change-request ==> hal_manualtoolchange.change <== iocontrol.0.tool-change s32 0 tool-number ==> hal_manualtoolchange.number <== iocontrol.0.tool-prep-number bit FALSE tool-prepare-loopback <== iocontrol.0.tool-prepare ==> iocontrol.0.tool-prepared bit TRUE x-enable ==> hm2_7i76e.0.stepgen.00.enable <== joint.0.amp-enable-out ==> pid.x.enable bit FALSE x-home-sw ==> joint.0.home-sw-in bit FALSE x-index-enable ==> pid.x.index-enable bit FALSE x-is-homed <== halui.joint.0.is-homed float -3.051758e-05 x-output ==> hm2_7i76e.0.stepgen.00.velocity-cmd <== pid.x.output float 0.1005 x-pos-cmd <== joint.0.motor-pos-cmd ==> pid.x.command float 0.1005 x-pos-fb <== hm2_7i76e.0.stepgen.00.position-fb ==> joint.0.motor-pos-fb ==> pid.x.feedback float 0 x-vel-cmd <== joint.0.vel-cmd ==> pid.x.command-deriv bit TRUE y-enable ==> hm2_7i76e.0.stepgen.01.enable <== joint.1.amp-enable-out ==> pid.y.enable bit FALSE y-home-sw ==> joint.1.home-sw-in bit FALSE y-index-enable ==> pid.y.index-enable bit FALSE y-is-homed <== halui.joint.1.is-homed float 0 y-output ==> hm2_7i76e.0.stepgen.01.velocity-cmd <== pid.y.output float 0 y-pos-cmd <== joint.1.motor-pos-cmd ==> pid.y.command float 0 y-pos-fb <== hm2_7i76e.0.stepgen.01.position-fb ==> joint.1.motor-pos-fb ==> pid.y.feedback float 0 y-vel-cmd <== joint.1.vel-cmd ==> pid.y.command-deriv bit TRUE z-enable ==> hm2_7i76e.0.stepgen.02.enable <== joint.2.amp-enable-out ==> pid.z.enable bit FALSE z-home-sw ==> joint.2.home-sw-in bit FALSE z-index-enable ==> pid.z.index-enable bit FALSE z-is-homed <== halui.joint.2.is-homed bit FALSE z-neg-limit ==> joint.2.neg-lim-sw-in float 0 z-output ==> hm2_7i76e.0.stepgen.02.velocity-cmd <== pid.z.output float 0 z-pos-cmd <== joint.2.motor-pos-cmd ==> pid.z.command float 0 z-pos-fb <== hm2_7i76e.0.stepgen.02.position-fb ==> joint.2.motor-pos-fb ==> pid.z.feedback bit FALSE z-pos-limit ==> joint.2.pos-lim-sw-in float 0 z-vel-cmd <== joint.2.vel-cmd ==> pid.z.command-deriv Parameters: Owner Type Dir Value Name 26 u32 RO 0x00000054 hm2_7i76e.0.7i76.0.0.analogin0 26 u32 RO 0x00000053 hm2_7i76e.0.7i76.0.0.analogin1 26 u32 RO 0x00000053 hm2_7i76e.0.7i76.0.0.analogin2 26 u32 RO 0x00000000 hm2_7i76e.0.7i76.0.0.analogin3 26 u32 RO 0x00000000 hm2_7i76e.0.7i76.0.0.encmode0 26 u32 RO 0x00000000 hm2_7i76e.0.7i76.0.0.encmode1 26 u32 RO 0x0000A9C0 hm2_7i76e.0.7i76.0.0.fieldvoltage 26 u32 RW 0x00000001 hm2_7i76e.0.7i76.0.0.hwrevision 26 u32 RW 0x00000009 hm2_7i76e.0.7i76.0.0.nvbaudrate 26 u32 RO 0x00000000 hm2_7i76e.0.7i76.0.0.nvencmode0 26 u32 RO 0x00000000 hm2_7i76e.0.7i76.0.0.nvencmode1 26 u32 RO 0x1A0001BA hm2_7i76e.0.7i76.0.0.nvunitnumber 26 u32 RO 0x00000032 hm2_7i76e.0.7i76.0.0.nvwatchdogtimeout 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-00-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-01-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-02-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-03-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-04-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-05-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-06-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-07-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-08-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-09-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-10-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-11-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-12-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-13-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-14-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.output-15-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.spindir-invert 26 bit RW FALSE hm2_7i76e.0.7i76.0.0.spinena-invert 26 float RW 100 hm2_7i76e.0.7i76.0.0.spinout-maxlim 26 float RW 0 hm2_7i76e.0.7i76.0.0.spinout-minlim 26 float RW 100 hm2_7i76e.0.7i76.0.0.spinout-scalemax 26 u32 RW 0x0000000E hm2_7i76e.0.7i76.0.0.swrevision 26 bit RW FALSE hm2_7i76e.0.encoder.00.counter-mode 26 bit RW TRUE hm2_7i76e.0.encoder.00.filter 26 bit RW FALSE hm2_7i76e.0.encoder.00.index-invert 26 bit RW FALSE hm2_7i76e.0.encoder.00.index-mask 26 bit RW FALSE hm2_7i76e.0.encoder.00.index-mask-invert 26 float RW 1 hm2_7i76e.0.encoder.00.scale 26 float RW 0.5 hm2_7i76e.0.encoder.00.vel-timeout 26 bit RW FALSE hm2_7i76e.0.gpio.012.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.012.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.012.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.013.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.013.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.013.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.017.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.017.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.017.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.018.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.018.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.018.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.019.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.019.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.019.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.020.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.020.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.020.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.021.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.021.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.021.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.022.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.022.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.022.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.023.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.023.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.023.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.024.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.024.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.024.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.025.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.025.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.025.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.026.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.026.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.026.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.027.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.027.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.027.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.028.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.028.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.028.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.029.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.029.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.029.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.030.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.030.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.030.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.031.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.031.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.031.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.032.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.032.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.032.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.033.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.033.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.033.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.034.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.034.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.034.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.035.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.035.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.035.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.036.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.036.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.036.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.037.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.037.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.037.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.038.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.038.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.038.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.039.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.039.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.039.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.040.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.040.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.040.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.041.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.041.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.041.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.042.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.042.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.042.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.043.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.043.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.043.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.044.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.044.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.044.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.045.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.045.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.045.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.046.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.046.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.046.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.047.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.047.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.047.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.048.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.048.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.048.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.049.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.049.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.049.is_output 26 bit RW FALSE hm2_7i76e.0.gpio.050.invert_output 26 bit RW FALSE hm2_7i76e.0.gpio.050.is_opendrain 26 bit RW FALSE hm2_7i76e.0.gpio.050.is_output 26 bit RW FALSE hm2_7i76e.0.io_error 26 s32 RO 1 hm2_7i76e.0.packet-error-decrement 26 s32 RW 2 hm2_7i76e.0.packet-error-increment 26 s32 RW 10 hm2_7i76e.0.packet-error-limit 26 s32 RW 80 hm2_7i76e.0.packet-read-timeout 26 s32 RW 0 hm2_7i76e.0.read-request.tmax 26 bit RO FALSE hm2_7i76e.0.read-request.tmax-increased 26 s32 RW 740592 hm2_7i76e.0.read.tmax 26 bit RO FALSE hm2_7i76e.0.read.tmax-increased 26 bit RW FALSE hm2_7i76e.0.sserial.00.tx0.invert_output 26 bit RW FALSE hm2_7i76e.0.sserial.00.tx0.is_opendrain 26 u32 RW 0x00000001 hm2_7i76e.0.sserial.port-0.fault-dec 26 u32 RW 0x0000000A hm2_7i76e.0.sserial.port-0.fault-inc 26 u32 RW 0x000000C8 hm2_7i76e.0.sserial.port-0.fault-lim 26 bit RW FALSE hm2_7i76e.0.stepgen.00.direction.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.00.direction.is_opendrain 26 u32 RW 0x000003E8 hm2_7i76e.0.stepgen.00.dirhold 26 u32 RW 0x000003E8 hm2_7i76e.0.stepgen.00.dirsetup 26 float RW 37.5 hm2_7i76e.0.stepgen.00.maxaccel 26 float RW 1.25 hm2_7i76e.0.stepgen.00.maxvel 26 float RW 400 hm2_7i76e.0.stepgen.00.position-scale 26 bit RW FALSE hm2_7i76e.0.stepgen.00.step.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.00.step.is_opendrain 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.00.step_type 26 u32 RW 0x000003E8 hm2_7i76e.0.stepgen.00.steplen 26 u32 RW 0x000003E8 hm2_7i76e.0.stepgen.00.stepspace 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.00.table-data-0 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.00.table-data-1 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.00.table-data-2 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.00.table-data-3 26 bit RW FALSE hm2_7i76e.0.stepgen.01.direction.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.01.direction.is_opendrain 26 u32 RW 0x000003E8 hm2_7i76e.0.stepgen.01.dirhold 26 u32 RW 0x000003E8 hm2_7i76e.0.stepgen.01.dirsetup 26 float RW 37.5 hm2_7i76e.0.stepgen.01.maxaccel 26 float RW 1.25 hm2_7i76e.0.stepgen.01.maxvel 26 float RW 400 hm2_7i76e.0.stepgen.01.position-scale 26 bit RW FALSE hm2_7i76e.0.stepgen.01.step.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.01.step.is_opendrain 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.01.step_type 26 u32 RW 0x000003E8 hm2_7i76e.0.stepgen.01.steplen 26 u32 RW 0x000003E8 hm2_7i76e.0.stepgen.01.stepspace 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.01.table-data-0 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.01.table-data-1 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.01.table-data-2 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.01.table-data-3 26 bit RW FALSE hm2_7i76e.0.stepgen.02.direction.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.02.direction.is_opendrain 26 u32 RW 0x000003E8 hm2_7i76e.0.stepgen.02.dirhold 26 u32 RW 0x000003E8 hm2_7i76e.0.stepgen.02.dirsetup 26 float RW 37.5 hm2_7i76e.0.stepgen.02.maxaccel 26 float RW 1.25 hm2_7i76e.0.stepgen.02.maxvel 26 float RW 400 hm2_7i76e.0.stepgen.02.position-scale 26 bit RW FALSE hm2_7i76e.0.stepgen.02.step.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.02.step.is_opendrain 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.02.step_type 26 u32 RW 0x000003E8 hm2_7i76e.0.stepgen.02.steplen 26 u32 RW 0x000003E8 hm2_7i76e.0.stepgen.02.stepspace 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.02.table-data-0 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.02.table-data-1 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.02.table-data-2 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.02.table-data-3 26 bit RW FALSE hm2_7i76e.0.stepgen.03.direction.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.03.direction.is_opendrain 26 u32 RW 0x00027FF6 hm2_7i76e.0.stepgen.03.dirhold 26 u32 RW 0x00027FF6 hm2_7i76e.0.stepgen.03.dirsetup 26 float RW 1 hm2_7i76e.0.stepgen.03.maxaccel 26 float RW 0 hm2_7i76e.0.stepgen.03.maxvel 26 float RW 1 hm2_7i76e.0.stepgen.03.position-scale 26 bit RW FALSE hm2_7i76e.0.stepgen.03.step.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.03.step.is_opendrain 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.03.step_type 26 u32 RW 0x00027FF6 hm2_7i76e.0.stepgen.03.steplen 26 u32 RW 0x00027FF6 hm2_7i76e.0.stepgen.03.stepspace 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.03.table-data-0 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.03.table-data-1 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.03.table-data-2 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.03.table-data-3 26 bit RW FALSE hm2_7i76e.0.stepgen.04.direction.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.04.direction.is_opendrain 26 u32 RW 0x00027FF6 hm2_7i76e.0.stepgen.04.dirhold 26 u32 RW 0x00027FF6 hm2_7i76e.0.stepgen.04.dirsetup 26 float RW 1 hm2_7i76e.0.stepgen.04.maxaccel 26 float RW 0 hm2_7i76e.0.stepgen.04.maxvel 26 float RW 1 hm2_7i76e.0.stepgen.04.position-scale 26 bit RW FALSE hm2_7i76e.0.stepgen.04.step.invert_output 26 bit RW FALSE hm2_7i76e.0.stepgen.04.step.is_opendrain 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.04.step_type 26 u32 RW 0x00027FF6 hm2_7i76e.0.stepgen.04.steplen 26 u32 RW 0x00027FF6 hm2_7i76e.0.stepgen.04.stepspace 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.04.table-data-0 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.04.table-data-1 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.04.table-data-2 26 u32 RW 0x00000000 hm2_7i76e.0.stepgen.04.table-data-3 26 u32 RW 0x004C4B40 hm2_7i76e.0.watchdog.timeout_ns 26 s32 RW 152304 hm2_7i76e.0.write.tmax 26 bit RO FALSE hm2_7i76e.0.write.tmax-increased 30 s32 RO 1 input.0.abs-hat0x-max 30 s32 RO -1 input.0.abs-hat0x-min 30 s32 RO 1 input.0.abs-hat0y-max 30 s32 RO -1 input.0.abs-hat0y-min 30 s32 RO 255 input.0.abs-rz-max 30 s32 RO 0 input.0.abs-rz-min 30 s32 RO 255 input.0.abs-x-max 30 s32 RO 0 input.0.abs-x-min 30 s32 RO 255 input.0.abs-y-max 30 s32 RO 0 input.0.abs-y-min 30 s32 RO 255 input.0.abs-z-max 30 s32 RO 0 input.0.abs-z-min 4 s32 RO 0 iocontrol.0.tool-prep-index 36 float RO 0 jogspeed.elapsed 36 s32 RO 0 jogspeed.selected 36 s32 RW 5136 jogspeed.tmax 36 bit RO FALSE jogspeed.tmax-increased 19 s32 RW 9504 motion-command-handler.tmax 19 bit RO FALSE motion-command-handler.tmax-increased 19 s32 RW 49968 motion-controller.tmax 19 bit RO FALSE motion-controller.tmax-increased 19 bit RO FALSE motion.debug-bit-0 19 bit RO FALSE motion.debug-bit-1 19 float RO 1 motion.debug-float-0 19 float RO 0 motion.debug-float-1 19 float RO 0 motion.debug-float-2 19 float RO 1 motion.debug-float-3 19 s32 RO 0 motion.debug-s32-0 19 s32 RO 0 motion.debug-s32-1 33 s32 RW 2760 pid.s.do-pid-calcs.tmax 33 bit RO FALSE pid.s.do-pid-calcs.tmax-increased 33 s32 RW 11088 pid.x.do-pid-calcs.tmax 33 bit RO FALSE pid.x.do-pid-calcs.tmax-increased 33 s32 RW 8112 pid.y.do-pid-calcs.tmax 33 bit RO FALSE pid.y.do-pid-calcs.tmax-increased 33 s32 RW 5376 pid.z.do-pid-calcs.tmax 33 bit RO FALSE pid.z.do-pid-calcs.tmax-increased 20 s32 RW 785448 servo-thread.tmax 19 float RO 0 tc.0.acc 19 float RO 0 tc.0.pos 19 float RO 0 tc.0.vel 19 float RO 0 tc.1.acc 19 float RO 0 tc.1.pos 19 float RO 0 tc.1.vel 19 float RO 0 tc.2.acc 19 float RO 0 tc.2.pos 19 float RO 0 tc.2.vel 19 float RO 0 tc.3.acc 19 float RO 0 tc.3.pos 19 float RO 0 tc.3.vel 19 u32 RO 0x00000000 traj.active_tc 19 float RO 0 traj.pos_out 19 float RO 0 traj.vel_out Parameter Aliases: Alias Original Name hm2_7i76e.0.sserial.00.tx0.invert_output hm2_7i76e.0.gpio.010.invert_output hm2_7i76e.0.sserial.00.tx0.is_opendrain hm2_7i76e.0.gpio.010.is_opendrain hm2_7i76e.0.stepgen.00.direction.invert_output hm2_7i76e.0.gpio.000.invert_output hm2_7i76e.0.stepgen.00.direction.is_opendrain hm2_7i76e.0.gpio.000.is_opendrain hm2_7i76e.0.stepgen.00.step.invert_output hm2_7i76e.0.gpio.001.invert_output hm2_7i76e.0.stepgen.00.step.is_opendrain hm2_7i76e.0.gpio.001.is_opendrain hm2_7i76e.0.stepgen.01.direction.invert_output hm2_7i76e.0.gpio.002.invert_output hm2_7i76e.0.stepgen.01.direction.is_opendrain hm2_7i76e.0.gpio.002.is_opendrain hm2_7i76e.0.stepgen.01.step.invert_output hm2_7i76e.0.gpio.003.invert_output hm2_7i76e.0.stepgen.01.step.is_opendrain hm2_7i76e.0.gpio.003.is_opendrain hm2_7i76e.0.stepgen.02.direction.invert_output hm2_7i76e.0.gpio.004.invert_output hm2_7i76e.0.stepgen.02.direction.is_opendrain hm2_7i76e.0.gpio.004.is_opendrain hm2_7i76e.0.stepgen.02.step.invert_output hm2_7i76e.0.gpio.005.invert_output hm2_7i76e.0.stepgen.02.step.is_opendrain hm2_7i76e.0.gpio.005.is_opendrain hm2_7i76e.0.stepgen.03.direction.invert_output hm2_7i76e.0.gpio.006.invert_output hm2_7i76e.0.stepgen.03.direction.is_opendrain hm2_7i76e.0.gpio.006.is_opendrain hm2_7i76e.0.stepgen.03.step.invert_output hm2_7i76e.0.gpio.007.invert_output hm2_7i76e.0.stepgen.03.step.is_opendrain hm2_7i76e.0.gpio.007.is_opendrain hm2_7i76e.0.stepgen.04.direction.invert_output hm2_7i76e.0.gpio.008.invert_output hm2_7i76e.0.stepgen.04.direction.is_opendrain hm2_7i76e.0.gpio.008.is_opendrain hm2_7i76e.0.stepgen.04.step.invert_output hm2_7i76e.0.gpio.009.invert_output hm2_7i76e.0.stepgen.04.step.is_opendrain hm2_7i76e.0.gpio.009.is_opendrain Exported Functions: Owner CodeAddr Arg FP Users Name 00026 b671ee66 09172458 YES 1 hm2_7i76e.0.read 00026 b671ede8 09172458 YES 0 hm2_7i76e.0.read-request 00026 b671ecfd 09172458 YES 1 hm2_7i76e.0.write 00036 b6719bd0 b6ab58d0 YES 1 jogspeed 00019 b6a9f367 00000000 YES 1 motion-command-handler 00019 b6aa1bc3 00000000 YES 1 motion-controller 00033 b76f9a30 b6ab578c YES 1 pid.s.do-pid-calcs 00033 b76f9a30 b6ab55a0 YES 1 pid.x.do-pid-calcs 00033 b76f9a30 b6ab5644 YES 1 pid.y.do-pid-calcs 00033 b76f9a30 b6ab56e8 YES 1 pid.z.do-pid-calcs Realtime Threads: Period FP Name ( Time, Max-Time ) 1000000 YES servo-thread ( 504600, 785448 ) 1 hm2_7i76e.0.read 2 motion-command-handler 3 motion-controller 4 pid.x.do-pid-calcs 5 pid.y.do-pid-calcs 6 pid.z.do-pid-calcs 7 pid.s.do-pid-calcs 8 jogspeed 9 hm2_7i76e.0.write