bit FALSE x-index-enable ==> pid.x.index-enable bit FALSE x-is-homed <== halui.joint.0.is-homed s32 0 x-jog-count ==> axis.x.jog-counts <== hm2_7i92.0.7i73.0.0.enc0.count float 0 x-output ==> hm2_7i92.0.stepgen.00.velocity-cmd <== pid.x.output float 0 x-pos-cmd <== joint.0.motor-pos-cmd ==> pid.x.command float 0 x-pos-fb <== hm2_7i92.0.stepgen.00.position-fb ==> joint.0.motor-pos-fb ==> pid.x.feedback float 0 x-vel-cmd <== joint.0.vel-cmd bit FALSE z-enable ==> hm2_7i92.0.stepgen.01.enable <== joint.1.amp-enable-out ==> pid.z.enable bit FALSE z-fault ==> gladevcp.falla-z-led <== hm2_7i92.0.gpio.021.in_not ==> joint.1.amp-fault-in bit FALSE z-index-enable ==> pid.z.index-enable bit FALSE z-is-homed ==> gladevcp.CEROS <== halui.joint.1.is-homed s32 0 z-jog-count ==> axis.z.jog-counts <== hm2_7i92.0.7i73.0.0.enc1.count float 0 z-output ==> hm2_7i92.0.stepgen.01.velocity-cmd <== pid.z.output float 0 z-pos-cmd <== joint.1.motor-pos-cmd ==> pid.z.command float 0 z-pos-fb <== hm2_7i92.0.stepgen.01.position-fb ==> joint.1.motor-pos-fb ==> pid.z.feedback float 0 z-vel-cmd <== joint.1.vel-cmd bit FALSE zero-x ==> halui.mdi-command-00 <== kb_5x4.key.r2c0 bit FALSE zero-z ==> halui.mdi-command-01 <== kb_5x4.key.r2c1 Parameters: Owner Type Dir Value Name 80 s32 RW 4907 abs.0.tmax 80 bit RO FALSE abs.0.tmax-increased 74 s32 RW 3851 and2.0.tmax 74 bit RO FALSE and2.0.tmax-increased 113 bit RW FALSE conv_float_s32.feedOV.clamp 113 s32 RW 1463 conv_float_s32.feedOV.tmax 113 bit RO FALSE conv_float_s32.feedOV.tmax-increased 113 bit RW FALSE conv_float_s32.spindel.clamp 113 s32 RW 3222 conv_float_s32.spindel.tmax 113 bit RO FALSE conv_float_s32.spindel.tmax-increased 42 s32 RW 3 debounce.0.delay 42 s32 RW 12185 debounce.0.tmax 42 bit RO FALSE debounce.0.tmax-increased 116 s32 RW 9112 encoder.capture-position.tmax 116 bit RO FALSE encoder.capture-position.tmax-increased 116 s32 RW 6592 encoder.update-counters.tmax 116 bit RO FALSE encoder.update-counters.tmax-increased 36 float RW 200 hm2_7i92.0.7i73.0.0.analogin0-scalemax 36 float RW 150 hm2_7i92.0.7i73.0.0.analogin1-scalemax 36 float RW 3.3 hm2_7i92.0.7i73.0.0.analogin2-scalemax 36 float RW 3.3 hm2_7i92.0.7i73.0.0.analogin3-scalemax 36 u32 RW 0x00002710 hm2_7i92.0.7i73.0.0.contrast 36 u32 RW 0x00000100 hm2_7i92.0.7i73.0.0.enc0.counts-per-rev 36 float RW 1 hm2_7i92.0.7i73.0.0.enc0.scale 36 u32 RW 0x00000100 hm2_7i92.0.7i73.0.0.enc1.counts-per-rev 36 float RW 1 hm2_7i92.0.7i73.0.0.enc1.scale 36 u32 RW 0x00000100 hm2_7i92.0.7i73.0.0.enc2.counts-per-rev 36 float RW 1 hm2_7i92.0.7i73.0.0.enc2.scale 36 u32 RW 0x00000100 hm2_7i92.0.7i73.0.0.enc3.counts-per-rev 36 float RW 1 hm2_7i92.0.7i73.0.0.enc3.scale 36 u32 RW 0x00000000 hm2_7i92.0.7i73.0.0.encmode0 36 u32 RW 0x00000000 hm2_7i92.0.7i73.0.0.encmode1 36 u32 RW 0x00000000 hm2_7i92.0.7i73.0.0.encmode2 36 u32 RW 0x00000000 hm2_7i92.0.7i73.0.0.encmode3 36 u32 RW 0x00000001 hm2_7i92.0.7i73.0.0.hwrevision 36 u32 RW 0x00000001 hm2_7i92.0.7i73.0.0.keymode 36 u32 RW 0x00008000 hm2_7i92.0.7i73.0.0.nvanalogfilter 36 u32 RW 0x00002710 hm2_7i92.0.7i73.0.0.nvcontrast 36 u32 RW 0x00000414 hm2_7i92.0.7i73.0.0.nvdispmode 36 u32 RW 0x00000000 hm2_7i92.0.7i73.0.0.nvencmode0 36 u32 RW 0x00000000 hm2_7i92.0.7i73.0.0.nvencmode1 36 u32 RW 0x00000000 hm2_7i92.0.7i73.0.0.nvencmode2 36 u32 RW 0x00000000 hm2_7i92.0.7i73.0.0.nvencmode3 36 u32 RW 0x0000001E hm2_7i92.0.7i73.0.0.nvkeytimer 36 u32 RO 0x130001E6 hm2_7i92.0.7i73.0.0.nvunitnumber 36 u32 RO 0x00000032 hm2_7i92.0.7i73.0.0.nvwatchdogtimeout 36 bit RW FALSE hm2_7i92.0.7i73.0.0.output-00-invert 36 bit RW FALSE hm2_7i92.0.7i73.0.0.output-01-invert 36 bit RW FALSE hm2_7i92.0.7i73.0.0.output-02-invert 36 bit RW FALSE hm2_7i92.0.7i73.0.0.output-03-invert 36 bit RW FALSE hm2_7i92.0.7i73.0.0.output-04-invert 36 bit RW FALSE hm2_7i92.0.7i73.0.0.output-05-invert 36 bit RW FALSE hm2_7i92.0.7i73.0.0.output-06-invert 36 bit RW FALSE hm2_7i92.0.7i73.0.0.output-07-invert 36 bit RW FALSE hm2_7i92.0.7i73.0.0.output-08-invert 36 bit RW FALSE hm2_7i92.0.7i73.0.0.output-09-invert 36 u32 RW 0x0000000E hm2_7i92.0.7i73.0.0.swrevision 36 bit RW FALSE hm2_7i92.0.encoder.00.counter-mode 36 bit RW TRUE hm2_7i92.0.encoder.00.filter 36 bit RW FALSE hm2_7i92.0.encoder.00.index-invert 36 bit RW FALSE hm2_7i92.0.encoder.00.index-mask 36 bit RW FALSE hm2_7i92.0.encoder.00.index-mask-invert 36 float RW 10000 hm2_7i92.0.encoder.00.scale 36 float RW 0.5 hm2_7i92.0.encoder.00.vel-timeout 36 bit RW FALSE hm2_7i92.0.gpio.006.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.006.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.006.is_output 36 bit RW FALSE hm2_7i92.0.gpio.007.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.007.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.007.is_output 36 bit RW TRUE hm2_7i92.0.gpio.017.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.017.is_opendrain 36 bit RW TRUE hm2_7i92.0.gpio.017.is_output 36 bit RW TRUE hm2_7i92.0.gpio.018.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.018.is_opendrain 36 bit RW TRUE hm2_7i92.0.gpio.018.is_output 36 bit RW FALSE hm2_7i92.0.gpio.019.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.019.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.019.is_output 36 bit RW FALSE hm2_7i92.0.gpio.020.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.020.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.020.is_output 36 bit RW FALSE hm2_7i92.0.gpio.021.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.021.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.021.is_output 36 bit RW TRUE hm2_7i92.0.gpio.022.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.022.is_opendrain 36 bit RW TRUE hm2_7i92.0.gpio.022.is_output 36 bit RW FALSE hm2_7i92.0.gpio.023.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.023.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.023.is_output 36 bit RW FALSE hm2_7i92.0.gpio.024.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.024.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.024.is_output 36 bit RW FALSE hm2_7i92.0.gpio.025.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.025.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.025.is_output 36 bit RW FALSE hm2_7i92.0.gpio.026.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.026.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.026.is_output 36 bit RW FALSE hm2_7i92.0.gpio.027.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.027.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.027.is_output 36 bit RW FALSE hm2_7i92.0.gpio.028.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.028.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.028.is_output 36 bit RW FALSE hm2_7i92.0.gpio.029.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.029.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.029.is_output 36 bit RW FALSE hm2_7i92.0.gpio.030.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.030.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.030.is_output 36 bit RW FALSE hm2_7i92.0.gpio.031.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.031.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.031.is_output 36 bit RW FALSE hm2_7i92.0.gpio.032.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.032.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.032.is_output 36 bit RW FALSE hm2_7i92.0.gpio.033.invert_output 36 bit RW FALSE hm2_7i92.0.gpio.033.is_opendrain 36 bit RW FALSE hm2_7i92.0.gpio.033.is_output 36 bit RW FALSE hm2_7i92.0.io_error 36 s32 RO 1 hm2_7i92.0.packet-error-decrement 36 s32 RW 2 hm2_7i92.0.packet-error-increment 36 s32 RW 10 hm2_7i92.0.packet-error-limit 36 s32 RW 80 hm2_7i92.0.packet-read-timeout 36 bit RW FALSE hm2_7i92.0.pwmgen.00.enable.invert_output 36 bit RW FALSE hm2_7i92.0.pwmgen.00.enable.is_opendrain 36 bit RW FALSE hm2_7i92.0.pwmgen.00.offset-mode 36 bit RW FALSE hm2_7i92.0.pwmgen.00.out0.invert_output 36 bit RW FALSE hm2_7i92.0.pwmgen.00.out0.is_opendrain 36 bit RW FALSE hm2_7i92.0.pwmgen.00.out1.invert_output 36 bit RW FALSE hm2_7i92.0.pwmgen.00.out1.is_opendrain 36 s32 RW 1 hm2_7i92.0.pwmgen.00.output-type 36 float RW 1 hm2_7i92.0.pwmgen.00.scale 36 u32 RW 0x00004E20 hm2_7i92.0.pwmgen.pdm_frequency 36 u32 RW 0x00004E20 hm2_7i92.0.pwmgen.pwm_frequency 36 s32 RW 0 hm2_7i92.0.read-request.tmax 36 bit RO FALSE hm2_7i92.0.read-request.tmax-increased 36 s32 RW 1738759 hm2_7i92.0.read.tmax 36 bit RO FALSE hm2_7i92.0.read.tmax-increased 36 bit RW FALSE hm2_7i92.0.sserial.00.tx0.invert_output 36 bit RW FALSE hm2_7i92.0.sserial.00.tx0.is_opendrain 36 bit RW FALSE hm2_7i92.0.sserial.00.txen0.invert_output 36 bit RW FALSE hm2_7i92.0.sserial.00.txen0.is_opendrain 36 u32 RW 0x00000001 hm2_7i92.0.sserial.port-0.fault-dec 36 u32 RW 0x0000000A hm2_7i92.0.sserial.port-0.fault-inc 36 u32 RW 0x000000C8 hm2_7i92.0.sserial.port-0.fault-lim 36 bit RW FALSE hm2_7i92.0.stepgen.00.direction.invert_output 36 bit RW FALSE hm2_7i92.0.stepgen.00.direction.is_opendrain 36 u32 RW 0x00001388 hm2_7i92.0.stepgen.00.dirhold 36 u32 RW 0x00001388 hm2_7i92.0.stepgen.00.dirsetup 36 float RW 937.5 hm2_7i92.0.stepgen.00.maxaccel 36 float RW 65.5 hm2_7i92.0.stepgen.00.maxvel 36 float RW 320 hm2_7i92.0.stepgen.00.position-scale 36 bit RW FALSE hm2_7i92.0.stepgen.00.step.invert_output 36 bit RW FALSE hm2_7i92.0.stepgen.00.step.is_opendrain 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.00.step_type 36 u32 RW 0x00001388 hm2_7i92.0.stepgen.00.steplen 36 u32 RW 0x00001388 hm2_7i92.0.stepgen.00.stepspace 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.00.table-data-0 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.00.table-data-1 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.00.table-data-2 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.00.table-data-3 36 bit RW FALSE hm2_7i92.0.stepgen.01.direction.invert_output 36 bit RW FALSE hm2_7i92.0.stepgen.01.direction.is_opendrain 36 u32 RW 0x00001388 hm2_7i92.0.stepgen.01.dirhold 36 u32 RW 0x00001388 hm2_7i92.0.stepgen.01.dirsetup 36 float RW 937.5 hm2_7i92.0.stepgen.01.maxaccel 36 float RW 65.5 hm2_7i92.0.stepgen.01.maxvel 36 float RW 640 hm2_7i92.0.stepgen.01.position-scale 36 bit RW FALSE hm2_7i92.0.stepgen.01.step.invert_output 36 bit RW FALSE hm2_7i92.0.stepgen.01.step.is_opendrain 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.01.step_type 36 u32 RW 0x00001388 hm2_7i92.0.stepgen.01.steplen 36 u32 RW 0x00001388 hm2_7i92.0.stepgen.01.stepspace 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.01.table-data-0 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.01.table-data-1 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.01.table-data-2 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.01.table-data-3 36 bit RW FALSE hm2_7i92.0.stepgen.02.direction.invert_output 36 bit RW FALSE hm2_7i92.0.stepgen.02.direction.is_opendrain 36 u32 RW 0x000003E8 hm2_7i92.0.stepgen.02.dirhold 36 u32 RW 0x000003E8 hm2_7i92.0.stepgen.02.dirsetup 36 float RW 100 hm2_7i92.0.stepgen.02.maxaccel 36 float RW 3000 hm2_7i92.0.stepgen.02.maxvel 36 float RW 9.8 hm2_7i92.0.stepgen.02.position-scale 36 bit RW FALSE hm2_7i92.0.stepgen.02.step.invert_output 36 bit RW FALSE hm2_7i92.0.stepgen.02.step.is_opendrain 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.02.step_type 36 u32 RW 0x00001388 hm2_7i92.0.stepgen.02.steplen 36 u32 RW 0x00001388 hm2_7i92.0.stepgen.02.stepspace 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.02.table-data-0 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.02.table-data-1 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.02.table-data-2 36 u32 RW 0x00000000 hm2_7i92.0.stepgen.02.table-data-3 36 u32 RW 0x0053EC60 hm2_7i92.0.watchdog.timeout_ns 36 s32 RW 241185 hm2_7i92.0.write.tmax 36 bit RO FALSE hm2_7i92.0.write.tmax-increased 135 float RW 0.1 ilowpass.mpgX.gain 135 float RW 1 ilowpass.mpgX.scale 135 s32 RW 3760 ilowpass.mpgX.tmax 135 bit RO FALSE ilowpass.mpgX.tmax-increased 135 float RW 0.1 ilowpass.mpgZ.gain 135 float RW 1 ilowpass.mpgZ.scale 135 s32 RW 1351 ilowpass.mpgZ.tmax 135 bit RO FALSE ilowpass.mpgZ.tmax-increased 128 u32 RW 0x00000002 kb_5x4.key_rollover 128 bit RW TRUE kb_5x4.negative-logic 128 s32 RW 1315 kb_5x4.tmax 128 bit RO FALSE kb_5x4.tmax-increased 128 u32 RW 0x00000002 kb_7i73.key_rollover 128 bit RW TRUE kb_7i73.negative-logic 128 s32 RW 6463 kb_7i73.tmax 128 bit RO FALSE kb_7i73.tmax-increased 110 u32 RW 0x0000002E lcd.00.decimal-separator 110 s32 RW 12019 lcd.tmax 110 bit RO FALSE lcd.tmax-increased 29 s32 RW 9185 motion-command-handler.tmax 29 bit RO FALSE motion-command-handler.tmax-increased 29 s32 RW 124703 motion-controller.tmax 29 bit RO FALSE motion-controller.tmax-increased 29 bit RO FALSE motion.debug-bit-0 29 bit RO FALSE motion.debug-bit-1 29 float RO 0 motion.debug-float-0 29 float RO 0 motion.debug-float-1 29 float RO 0 motion.debug-float-2 29 float RO 0.98 motion.debug-float-3 29 s32 RO 0 motion.debug-s32-0 29 s32 RO 0 motion.debug-s32-1 119 s32 RW 4444 mux4.0.tmax 119 bit RO FALSE mux4.0.tmax-increased 71 s32 RW 3481 not.0.tmax 71 bit RO FALSE not.0.tmax-increased 77 s32 RW 0 offset.0.update-feedback.tmax 77 bit RO FALSE offset.0.update-feedback.tmax-increased 77 s32 RW 3796 offset.0.update-output.tmax 77 bit RO FALSE offset.0.update-output.tmax-increased 68 s32 RW 2852 or2.0.tmax 68 bit RO FALSE or2.0.tmax-increased 39 s32 RW 10796 pid.x.do-pid-calcs.tmax 39 bit RO FALSE pid.x.do-pid-calcs.tmax-increased 39 s32 RW 7388 pid.z.do-pid-calcs.tmax 39 bit RO FALSE pid.z.do-pid-calcs.tmax-increased 132 u32 RW 0x0000001D sendkeys.0.pin-event-00 132 u32 RW 0x00000039 sendkeys.0.pin-event-01 132 u32 RW 0x00000026 sendkeys.0.pin-event-02 132 u32 RW 0x00000002 sendkeys.0.scan-event-00 132 u32 RW 0x00000003 sendkeys.0.scan-event-01 132 u32 RW 0x00000004 sendkeys.0.scan-event-02 132 u32 RW 0x0000002D sendkeys.0.scan-event-03 132 u32 RW 0x00000032 sendkeys.0.scan-event-04 132 u32 RW 0x0000001F sendkeys.0.scan-event-05 132 u32 RW 0x00000067 sendkeys.0.scan-event-06 132 u32 RW 0x00000014 sendkeys.0.scan-event-07 132 u32 RW 0x00000005 sendkeys.0.scan-event-08 132 u32 RW 0x00000006 sendkeys.0.scan-event-09 132 u32 RW 0x00000007 sendkeys.0.scan-event-10 132 u32 RW 0x0000002C sendkeys.0.scan-event-11 132 u32 RW 0x00000021 sendkeys.0.scan-event-12 132 u32 RW 0x00000069 sendkeys.0.scan-event-13 132 u32 RW 0x0000000F sendkeys.0.scan-event-14 132 u32 RW 0x00000069 sendkeys.0.scan-event-15 132 u32 RW 0x00000008 sendkeys.0.scan-event-16 132 u32 RW 0x00000009 sendkeys.0.scan-event-17 132 u32 RW 0x0000000A sendkeys.0.scan-event-18 132 u32 RW 0x00000022 sendkeys.0.scan-event-19 132 u32 RW 0x00000019 sendkeys.0.scan-event-20 132 u32 RW 0x00000013 sendkeys.0.scan-event-21 132 u32 RW 0x0000006C sendkeys.0.scan-event-22 132 u32 RW 0x0000003D sendkeys.0.scan-event-23 132 u32 RW 0x00000034 sendkeys.0.scan-event-24 132 u32 RW 0x0000000B sendkeys.0.scan-event-25 132 u32 RW 0x0000000C sendkeys.0.scan-event-26 132 u32 RW 0x00000039 sendkeys.0.scan-event-27 132 u32 RW 0x0000001C sendkeys.0.scan-event-28 132 u32 RW 0x00000025 sendkeys.0.scan-event-29 132 u32 RW 0x0000000E sendkeys.0.scan-event-30 132 u32 RW 0x0000003F sendkeys.0.scan-event-31 30 s32 RW 1988315 servo-thread.tmax 59 s32 RW 10111 spindle-active-delay.tmax 59 bit RO FALSE spindle-active-delay.tmax-increased 56 float RW 0.01 spindle-at-pos.difference 56 float RW 1 spindle-at-pos.scale 56 s32 RW 3074 spindle-at-pos.tmax 56 bit RO FALSE spindle-at-pos.tmax-increased 56 float RW 0.2 spindle-at-speed.difference 56 float RW 1 spindle-at-speed.scale 56 s32 RW 3723 spindle-at-speed.tmax 56 bit RO FALSE spindle-at-speed.tmax-increased 62 s32 RW 13834 spindle-orient.tmax 62 bit RO FALSE spindle-orient.tmax-increased 39 s32 RW 15870 spindle-pid.do-pid-calcs.tmax 39 bit RO FALSE spindle-pid.do-pid-calcs.tmax-increased 65 s32 RW 9370 spindle-pwm-switch.tmax 65 bit RO FALSE spindle-pwm-switch.tmax-increased 53 s32 RW 4407 spindle-ramp.tmax 53 bit RO FALSE spindle-ramp.tmax-increased 29 float RO 0 tc.0.acc 29 float RO 0 tc.0.pos 29 float RO 0 tc.0.vel 29 float RO 0 tc.1.acc 29 float RO 0 tc.1.pos 29 float RO 0 tc.1.vel 29 float RO 0 tc.2.acc 29 float RO 0 tc.2.pos 29 float RO 0 tc.2.vel 29 float RO 0 tc.3.acc 29 float RO 0 tc.3.pos 29 float RO 0 tc.3.vel 125 s32 RW 2648 toggle2nist_Monoff.tmax 125 bit RO FALSE toggle2nist_Monoff.tmax-increased 125 s32 RW 2963 toggle2nist_Ppaures.tmax 125 bit RO FALSE toggle2nist_Ppaures.tmax-increased 125 s32 RW 3796 toggle2nist_SPLonoff.tmax 125 bit RO FALSE toggle2nist_SPLonoff.tmax-increased 122 u32 RW 0x0000000A toggle_Monoff.debounce 122 s32 RW 1074 toggle_Monoff.tmax 122 bit RO FALSE toggle_Monoff.tmax-increased 122 u32 RW 0x00000002 toggle_Ppaures.debounce 122 s32 RW 2648 toggle_Ppaures.tmax 122 bit RO FALSE toggle_Ppaures.tmax-increased 122 u32 RW 0x00000002 toggle_SPLonoff.debounce 122 s32 RW 4185 toggle_SPLonoff.tmax 122 bit RO FALSE toggle_SPLonoff.tmax-increased 29 u32 RO 0x00000000 traj.active_tc 29 float RO 0 traj.pos_out 29 float RO 0 traj.vel_out Parameter Aliases: Alias Original Name hm2_7i92.0.pwmgen.00.enable.invert_output hm2_7i92.0.gpio.009.invert_output hm2_7i92.0.pwmgen.00.enable.is_opendrain hm2_7i92.0.gpio.009.is_opendrain hm2_7i92.0.pwmgen.00.out0.invert_output hm2_7i92.0.gpio.008.invert_output hm2_7i92.0.pwmgen.00.out0.is_opendrain hm2_7i92.0.gpio.008.is_opendrain hm2_7i92.0.pwmgen.00.out1.invert_output hm2_7i92.0.gpio.010.invert_output hm2_7i92.0.pwmgen.00.out1.is_opendrain hm2_7i92.0.gpio.010.is_opendrain hm2_7i92.0.sserial.00.tx0.invert_output hm2_7i92.0.gpio.011.invert_output hm2_7i92.0.sserial.00.tx0.is_opendrain hm2_7i92.0.gpio.011.is_opendrain hm2_7i92.0.sserial.00.txen0.invert_output hm2_7i92.0.gpio.012.invert_output hm2_7i92.0.sserial.00.txen0.is_opendrain hm2_7i92.0.gpio.012.is_opendrain hm2_7i92.0.stepgen.00.direction.invert_output hm2_7i92.0.gpio.000.invert_output hm2_7i92.0.stepgen.00.direction.is_opendrain hm2_7i92.0.gpio.000.is_opendrain hm2_7i92.0.stepgen.00.step.invert_output hm2_7i92.0.gpio.001.invert_output hm2_7i92.0.stepgen.00.step.is_opendrain hm2_7i92.0.gpio.001.is_opendrain hm2_7i92.0.stepgen.01.direction.invert_output hm2_7i92.0.gpio.002.invert_output hm2_7i92.0.stepgen.01.direction.is_opendrain hm2_7i92.0.gpio.002.is_opendrain hm2_7i92.0.stepgen.01.step.invert_output hm2_7i92.0.gpio.003.invert_output hm2_7i92.0.stepgen.01.step.is_opendrain hm2_7i92.0.gpio.003.is_opendrain hm2_7i92.0.stepgen.02.direction.invert_output hm2_7i92.0.gpio.004.invert_output hm2_7i92.0.stepgen.02.direction.is_opendrain hm2_7i92.0.gpio.004.is_opendrain hm2_7i92.0.stepgen.02.step.invert_output hm2_7i92.0.gpio.005.invert_output hm2_7i92.0.stepgen.02.step.is_opendrain hm2_7i92.0.gpio.005.is_opendrain Exported Functions: Owner CodeAddr Arg FP Users Name 00080 7f963c7e64 7f968f9470 YES 1 abs.0 00074 7f963eddb4 7f968f9400 NO 1 and2.0 00113 7f963a0eb4 7f968fa380 YES 1 conv_float_s32.feedOV 00113 7f963a0eb4 7f968fa350 YES 1 conv_float_s32.spindel 00042 7f96486ae4 7f968f8f50 NO 1 debounce.0 00116 7f9638de3c 7f968fa3f0 YES 1 encoder.capture-position 00116 7f9638dc44 7f968fa3f0 NO 1 encoder.update-counters 00036 7f964cd89c 5591a238d0 YES 1 hm2_7i92.0.read 00036 7f964cd808 5591a238d0 YES 0 hm2_7i92.0.read-request 00036 7f964cd6b0 5591a238d0 YES 1 hm2_7i92.0.write 00135 7f9632ee64 7f968faf10 YES 1 ilowpass.mpgX 00135 7f9632ee64 7f968faf40 YES 1 ilowpass.mpgZ 00128 7f96341d5c 7f968fa8e0 YES 1 kb_5x4 00128 7f96341d5c 7f968fa840 YES 1 kb_7i73 00110 7f963b488c 7f968fa150 YES 1 lcd 00029 7f9661b7d0 00000000 YES 1 motion-command-handler 00029 7f9661e9a4 00000000 YES 1 motion-controller 00119 7f9637aef4 7f968fa630 YES 1 mux4.0 00071 7f96400d34 7f968f93d0 NO 1 not.0 00077 7f963dae54 7f968f9430 YES 0 offset.0.update-feedback 00077 7f963dae80 7f968f9430 YES 1 offset.0.update-output 00068 7f96413db4 7f968f93a0 NO 1 or2.0 00039 7f96499dc8 7f968f89a0 YES 1 pid.x.do-pid-calcs 00039 7f96499dc8 7f968f8b40 YES 1 pid.z.do-pid-calcs 00059 7f9644de64 7f968f9280 YES 1 spindle-active-delay 00056 7f96460eb4 7f968f9220 YES 1 spindle-at-pos 00056 7f96460eb4 7f968f91f0 YES 1 spindle-at-speed 00062 7f96439fe4 7f968f92e0 YES 1 spindle-orient 00039 7f96499dc8 7f968f8ce0 YES 1 spindle-pid.do-pid-calcs 00065 7f96426e14 7f968f9350 YES 1 spindle-pwm-switch 00053 7f96473ea4 7f968f9180 YES 1 spindle-ramp 00125 7f96354e04 7f968fa780 NO 1 toggle2nist_Monoff 00125 7f96354e04 7f968fa7b0 NO 1 toggle2nist_Ppaures 00125 7f96354e04 7f968fa750 NO 1 toggle2nist_SPLonoff 00122 7f96367e14 7f968fa6b0 NO 1 toggle_Monoff 00122 7f96367e14 7f968fa6e0 NO 1 toggle_Ppaures 00122 7f96367e14 7f968fa680 NO 1 toggle_SPLonoff Realtime Threads: Period FP Name ( Time, Max-Time ) 2000000 YES servo-thread ( 360555, 1988315 ) 1 hm2_7i92.0.read 2 motion-command-handler 3 motion-controller 4 pid.x.do-pid-calcs 5 pid.z.do-pid-calcs 6 hm2_7i92.0.write 7 debounce.0 8 spindle-ramp 9 spindle-at-speed 10 spindle-at-pos 11 spindle-active-delay 12 spindle-orient 13 spindle-pid.do-pid-calcs 14 spindle-pwm-switch 15 or2.0 16 not.0 17 and2.0 18 offset.0.update-output 19 abs.0 20 lcd 21 conv_float_s32.spindel 22 conv_float_s32.feedOV 23 encoder.capture-position 24 encoder.update-counters 25 mux4.0 26 toggle_SPLonoff 27 toggle_Monoff 28 toggle_Ppaures 29 toggle2nist_SPLonoff 30 toggle2nist_Monoff 31 toggle2nist_Ppaures 32 kb_7i73 33 kb_5x4 34 ilowpass.mpgX 35 ilowpass.mpgZ