mesaflash --device 7i96 --addr 10.10.10.10 --verify 7i96_7i85ssdid.bit Checking file... OK File type: Xilinx bit file Boot sector OK Verifying FLASH memory sectors starting from 0x100000... |VVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVV Board FLASH memory verified successfully. BoardName : MESA7I96 Modules in configuration: There are 1 of DPLL in configuration There are 1 of WatchDog in configuration There are 3 of IOPort in configuration There are 1 of PWM in configuration There are 7 of StepGen in configuration There are 6 of MuxedQCount in configuration There are 1 of MuxedQCountSel in configuration There are 1 of SSerial in configuration There are 1 of SSR in configuration There are 1 of LED in configuration IO Connections for TB3 -> 7I96_0 Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir TB3-1 0 IOPort None TB3-2 1 IOPort None TB3-3 2 IOPort None TB3-4 3 IOPort None TB3-5 4 IOPort None TB3-6 5 IOPort None TB3-7 6 IOPort None TB3-8 7 IOPort None TB3-9 8 IOPort None TB3-10 9 IOPort None TB3-11 10 IOPort None TB3-13,14 11 IOPort SSR 0 Out-00 (Out) TB3-15,16 12 IOPort SSR 0 Out-01 (Out) TB3-17,18 13 IOPort SSR 0 Out-02 (Out) TB3-19,20 14 IOPort SSR 0 Out-03 (Out) TB3-21,22 15 IOPort SSR 0 Out-04 (Out) TB3-23,24 16 IOPort SSR 0 Out-05 (Out) IO Connections for TB1/TB2 -> 7I96_1 Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir TB1-2,3 17 IOPort StepGen 0 Step/Table1 (Out) TB1-4,5 18 IOPort StepGen 0 Dir/Table2 (Out) TB1-8,9 19 IOPort StepGen 1 Step/Table1 (Out) TB1-10,11 20 IOPort StepGen 1 Dir/Table2 (Out) TB1-14,15 21 IOPort StepGen 2 Step/Table1 (Out) TB1-16,17 22 IOPort StepGen 2 Dir/Table2 (Out) TB1-20,21 23 IOPort StepGen 3 Step/Table1 (Out) TB1-22,23 24 IOPort StepGen 3 Dir/Table2 (Out) TB2-2,3 25 IOPort StepGen 4 Step/Table1 (Out) TB2-4,5 26 IOPort StepGen 4 Dir/Table2 (Out) TB2-7,8 27 IOPort MuxedQCount 2 MuxQ-A (In) TB2-10,11 28 IOPort MuxedQCount 2 MuxQ-B (In) TB2-13,14 29 IOPort MuxedQCount 2 MuxQ-IDX (In) TB2-16,17 30 IOPort SSerial 0 RXData0 (In) TB2-18,19 31 IOPort SSerial 0 TXData0 (Out) Internal-TXEn 32 IOPort SSerial 0 TXEn0 (Out) Internal 33 IOPort SSR 0 AC Ref (Out) IO Connections for P1 -> 7I96_2 (7i85 Encoders ) Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir P1-01/DB25-01 34 IOPort SSerial 0 RXData1 (In) P1-02/DB25-14 35 IOPort SSerial 0 TXData1 (Out) P1-03/DB25-02 36 IOPort None P1-04/DB25-15 37 IOPort None P1-05/DB25-03 38 IOPort None P1-06/DB25-16 39 IOPort None P1-07/DB25-04 40 IOPort StepGen 6 Step/Table1 (Out) P1-08/DB25-17 41 IOPort StepGen 6 Dir/Table2 (Out) P1-09/DB25-05 42 IOPort StepGen 5 Step/Table1 (Out) P1-11/DB25-06 43 IOPort StepGen 5 Dir/Table2 (Out) P1-13/DB25-07 44 IOPort MuxedQCountSel 0 MuxSel0 (Out) P1-15/DB25-08 45 IOPort MuxedQCount 0 MuxQ-A (In) P1-17/DB25-09 46 IOPort MuxedQCount 0 MuxQ-B (In) P1-19/DB25-10 47 IOPort MuxedQCount 0 Shared-IDX (In) P1-21/DB25-11 48 IOPort MuxedQCount 1 MuxQ-A (In) P1-23/DB25-12 49 IOPort MuxedQCount 1 MuxQ-B (In) P1-25/DB25-13 50 IOPort MuxedQCount 1 Shared-IDX (In)