~ $ halrun halcmd: loadrt :1: loadrt requires at least 1 arguments, 0 given halcmd: loadrt hostmot2 Note: Using POSIX realtime hm2: loading Mesa HostMot2 driver version 0.15 halcmd: loadrt hm2_pci hm2_pci: loading Mesa AnyIO HostMot2 driver version 0.7 hm2_pci: discovered 5i25 at 0000:03:00.0 hm2/hm2_5i25.0: Low Level init 0.15 hm2/hm2_5i25.0: Smart Serial Firmware Version 38 Board hm2_5i25.0.7i84.0.0 Hardware Mode 0 = standard Board hm2_5i25.0.7i84.0.0 Software Mode 0 = input_output Board hm2_5i25.0.7i84.0.0 Software Mode 1 = io_analog_fieldvoltage Board hm2_5i25.0.7i84.0.0 Software Mode 2 = io_encoder_analog hm2/hm2_5i25.0: 34 I/O Pins used: hm2/hm2_5i25.0: IO Pin 000 (P3-01): Smart Serial Interface #0, pin rx0 (Input) hm2/hm2_5i25.0: IO Pin 001 (P3-14): Smart Serial Interface #0, pin tx0 (Output) hm2/hm2_5i25.0: IO Pin 002 (P3-02): StepGen #3, pin Step (Output) hm2/hm2_5i25.0: IO Pin 003 (P3-15): StepGen #3, pin Direction (Output) hm2/hm2_5i25.0: IO Pin 004 (P3-03): StepGen #2, pin Step (Output) hm2/hm2_5i25.0: IO Pin 005 (P3-16): StepGen #2, pin Direction (Output) hm2/hm2_5i25.0: IO Pin 006 (P3-04): StepGen #1, pin Step (Output) hm2/hm2_5i25.0: IO Pin 007 (P3-17): StepGen #1, pin Direction (Output) hm2/hm2_5i25.0: IO Pin 008 (P3-05): StepGen #0, pin Step (Output) hm2/hm2_5i25.0: IO Pin 009 (P3-06): StepGen #0, pin Direction (Output) hm2/hm2_5i25.0: IO Pin 010 (P3-07): Muxed Encoder Select #0, pin Mux Select 0 (Output) hm2/hm2_5i25.0: IO Pin 011 (P3-08): Muxed Encoder #0, pin Muxed A (Input) hm2/hm2_5i25.0: IO Pin 012 (P3-09): Muxed Encoder #0, pin Muxed B (Input) hm2/hm2_5i25.0: IO Pin 013 (P3-10): Muxed Encoder #0, pin Muxed Index (Input) hm2/hm2_5i25.0: IO Pin 014 (P3-11): Muxed Encoder #1, pin Muxed A (Input) hm2/hm2_5i25.0: IO Pin 015 (P3-12): Muxed Encoder #1, pin Muxed B (Input) hm2/hm2_5i25.0: IO Pin 016 (P3-13): Muxed Encoder #1, pin Muxed Index (Input) hm2/hm2_5i25.0: IO Pin 017 (P2-01): IOPort hm2/hm2_5i25.0: IO Pin 018 (P2-14): IOPort hm2/hm2_5i25.0: IO Pin 019 (P2-02): StepGen #7, pin Step (Output) hm2/hm2_5i25.0: IO Pin 020 (P2-15): StepGen #7, pin Direction (Output) hm2/hm2_5i25.0: IO Pin 021 (P2-03): StepGen #6, pin Step (Output) hm2/hm2_5i25.0: IO Pin 022 (P2-16): StepGen #6, pin Direction (Output) hm2/hm2_5i25.0: IO Pin 023 (P2-04): StepGen #5, pin Step (Output) hm2/hm2_5i25.0: IO Pin 024 (P2-17): StepGen #5, pin Direction (Output) hm2/hm2_5i25.0: IO Pin 025 (P2-05): StepGen #4, pin Step (Output) hm2/hm2_5i25.0: IO Pin 026 (P2-06): StepGen #4, pin Direction (Output) hm2/hm2_5i25.0: IO Pin 027 (P2-07): Muxed Encoder Select #4, pin Mux Select 0 (Output) hm2/hm2_5i25.0: IO Pin 028 (P2-08): Muxed Encoder #2, pin Muxed A (Input) hm2/hm2_5i25.0: IO Pin 029 (P2-09): Muxed Encoder #2, pin Muxed B (Input) hm2/hm2_5i25.0: IO Pin 030 (P2-10): Muxed Encoder #2, pin Muxed Index (Input) hm2/hm2_5i25.0: IO Pin 031 (P2-11): Muxed Encoder #3, pin Muxed A (Input) hm2/hm2_5i25.0: IO Pin 032 (P2-12): Muxed Encoder #3, pin Muxed B (Input) hm2/hm2_5i25.0: IO Pin 033 (P2-13): Muxed Encoder #3, pin Muxed Index (Input) hm2/hm2_5i25.0: registered hm2_5i25.0: initialized AnyIO board at 0000:03:00.0 halcmd: show pin Component Pins: Owner Type Dir Value Name 7 s32 OUT 0 hm2_5i25.0.0.debug 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-00 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-00-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-01 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-01-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-02 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-02-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-03 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-03-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-04 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-04-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-05 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-05-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-06 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-06-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-07 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-07-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-08 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-08-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-09 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-09-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-10 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-10-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-11 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-11-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-12 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-12-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-13 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-13-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-14 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-14-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-15 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-15-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-16 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-16-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-17 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-17-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-18 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-18-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-19 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-19-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-20 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-20-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-21 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-21-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-22 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-22-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-23 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-23-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-24 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-24-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-25 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-25-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-26 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-26-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-27 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-27-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-28 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-28-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-29 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-29-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-30 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-30-not 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-31 7 bit OUT FALSE hm2_5i25.0.7i84.0.0.input-31-not 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-00 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-01 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-02 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-03 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-04 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-05 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-06 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-07 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-08 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-09 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-10 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-11 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-12 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-13 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-14 7 bit IN FALSE hm2_5i25.0.7i84.0.0.output-15 7 s32 OUT 0 hm2_5i25.0.encoder.00.count 7 s32 OUT 0 hm2_5i25.0.encoder.00.count-latched 7 bit I/O FALSE hm2_5i25.0.encoder.00.index-enable 7 bit OUT TRUE hm2_5i25.0.encoder.00.input-a 7 bit OUT FALSE hm2_5i25.0.encoder.00.input-b 7 bit OUT FALSE hm2_5i25.0.encoder.00.input-index 7 bit IN FALSE hm2_5i25.0.encoder.00.latch-enable 7 bit IN FALSE hm2_5i25.0.encoder.00.latch-polarity 7 float OUT 0 hm2_5i25.0.encoder.00.position 7 float OUT 0 hm2_5i25.0.encoder.00.position-latched 7 bit OUT FALSE hm2_5i25.0.encoder.00.quad-error 7 bit IN FALSE hm2_5i25.0.encoder.00.quad-error-enable 7 s32 OUT 1 hm2_5i25.0.encoder.00.rawcounts 7 s32 OUT 1 hm2_5i25.0.encoder.00.rawlatch 7 bit IN FALSE hm2_5i25.0.encoder.00.reset 7 float OUT 0 hm2_5i25.0.encoder.00.velocity 7 float OUT 0 hm2_5i25.0.encoder.00.velocity-rpm 7 s32 OUT 0 hm2_5i25.0.encoder.01.count 7 s32 OUT 0 hm2_5i25.0.encoder.01.count-latched 7 bit I/O FALSE hm2_5i25.0.encoder.01.index-enable 7 bit OUT TRUE hm2_5i25.0.encoder.01.input-a 7 bit OUT FALSE hm2_5i25.0.encoder.01.input-b 7 bit OUT TRUE hm2_5i25.0.encoder.01.input-index 7 bit IN FALSE hm2_5i25.0.encoder.01.latch-enable 7 bit IN FALSE hm2_5i25.0.encoder.01.latch-polarity 7 float OUT 0 hm2_5i25.0.encoder.01.position 7 float OUT 0 hm2_5i25.0.encoder.01.position-latched 7 bit OUT FALSE hm2_5i25.0.encoder.01.quad-error 7 bit IN FALSE hm2_5i25.0.encoder.01.quad-error-enable 7 s32 OUT 1 hm2_5i25.0.encoder.01.rawcounts 7 s32 OUT 1 hm2_5i25.0.encoder.01.rawlatch 7 bit IN FALSE hm2_5i25.0.encoder.01.reset 7 float OUT 0 hm2_5i25.0.encoder.01.velocity 7 float OUT 0 hm2_5i25.0.encoder.01.velocity-rpm 7 s32 OUT 0 hm2_5i25.0.encoder.02.count 7 s32 OUT 0 hm2_5i25.0.encoder.02.count-latched 7 bit I/O FALSE hm2_5i25.0.encoder.02.index-enable 7 bit OUT TRUE hm2_5i25.0.encoder.02.input-a 7 bit OUT FALSE hm2_5i25.0.encoder.02.input-b 7 bit OUT FALSE hm2_5i25.0.encoder.02.input-index 7 bit IN FALSE hm2_5i25.0.encoder.02.latch-enable 7 bit IN FALSE hm2_5i25.0.encoder.02.latch-polarity 7 float OUT 0 hm2_5i25.0.encoder.02.position 7 float OUT 0 hm2_5i25.0.encoder.02.position-latched 7 bit OUT FALSE hm2_5i25.0.encoder.02.quad-error 7 bit IN FALSE hm2_5i25.0.encoder.02.quad-error-enable 7 s32 OUT 1 hm2_5i25.0.encoder.02.rawcounts 7 s32 OUT 1 hm2_5i25.0.encoder.02.rawlatch 7 bit IN FALSE hm2_5i25.0.encoder.02.reset 7 float OUT 0 hm2_5i25.0.encoder.02.velocity 7 float OUT 0 hm2_5i25.0.encoder.02.velocity-rpm 7 s32 OUT 0 hm2_5i25.0.encoder.03.count 7 s32 OUT 0 hm2_5i25.0.encoder.03.count-latched 7 bit I/O FALSE hm2_5i25.0.encoder.03.index-enable 7 bit OUT FALSE hm2_5i25.0.encoder.03.input-a 7 bit OUT FALSE hm2_5i25.0.encoder.03.input-b 7 bit OUT TRUE hm2_5i25.0.encoder.03.input-index 7 bit IN FALSE hm2_5i25.0.encoder.03.latch-enable 7 bit IN FALSE hm2_5i25.0.encoder.03.latch-polarity 7 float OUT 0 hm2_5i25.0.encoder.03.position 7 float OUT 0 hm2_5i25.0.encoder.03.position-latched 7 bit OUT FALSE hm2_5i25.0.encoder.03.quad-error 7 bit IN FALSE hm2_5i25.0.encoder.03.quad-error-enable 7 s32 OUT 0 hm2_5i25.0.encoder.03.rawcounts 7 s32 OUT 0 hm2_5i25.0.encoder.03.rawlatch 7 bit IN FALSE hm2_5i25.0.encoder.03.reset 7 float OUT 0 hm2_5i25.0.encoder.03.velocity 7 float OUT 0 hm2_5i25.0.encoder.03.velocity-rpm 7 s32 OUT 0 hm2_5i25.0.encoder.04.count 7 s32 OUT 0 hm2_5i25.0.encoder.04.count-latched 7 bit I/O FALSE hm2_5i25.0.encoder.04.index-enable 7 bit OUT TRUE hm2_5i25.0.encoder.04.input-a 7 bit OUT TRUE hm2_5i25.0.encoder.04.input-b 7 bit OUT FALSE hm2_5i25.0.encoder.04.input-index 7 bit IN FALSE hm2_5i25.0.encoder.04.latch-enable 7 bit IN FALSE hm2_5i25.0.encoder.04.latch-polarity 7 float OUT 0 hm2_5i25.0.encoder.04.position 7 float OUT 0 hm2_5i25.0.encoder.04.position-latched 7 bit OUT FALSE hm2_5i25.0.encoder.04.quad-error 7 bit IN FALSE hm2_5i25.0.encoder.04.quad-error-enable 7 s32 OUT 0 hm2_5i25.0.encoder.04.rawcounts 7 s32 OUT 0 hm2_5i25.0.encoder.04.rawlatch 7 bit IN FALSE hm2_5i25.0.encoder.04.reset 7 float OUT 0 hm2_5i25.0.encoder.04.velocity 7 float OUT 0 hm2_5i25.0.encoder.04.velocity-rpm 7 s32 OUT 0 hm2_5i25.0.encoder.05.count 7 s32 OUT 0 hm2_5i25.0.encoder.05.count-latched 7 bit I/O FALSE hm2_5i25.0.encoder.05.index-enable 7 bit OUT TRUE hm2_5i25.0.encoder.05.input-a 7 bit OUT TRUE hm2_5i25.0.encoder.05.input-b 7 bit OUT FALSE hm2_5i25.0.encoder.05.input-index 7 bit IN FALSE hm2_5i25.0.encoder.05.latch-enable 7 bit IN FALSE hm2_5i25.0.encoder.05.latch-polarity 7 float OUT 0 hm2_5i25.0.encoder.05.position 7 float OUT 0 hm2_5i25.0.encoder.05.position-latched 7 bit OUT FALSE hm2_5i25.0.encoder.05.quad-error 7 bit IN FALSE hm2_5i25.0.encoder.05.quad-error-enable 7 s32 OUT 0 hm2_5i25.0.encoder.05.rawcounts 7 s32 OUT 0 hm2_5i25.0.encoder.05.rawlatch 7 bit IN FALSE hm2_5i25.0.encoder.05.reset 7 float OUT 0 hm2_5i25.0.encoder.05.velocity 7 float OUT 0 hm2_5i25.0.encoder.05.velocity-rpm 7 s32 OUT 0 hm2_5i25.0.encoder.06.count 7 s32 OUT 0 hm2_5i25.0.encoder.06.count-latched 7 bit I/O FALSE hm2_5i25.0.encoder.06.index-enable 7 bit OUT TRUE hm2_5i25.0.encoder.06.input-a 7 bit OUT TRUE hm2_5i25.0.encoder.06.input-b 7 bit OUT FALSE hm2_5i25.0.encoder.06.input-index 7 bit IN FALSE hm2_5i25.0.encoder.06.latch-enable 7 bit IN FALSE hm2_5i25.0.encoder.06.latch-polarity 7 float OUT 0 hm2_5i25.0.encoder.06.position 7 float OUT 0 hm2_5i25.0.encoder.06.position-latched 7 bit OUT FALSE hm2_5i25.0.encoder.06.quad-error 7 bit IN FALSE hm2_5i25.0.encoder.06.quad-error-enable 7 s32 OUT 0 hm2_5i25.0.encoder.06.rawcounts 7 s32 OUT 0 hm2_5i25.0.encoder.06.rawlatch 7 bit IN FALSE hm2_5i25.0.encoder.06.reset 7 float OUT 0 hm2_5i25.0.encoder.06.velocity 7 float OUT 0 hm2_5i25.0.encoder.06.velocity-rpm 7 s32 OUT 0 hm2_5i25.0.encoder.07.count 7 s32 OUT 0 hm2_5i25.0.encoder.07.count-latched 7 bit I/O FALSE hm2_5i25.0.encoder.07.index-enable 7 bit OUT TRUE hm2_5i25.0.encoder.07.input-a 7 bit OUT TRUE hm2_5i25.0.encoder.07.input-b 7 bit OUT FALSE hm2_5i25.0.encoder.07.input-index 7 bit IN FALSE hm2_5i25.0.encoder.07.latch-enable 7 bit IN FALSE hm2_5i25.0.encoder.07.latch-polarity 7 float OUT 0 hm2_5i25.0.encoder.07.position 7 float OUT 0 hm2_5i25.0.encoder.07.position-latched 7 bit OUT FALSE hm2_5i25.0.encoder.07.quad-error 7 bit IN FALSE hm2_5i25.0.encoder.07.quad-error-enable 7 s32 OUT 0 hm2_5i25.0.encoder.07.rawcounts 7 s32 OUT 0 hm2_5i25.0.encoder.07.rawlatch 7 bit IN FALSE hm2_5i25.0.encoder.07.reset 7 float OUT 0 hm2_5i25.0.encoder.07.velocity 7 float OUT 0 hm2_5i25.0.encoder.07.velocity-rpm 7 bit IN FALSE hm2_5i25.0.encoder.hires-timestamp 7 u32 IN 0x007F2815 hm2_5i25.0.encoder.muxed-sample-frequency 7 bit OUT TRUE hm2_5i25.0.gpio.000.in 7 bit OUT FALSE hm2_5i25.0.gpio.000.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.001.in 7 bit OUT FALSE hm2_5i25.0.gpio.001.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.002.in 7 bit OUT FALSE hm2_5i25.0.gpio.002.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.003.in 7 bit OUT FALSE hm2_5i25.0.gpio.003.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.004.in 7 bit OUT FALSE hm2_5i25.0.gpio.004.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.005.in 7 bit OUT FALSE hm2_5i25.0.gpio.005.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.006.in 7 bit OUT FALSE hm2_5i25.0.gpio.006.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.007.in 7 bit OUT FALSE hm2_5i25.0.gpio.007.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.008.in 7 bit OUT FALSE hm2_5i25.0.gpio.008.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.009.in 7 bit OUT FALSE hm2_5i25.0.gpio.009.in_not 7 bit OUT FALSE hm2_5i25.0.gpio.010.in 7 bit OUT TRUE hm2_5i25.0.gpio.010.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.011.in 7 bit OUT FALSE hm2_5i25.0.gpio.011.in_not 7 bit OUT FALSE hm2_5i25.0.gpio.012.in 7 bit OUT TRUE hm2_5i25.0.gpio.012.in_not 7 bit OUT FALSE hm2_5i25.0.gpio.013.in 7 bit OUT TRUE hm2_5i25.0.gpio.013.in_not 7 bit OUT FALSE hm2_5i25.0.gpio.014.in 7 bit OUT TRUE hm2_5i25.0.gpio.014.in_not 7 bit OUT FALSE hm2_5i25.0.gpio.015.in 7 bit OUT TRUE hm2_5i25.0.gpio.015.in_not 7 bit OUT FALSE hm2_5i25.0.gpio.016.in 7 bit OUT TRUE hm2_5i25.0.gpio.016.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.017.in 7 bit OUT FALSE hm2_5i25.0.gpio.017.in_not 7 bit IN FALSE hm2_5i25.0.gpio.017.out 7 bit OUT TRUE hm2_5i25.0.gpio.018.in 7 bit OUT FALSE hm2_5i25.0.gpio.018.in_not 7 bit IN FALSE hm2_5i25.0.gpio.018.out 7 bit OUT TRUE hm2_5i25.0.gpio.019.in 7 bit OUT FALSE hm2_5i25.0.gpio.019.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.020.in 7 bit OUT FALSE hm2_5i25.0.gpio.020.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.021.in 7 bit OUT FALSE hm2_5i25.0.gpio.021.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.022.in 7 bit OUT FALSE hm2_5i25.0.gpio.022.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.023.in 7 bit OUT FALSE hm2_5i25.0.gpio.023.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.024.in 7 bit OUT FALSE hm2_5i25.0.gpio.024.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.025.in 7 bit OUT FALSE hm2_5i25.0.gpio.025.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.026.in 7 bit OUT FALSE hm2_5i25.0.gpio.026.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.027.in 7 bit OUT FALSE hm2_5i25.0.gpio.027.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.028.in 7 bit OUT FALSE hm2_5i25.0.gpio.028.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.029.in 7 bit OUT FALSE hm2_5i25.0.gpio.029.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.030.in 7 bit OUT FALSE hm2_5i25.0.gpio.030.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.031.in 7 bit OUT FALSE hm2_5i25.0.gpio.031.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.032.in 7 bit OUT FALSE hm2_5i25.0.gpio.032.in_not 7 bit OUT TRUE hm2_5i25.0.gpio.033.in 7 bit OUT FALSE hm2_5i25.0.gpio.033.in_not 7 bit IN FALSE hm2_5i25.0.led.CR01 7 bit IN FALSE hm2_5i25.0.led.CR02 7 s32 OUT 0 hm2_5i25.0.read.time 7 s32 OUT 0 hm2_5i25.0.read_gpio.time 7 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.fault-count 7 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.port_state 7 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.port_state2 7 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.port_state3 7 bit IN TRUE hm2_5i25.0.sserial.port-0.run 7 bit IN FALSE hm2_5i25.0.stepgen.00.control-type 7 s32 OUT 0 hm2_5i25.0.stepgen.00.counts 7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_err_at_match 7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_ff_vel 7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_pos_minus_prev_cmd 7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_s_to_match 7 s32 OUT 0 hm2_5i25.0.stepgen.00.dbg_step_rate 7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_vel_error 7 bit IN FALSE hm2_5i25.0.stepgen.00.enable 7 float IN 0 hm2_5i25.0.stepgen.00.position-cmd 7 float OUT 0 hm2_5i25.0.stepgen.00.position-fb 7 float IN 0 hm2_5i25.0.stepgen.00.velocity-cmd 7 float OUT 0 hm2_5i25.0.stepgen.00.velocity-fb 7 bit IN FALSE hm2_5i25.0.stepgen.01.control-type 7 s32 OUT 0 hm2_5i25.0.stepgen.01.counts 7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_err_at_match 7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_ff_vel 7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_pos_minus_prev_cmd 7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_s_to_match 7 s32 OUT 0 hm2_5i25.0.stepgen.01.dbg_step_rate 7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_vel_error 7 bit IN FALSE hm2_5i25.0.stepgen.01.enable 7 float IN 0 hm2_5i25.0.stepgen.01.position-cmd 7 float OUT 0 hm2_5i25.0.stepgen.01.position-fb 7 float IN 0 hm2_5i25.0.stepgen.01.velocity-cmd 7 float OUT 0 hm2_5i25.0.stepgen.01.velocity-fb 7 bit IN FALSE hm2_5i25.0.stepgen.02.control-type 7 s32 OUT 0 hm2_5i25.0.stepgen.02.counts 7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_err_at_match 7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_ff_vel 7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_pos_minus_prev_cmd 7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_s_to_match 7 s32 OUT 0 hm2_5i25.0.stepgen.02.dbg_step_rate 7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_vel_error 7 bit IN FALSE hm2_5i25.0.stepgen.02.enable 7 float IN 0 hm2_5i25.0.stepgen.02.position-cmd 7 float OUT 0 hm2_5i25.0.stepgen.02.position-fb 7 float IN 0 hm2_5i25.0.stepgen.02.velocity-cmd 7 float OUT 0 hm2_5i25.0.stepgen.02.velocity-fb 7 bit IN FALSE hm2_5i25.0.stepgen.03.control-type 7 s32 OUT 0 hm2_5i25.0.stepgen.03.counts 7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_err_at_match 7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_ff_vel 7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_pos_minus_prev_cmd 7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_s_to_match 7 s32 OUT 0 hm2_5i25.0.stepgen.03.dbg_step_rate 7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_vel_error 7 bit IN FALSE hm2_5i25.0.stepgen.03.enable 7 float IN 0 hm2_5i25.0.stepgen.03.position-cmd 7 float OUT 0 hm2_5i25.0.stepgen.03.position-fb 7 float IN 0 hm2_5i25.0.stepgen.03.velocity-cmd 7 float OUT 0 hm2_5i25.0.stepgen.03.velocity-fb 7 bit IN FALSE hm2_5i25.0.stepgen.04.control-type 7 s32 OUT 0 hm2_5i25.0.stepgen.04.counts 7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_err_at_match 7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_ff_vel 7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_pos_minus_prev_cmd 7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_s_to_match 7 s32 OUT 0 hm2_5i25.0.stepgen.04.dbg_step_rate 7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_vel_error 7 bit IN FALSE hm2_5i25.0.stepgen.04.enable 7 float IN 0 hm2_5i25.0.stepgen.04.position-cmd 7 float OUT 0 hm2_5i25.0.stepgen.04.position-fb 7 float IN 0 hm2_5i25.0.stepgen.04.velocity-cmd 7 float OUT 0 hm2_5i25.0.stepgen.04.velocity-fb 7 bit IN FALSE hm2_5i25.0.stepgen.05.control-type 7 s32 OUT 0 hm2_5i25.0.stepgen.05.counts 7 float OUT 0 hm2_5i25.0.stepgen.05.dbg_err_at_match 7 float OUT 0 hm2_5i25.0.stepgen.05.dbg_ff_vel 7 float OUT 0 hm2_5i25.0.stepgen.05.dbg_pos_minus_prev_cmd 7 float OUT 0 hm2_5i25.0.stepgen.05.dbg_s_to_match 7 s32 OUT 0 hm2_5i25.0.stepgen.05.dbg_step_rate 7 float OUT 0 hm2_5i25.0.stepgen.05.dbg_vel_error 7 bit IN FALSE hm2_5i25.0.stepgen.05.enable 7 float IN 0 hm2_5i25.0.stepgen.05.position-cmd 7 float OUT 0 hm2_5i25.0.stepgen.05.position-fb 7 float IN 0 hm2_5i25.0.stepgen.05.velocity-cmd 7 float OUT 0 hm2_5i25.0.stepgen.05.velocity-fb 7 bit IN FALSE hm2_5i25.0.stepgen.06.control-type 7 s32 OUT 0 hm2_5i25.0.stepgen.06.counts 7 float OUT 0 hm2_5i25.0.stepgen.06.dbg_err_at_match 7 float OUT 0 hm2_5i25.0.stepgen.06.dbg_ff_vel 7 float OUT 0 hm2_5i25.0.stepgen.06.dbg_pos_minus_prev_cmd 7 float OUT 0 hm2_5i25.0.stepgen.06.dbg_s_to_match 7 s32 OUT 0 hm2_5i25.0.stepgen.06.dbg_step_rate 7 float OUT 0 hm2_5i25.0.stepgen.06.dbg_vel_error 7 bit IN FALSE hm2_5i25.0.stepgen.06.enable 7 float IN 0 hm2_5i25.0.stepgen.06.position-cmd 7 float OUT 0 hm2_5i25.0.stepgen.06.position-fb 7 float IN 0 hm2_5i25.0.stepgen.06.velocity-cmd 7 float OUT 0 hm2_5i25.0.stepgen.06.velocity-fb 7 bit IN FALSE hm2_5i25.0.stepgen.07.control-type 7 s32 OUT 0 hm2_5i25.0.stepgen.07.counts 7 float OUT 0 hm2_5i25.0.stepgen.07.dbg_err_at_match 7 float OUT 0 hm2_5i25.0.stepgen.07.dbg_ff_vel 7 float OUT 0 hm2_5i25.0.stepgen.07.dbg_pos_minus_prev_cmd 7 float OUT 0 hm2_5i25.0.stepgen.07.dbg_s_to_match 7 s32 OUT 0 hm2_5i25.0.stepgen.07.dbg_step_rate 7 float OUT 0 hm2_5i25.0.stepgen.07.dbg_vel_error 7 bit IN FALSE hm2_5i25.0.stepgen.07.enable 7 float IN 0 hm2_5i25.0.stepgen.07.position-cmd 7 float OUT 0 hm2_5i25.0.stepgen.07.position-fb 7 float IN 0 hm2_5i25.0.stepgen.07.velocity-cmd 7 float OUT 0 hm2_5i25.0.stepgen.07.velocity-fb 7 bit I/O FALSE hm2_5i25.0.watchdog.has_bit 7 s32 OUT 0 hm2_5i25.0.write.time 7 s32 OUT 0 hm2_5i25.0.write_gpio.time halcmd: show param Parameters: Owner Type Dir Value Name 7 u32 RO 0x000000AD hm2_5i25.0.7i84.0.0.analogin0 7 u32 RO 0x000000AD hm2_5i25.0.7i84.0.0.analogin1 7 u32 RO 0x000000AC hm2_5i25.0.7i84.0.0.analogin2 7 u32 RO 0x000000AD hm2_5i25.0.7i84.0.0.analogin3 7 u32 RO 0x00000000 hm2_5i25.0.7i84.0.0.encmode0 7 u32 RO 0x00000000 hm2_5i25.0.7i84.0.0.encmode1 7 u32 RO 0x0000AB80 hm2_5i25.0.7i84.0.0.fieldvoltagea 7 u32 RO 0x0000AD40 hm2_5i25.0.7i84.0.0.fieldvoltageb 7 u32 RO 0x00000001 hm2_5i25.0.7i84.0.0.hwrevision 7 u32 RW 0x00000009 hm2_5i25.0.7i84.0.0.nvbaudrate 7 u32 RO 0x00000000 hm2_5i25.0.7i84.0.0.nvencmode0 7 u32 RO 0x00000000 hm2_5i25.0.7i84.0.0.nvencmode1 7 u32 RO 0x1800001E hm2_5i25.0.7i84.0.0.nvunitnumber 7 u32 RW 0x00000032 hm2_5i25.0.7i84.0.0.nvwatchdogtimeout 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-00-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-01-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-02-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-03-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-04-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-05-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-06-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-07-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-08-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-09-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-10-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-11-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-12-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-13-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-14-invert 7 bit RW FALSE hm2_5i25.0.7i84.0.0.output-15-invert 7 u32 RO 0x0000000E hm2_5i25.0.7i84.0.0.swrevision 7 bit RW FALSE hm2_5i25.0.encoder.00.counter-mode 7 bit RW TRUE hm2_5i25.0.encoder.00.filter 7 bit RW FALSE hm2_5i25.0.encoder.00.index-invert 7 bit RW FALSE hm2_5i25.0.encoder.00.index-mask 7 bit RW FALSE hm2_5i25.0.encoder.00.index-mask-invert 7 float RW 1 hm2_5i25.0.encoder.00.scale 7 bit RW FALSE hm2_5i25.0.encoder.00.sel0.invert_output 7 bit RW FALSE hm2_5i25.0.encoder.00.sel0.is_opendrain 7 float RW 0.5 hm2_5i25.0.encoder.00.vel-timeout 7 bit RW FALSE hm2_5i25.0.encoder.01.counter-mode 7 bit RW TRUE hm2_5i25.0.encoder.01.filter 7 bit RW FALSE hm2_5i25.0.encoder.01.index-invert 7 bit RW FALSE hm2_5i25.0.encoder.01.index-mask 7 bit RW FALSE hm2_5i25.0.encoder.01.index-mask-invert 7 float RW 1 hm2_5i25.0.encoder.01.scale 7 float RW 0.5 hm2_5i25.0.encoder.01.vel-timeout 7 bit RW FALSE hm2_5i25.0.encoder.02.counter-mode 7 bit RW TRUE hm2_5i25.0.encoder.02.filter 7 bit RW FALSE hm2_5i25.0.encoder.02.index-invert 7 bit RW FALSE hm2_5i25.0.encoder.02.index-mask 7 bit RW FALSE hm2_5i25.0.encoder.02.index-mask-invert 7 float RW 1 hm2_5i25.0.encoder.02.scale 7 float RW 0.5 hm2_5i25.0.encoder.02.vel-timeout 7 bit RW FALSE hm2_5i25.0.encoder.03.counter-mode 7 bit RW TRUE hm2_5i25.0.encoder.03.filter 7 bit RW FALSE hm2_5i25.0.encoder.03.index-invert 7 bit RW FALSE hm2_5i25.0.encoder.03.index-mask 7 bit RW FALSE hm2_5i25.0.encoder.03.index-mask-invert 7 float RW 1 hm2_5i25.0.encoder.03.scale 7 float RW 0.5 hm2_5i25.0.encoder.03.vel-timeout 7 bit RW FALSE hm2_5i25.0.encoder.04.counter-mode 7 bit RW TRUE hm2_5i25.0.encoder.04.filter 7 bit RW FALSE hm2_5i25.0.encoder.04.index-invert 7 bit RW FALSE hm2_5i25.0.encoder.04.index-mask 7 bit RW FALSE hm2_5i25.0.encoder.04.index-mask-invert 7 float RW 1 hm2_5i25.0.encoder.04.scale 7 bit RW FALSE hm2_5i25.0.encoder.04.sel0.invert_output 7 bit RW FALSE hm2_5i25.0.encoder.04.sel0.is_opendrain 7 float RW 0.5 hm2_5i25.0.encoder.04.vel-timeout 7 bit RW FALSE hm2_5i25.0.encoder.05.counter-mode 7 bit RW TRUE hm2_5i25.0.encoder.05.filter 7 bit RW FALSE hm2_5i25.0.encoder.05.index-invert 7 bit RW FALSE hm2_5i25.0.encoder.05.index-mask 7 bit RW FALSE hm2_5i25.0.encoder.05.index-mask-invert 7 float RW 1 hm2_5i25.0.encoder.05.scale 7 float RW 0.5 hm2_5i25.0.encoder.05.vel-timeout 7 bit RW FALSE hm2_5i25.0.encoder.06.counter-mode 7 bit RW TRUE hm2_5i25.0.encoder.06.filter 7 bit RW FALSE hm2_5i25.0.encoder.06.index-invert 7 bit RW FALSE hm2_5i25.0.encoder.06.index-mask 7 bit RW FALSE hm2_5i25.0.encoder.06.index-mask-invert 7 float RW 1 hm2_5i25.0.encoder.06.scale 7 float RW 0.5 hm2_5i25.0.encoder.06.vel-timeout 7 bit RW FALSE hm2_5i25.0.encoder.07.counter-mode 7 bit RW TRUE hm2_5i25.0.encoder.07.filter 7 bit RW FALSE hm2_5i25.0.encoder.07.index-invert 7 bit RW FALSE hm2_5i25.0.encoder.07.index-mask 7 bit RW FALSE hm2_5i25.0.encoder.07.index-mask-invert 7 float RW 1 hm2_5i25.0.encoder.07.scale 7 float RW 0.5 hm2_5i25.0.encoder.07.vel-timeout 7 bit RW FALSE hm2_5i25.0.gpio.017.invert_output 7 bit RW FALSE hm2_5i25.0.gpio.017.is_opendrain 7 bit RW FALSE hm2_5i25.0.gpio.017.is_output 7 bit RW FALSE hm2_5i25.0.gpio.018.invert_output 7 bit RW FALSE hm2_5i25.0.gpio.018.is_opendrain 7 bit RW FALSE hm2_5i25.0.gpio.018.is_output 7 bit RW FALSE hm2_5i25.0.io_error 7 s32 RW 0 hm2_5i25.0.read.tmax 7 bit RO FALSE hm2_5i25.0.read.tmax-increased 7 s32 RW 0 hm2_5i25.0.read_gpio.tmax 7 bit RO FALSE hm2_5i25.0.read_gpio.tmax-increased 7 bit RW FALSE hm2_5i25.0.sserial.00.tx0.invert_output 7 bit RW FALSE hm2_5i25.0.sserial.00.tx0.is_opendrain 7 u32 RW 0x00000001 hm2_5i25.0.sserial.port-0.fault-dec 7 u32 RW 0x0000000A hm2_5i25.0.sserial.port-0.fault-inc 7 u32 RW 0x000000C8 hm2_5i25.0.sserial.port-0.fault-lim 7 bit RW FALSE hm2_5i25.0.stepgen.00.direction.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.00.direction.is_opendrain 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.dirhold 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.dirsetup 7 float RW 1 hm2_5i25.0.stepgen.00.maxaccel 7 float RW 0 hm2_5i25.0.stepgen.00.maxvel 7 float RW 1 hm2_5i25.0.stepgen.00.position-scale 7 bit RW FALSE hm2_5i25.0.stepgen.00.step.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.00.step.is_opendrain 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.step_type 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.steplen 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.stepspace 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-0 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-1 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-2 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-3 7 bit RW FALSE hm2_5i25.0.stepgen.01.direction.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.01.direction.is_opendrain 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.dirhold 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.dirsetup 7 float RW 1 hm2_5i25.0.stepgen.01.maxaccel 7 float RW 0 hm2_5i25.0.stepgen.01.maxvel 7 float RW 1 hm2_5i25.0.stepgen.01.position-scale 7 bit RW FALSE hm2_5i25.0.stepgen.01.step.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.01.step.is_opendrain 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.step_type 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.steplen 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.stepspace 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-0 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-1 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-2 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-3 7 bit RW FALSE hm2_5i25.0.stepgen.02.direction.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.02.direction.is_opendrain 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.dirhold 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.dirsetup 7 float RW 1 hm2_5i25.0.stepgen.02.maxaccel 7 float RW 0 hm2_5i25.0.stepgen.02.maxvel 7 float RW 1 hm2_5i25.0.stepgen.02.position-scale 7 bit RW FALSE hm2_5i25.0.stepgen.02.step.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.02.step.is_opendrain 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.step_type 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.steplen 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.stepspace 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-0 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-1 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-2 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-3 7 bit RW FALSE hm2_5i25.0.stepgen.03.direction.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.03.direction.is_opendrain 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.dirhold 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.dirsetup 7 float RW 1 hm2_5i25.0.stepgen.03.maxaccel 7 float RW 0 hm2_5i25.0.stepgen.03.maxvel 7 float RW 1 hm2_5i25.0.stepgen.03.position-scale 7 bit RW FALSE hm2_5i25.0.stepgen.03.step.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.03.step.is_opendrain 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.step_type 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.steplen 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.stepspace 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-0 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-1 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-2 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-3 7 bit RW FALSE hm2_5i25.0.stepgen.04.direction.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.04.direction.is_opendrain 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.dirhold 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.dirsetup 7 float RW 1 hm2_5i25.0.stepgen.04.maxaccel 7 float RW 0 hm2_5i25.0.stepgen.04.maxvel 7 float RW 1 hm2_5i25.0.stepgen.04.position-scale 7 bit RW FALSE hm2_5i25.0.stepgen.04.step.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.04.step.is_opendrain 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.step_type 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.steplen 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.stepspace 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-0 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-1 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-2 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-3 7 bit RW FALSE hm2_5i25.0.stepgen.05.direction.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.05.direction.is_opendrain 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.dirhold 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.dirsetup 7 float RW 1 hm2_5i25.0.stepgen.05.maxaccel 7 float RW 0 hm2_5i25.0.stepgen.05.maxvel 7 float RW 1 hm2_5i25.0.stepgen.05.position-scale 7 bit RW FALSE hm2_5i25.0.stepgen.05.step.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.05.step.is_opendrain 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.step_type 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.steplen 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.stepspace 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-0 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-1 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-2 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-3 7 bit RW FALSE hm2_5i25.0.stepgen.06.direction.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.06.direction.is_opendrain 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.dirhold 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.dirsetup 7 float RW 1 hm2_5i25.0.stepgen.06.maxaccel 7 float RW 0 hm2_5i25.0.stepgen.06.maxvel 7 float RW 1 hm2_5i25.0.stepgen.06.position-scale 7 bit RW FALSE hm2_5i25.0.stepgen.06.step.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.06.step.is_opendrain 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.step_type 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.steplen 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.stepspace 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-0 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-1 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-2 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-3 7 bit RW FALSE hm2_5i25.0.stepgen.07.direction.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.07.direction.is_opendrain 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.dirhold 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.dirsetup 7 float RW 1 hm2_5i25.0.stepgen.07.maxaccel 7 float RW 0 hm2_5i25.0.stepgen.07.maxvel 7 float RW 1 hm2_5i25.0.stepgen.07.position-scale 7 bit RW FALSE hm2_5i25.0.stepgen.07.step.invert_output 7 bit RW FALSE hm2_5i25.0.stepgen.07.step.is_opendrain 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.step_type 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.steplen 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.stepspace 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-0 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-1 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-2 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-3 7 u32 RW 0x004C4B40 hm2_5i25.0.watchdog.timeout_ns 7 s32 RW 0 hm2_5i25.0.write.tmax 7 bit RO FALSE hm2_5i25.0.write.tmax-increased 7 s32 RW 0 hm2_5i25.0.write_gpio.tmax 7 bit RO FALSE hm2_5i25.0.write_gpio.tmax-increased halcmd: