bit            TRUE  spindle-at-speed
                         ==> spindle.0.at-speed
bit           FALSE  spindle-brake
                         <== spindle.0.brake
bit           FALSE  spindle-ccw
                         ==> hm2_7i96.0.ssr.00.out-03
                         <== spindle.0.reverse
bit            TRUE  spindle-cw
                         ==> hm2_7i96.0.ssr.00.out-02
                         <== spindle.0.forward
bit           FALSE  spindle-enable
                         ==> hm2_7i96.0.pwmgen.00.enable
                         ==> hm2_7i96.0.ssr.00.out-01
                         ==> pid.s.enable
bit           FALSE  spindle-index-enable
                         ==> pid.s.index-enable
                         <=> spindle.0.index-enable
bit           FALSE  spindle-manual-ccw
                         ==> halui.spindle.0.reverse
bit           FALSE  spindle-manual-cw
                         ==> halui.spindle.0.forward
bit           FALSE  spindle-manual-stop
                         ==> halui.spindle.0.stop
float             0  spindle-output
                         <== pid.s.output
float             0  spindle-revs
                         ==> spindle.0.revs
float          6000  spindle-vel-cmd-rpm
                         ==> hm2_7i96.0.pwmgen.00.value
                         <== spindle.0.speed-out
float          6000  spindle-vel-cmd-rpm-abs
                         ==> pid.s.command
                         <== spindle.0.speed-out-abs
float           100  spindle-vel-cmd-rps
                         <== spindle.0.speed-out-rps
float           100  spindle-vel-cmd-rps-abs
                         <== spindle.0.speed-out-rps-abs
float             0  spindle-vel-fb-rpm-abs
                         ==> pid.s.feedback
float             0  spindle-vel-fb-rps
                         ==> spindle.0.speed-in
bit           FALSE  ssr0out
                         ==> hm2_7i96.0.ssr.00.out-00
                         <== not.0.out

   
   
   
   
   
    26  bit   RW          FALSE  hm2_7i96.0.pwmgen.00.offset-mode
    26  bit   RW           TRUE  hm2_7i96.0.pwmgen.00.out0.invert_output
    26  bit   RW          FALSE  hm2_7i96.0.pwmgen.00.out0.is_opendrain
    26  s32   RW              1  hm2_7i96.0.pwmgen.00.output-type
    26  float RW           6000  hm2_7i96.0.pwmgen.00.scale
    26  u32   RW     0x000927C0  hm2_7i96.0.pwmgen.pdm_frequency
    26  u32   RW     0x00004E20  hm2_7i96.0.pwmgen.pwm_frequency
    
    
hm2_7i96.0.pwmgen.00.out0.invert_output          hm2_7i96.0.gpio.036.invert_output
hm2_7i96.0.pwmgen.00.out0.is_opendrain           hm2_7i96.0.gpio.036.is_opendrain