pi@raspberrypi:~ $ ethercat pdos
=== Master 0, Slave 1 ===
SM0: PhysAddr 0x1000, DefaultSize    0, ControlRegister 0x00, Enable 0
  TxPDO 0x1a00 "Channel 1"
    PDO entry 0x3101:01,  1 bit, "Input"
  TxPDO 0x1a01 "Channel 2"
    PDO entry 0x3101:02,  1 bit, "Input"
  TxPDO 0x1a02 "Channel 3"
    PDO entry 0x3101:03,  1 bit, "Input"
  TxPDO 0x1a03 "Channel 4"
    PDO entry 0x3101:04,  1 bit, "Input"
=== Master 0, Slave 2 ===
SM0: PhysAddr 0x1000, DefaultSize    0, ControlRegister 0x00, Enable 0
  TxPDO 0x1a00 "Channel 1"
    PDO entry 0x3101:01,  1 bit, "Input"
  TxPDO 0x1a01 "Channel 2"
    PDO entry 0x3101:02,  1 bit, "Input"
  TxPDO 0x1a02 "Channel 3"
    PDO entry 0x3101:03,  1 bit, "Input"
  TxPDO 0x1a03 "Channel 4"
    PDO entry 0x3101:04,  1 bit, "Input"
=== Master 0, Slave 3 ===
SM0: PhysAddr 0x0f00, DefaultSize    0, ControlRegister 0x46, Enable 1
  RxPDO 0x1600 "Channel 1"
    PDO entry 0x3001:01,  1 bit, "Output"
  RxPDO 0x1601 "Channel 2"
    PDO entry 0x3001:02,  1 bit, "Output"
  RxPDO 0x1602 "Channel 3"
    PDO entry 0x3001:03,  1 bit, "Output"
  RxPDO 0x1603 "Channel 4"
    PDO entry 0x3001:04,  1 bit, "Output"
=== Master 0, Slave 4 ===
SM0: PhysAddr 0x0f00, DefaultSize    0, ControlRegister 0x46, Enable 1
  RxPDO 0x1600 "Channel 1"
    PDO entry 0x3001:01,  1 bit, "Output"
  RxPDO 0x1601 "Channel 2"
    PDO entry 0x3001:02,  1 bit, "Output"
  RxPDO 0x1602 "Channel 3"
    PDO entry 0x3001:03,  1 bit, "Output"
  RxPDO 0x1603 "Channel 4"
    PDO entry 0x3001:04,  1 bit, "Output"
=== Master 0, Slave 6 ===
SM0: PhysAddr 0x1000, DefaultSize  128, ControlRegister 0x26, Enable 1
SM1: PhysAddr 0x1100, DefaultSize  128, ControlRegister 0x22, Enable 1
SM2: PhysAddr 0x1200, DefaultSize   10, ControlRegister 0x64, Enable 1
  RxPDO 0x1600 ""
    PDO entry 0x6040:00, 16 bit, ""
    PDO entry 0x607a:00, 32 bit, ""
    PDO entry 0x60ff:00, 32 bit, ""
    PDO entry 0x6060:00,  8 bit, ""
    PDO entry 0x0000:00,  8 bit, "Gap"
SM3: PhysAddr 0x1300, DefaultSize   17, ControlRegister 0x20, Enable 1
  TxPDO 0x1a00 ""
    PDO entry 0x6041:00, 16 bit, ""
    PDO entry 0x6064:00, 32 bit, ""
    PDO entry 0x606c:00, 32 bit, ""
    PDO entry 0x6061:00,  8 bit, ""
    PDO entry 0x0000:00,  8 bit, "Gap"
=== Master 0, Slave 7 ===
SM0: PhysAddr 0x1000, DefaultSize  128, ControlRegister 0x26, Enable 1
SM1: PhysAddr 0x1100, DefaultSize  128, ControlRegister 0x22, Enable 1
SM2: PhysAddr 0x1200, DefaultSize   10, ControlRegister 0x64, Enable 1
  RxPDO 0x1600 ""
    PDO entry 0x6040:00, 16 bit, ""
    PDO entry 0x607a:00, 32 bit, ""
    PDO entry 0x60ff:00, 32 bit, ""
    PDO entry 0x6060:00,  8 bit, ""
    PDO entry 0x0000:00,  8 bit, "Gap"
SM3: PhysAddr 0x1300, DefaultSize   17, ControlRegister 0x20, Enable 1
  TxPDO 0x1a00 ""
    PDO entry 0x6041:00, 16 bit, ""
    PDO entry 0x6064:00, 32 bit, ""
    PDO entry 0x606c:00, 32 bit, ""
    PDO entry 0x6061:00,  8 bit, ""
    PDO entry 0x0000:00,  8 bit, "Gap"
=== Master 0, Slave 8 ===
SM0: PhysAddr 0x1000, DefaultSize  128, ControlRegister 0x26, Enable 1
SM1: PhysAddr 0x1100, DefaultSize  128, ControlRegister 0x22, Enable 1
SM2: PhysAddr 0x1200, DefaultSize   10, ControlRegister 0x64, Enable 1
  RxPDO 0x1600 ""
    PDO entry 0x6040:00, 16 bit, ""
    PDO entry 0x607a:00, 32 bit, ""
    PDO entry 0x60ff:00, 32 bit, ""
    PDO entry 0x6060:00,  8 bit, ""
    PDO entry 0x0000:00,  8 bit, "Gap"
SM3: PhysAddr 0x1300, DefaultSize   17, ControlRegister 0x20, Enable 1
  TxPDO 0x1a00 ""
    PDO entry 0x6041:00, 16 bit, ""
    PDO entry 0x6064:00, 32 bit, ""
    PDO entry 0x606c:00, 32 bit, ""
    PDO entry 0x6061:00,  8 bit, ""
    PDO entry 0x0000:00,  8 bit, "Gap"
=== Master 0, Slave 9 ===
SM0: PhysAddr 0x1000, DefaultSize  128, ControlRegister 0x26, Enable 1
SM1: PhysAddr 0x1100, DefaultSize  128, ControlRegister 0x22, Enable 1
SM2: PhysAddr 0x1200, DefaultSize   10, ControlRegister 0x64, Enable 1
  RxPDO 0x1600 ""
    PDO entry 0x6040:00, 16 bit, ""
    PDO entry 0x607a:00, 32 bit, ""
    PDO entry 0x60ff:00, 32 bit, ""
    PDO entry 0x6060:00,  8 bit, ""
    PDO entry 0x0000:00,  8 bit, "Gap"
SM3: PhysAddr 0x1300, DefaultSize   17, ControlRegister 0x20, Enable 1
  TxPDO 0x1a00 ""
    PDO entry 0x6041:00, 16 bit, ""
    PDO entry 0x6064:00, 32 bit, ""
    PDO entry 0x606c:00, 32 bit, ""
    PDO entry 0x6061:00,  8 bit, ""
    PDO entry 0x0000:00,  8 bit, "Gap"