Driving analog galvo scanner

Hello.
I have a xy galvo scanner with analog interface
shown in image.
Can drive it with linuxcnc?
What mesa card needed?
Thanks.

The interface seems unusual..
It doesn't have 1 input that takes +-10v
But 1 input for positive voltage and 1 input
for negavite voltage command.

Also outputs +-3v analog feedback voltage
must read this or only run open loop?

Can mesa 7i77 with linuxcnc meet the strict
time constraints for galvo operation because
i know that timinings in galvo scanners are 1 or 2 orders magnitude smaller than servomotors of cnc machines

That's a standard differential input, it can be wired to a single ended output:
IN- --> GND IN+ -->ANA

I doubt that a servo thread update rate would be good enough for this however
unless you are scanning quite slowly, The XY2-100 interface has the advantage
that it interpolates between LinuxCNCs waypoints, but you lose this advantage
with a simple analog interface.

Can i drive the command+ / command- differential input with 2 opamps
1 inverting and 1 non-inverting with gain 0.5 without using gnd right?
Which opamp ic will be suitable ? lm324 or something better with lower rail voltages ?
Also is there a ready made linuxcnc example configuration for analog galvo control?

You can do that but it doesn't actually gain you anything.

GND --> IN-
and
AOUT --> IN+
will work as well

The real issue will be the low position update rate and the
lack of interpolation between waypoints at the servo thread rate

How fast do you expect to scan this?



 

Hello, I think what I'm working on may be suit you need, although it's not a simple solution.
What I'm working on is an SL2-100 interpreter. It receives signal from scanner controller, converts differential signal into single ended, feed it into FPGA chip, the signal is decoded and fed into 2 DACs. I connect the DAC outputs to an oscilloscope to visualize it. While you may connect them to the analog galvo scanner.

The chips I'm using are:
AM26C32/AM26LV32 for differential line receive, Gowin GW1N-LV9 the FPGA chip, Analog AD5422 the DAC chip.
 

My verilog program takes 179 logic cells. A Xilinx Spartan6, Intel EP4C, maybe EPM570 will also work.
SL2-100 transfers 20bit position signals. For my purpose of visualizing it 16bit DACs are good enough.

XY2-100 protocol information:
www.sigrok.org/wiki/Protocol_decoder:Xy2-100
www.alaser.com.tw/db/upload/webdata4/5al...1412422541519318.pdf
 

Very interesting...
What is the status ?