Step/Dir servos + Encoders = follow errors... and so much pain.....

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5 years 8 months ago #197614 by PCW
Replied by PCW on topic Step/Dir servos + Encoders = follow errors... and so much pain.....
Sounds about right

look at IO-29 in the example pinout file

also 2.8 will belly-ache about the version, you need the latest 2.9 to work with the 0xC2 (and 0x42) stepgen versions

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5 years 8 months ago #197615 by jhandel
Replied by jhandel on topic Step/Dir servos + Encoders = follow errors... and so much pain.....
ahhh there it is:
StepGenTag & StepGenIndexPin <-- there it is..
Do I need this per axes or just 1 (like its on for all axes or its off for all axes)?

It looks like just 1 as its broken up from the rest of the stepgen tags by QCountTags.. But figured I would double check..

Thanks

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5 years 8 months ago #197617 by PCW
Replied by PCW on topic Step/Dir servos + Encoders = follow errors... and so much pain.....
Yes, a stepgen index is needed per joint
(since like the encoder index, it actually clears the position)
I think its arguable that this is not the best thing but its what LinuxCNC expects

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5 years 8 months ago #197718 by andypugh
Replied by andypugh on topic Step/Dir servos + Encoders = follow errors... and so much pain.....

PCW wrote: I think its arguable that this is not the best thing but its what LinuxCNC expects


It's one way of getting the data on how many counts there have been since the index without having an extra register.
There can be almost a whole millisecond of motion after the index, and LinuxCNC needs to have a way to know how far the joint has moved in that time.

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5 years 8 months ago #197747 by PCW
Replied by PCW on topic Step/Dir servos + Encoders = follow errors... and so much pain.....
Right, but it needs rather sketchy patching of PID to deal with the fact
that the joint has a position step at index. If the offset at index was used
instead of clearing the low level position and the position step was restricted
to the axis position, this patching would not be needed. I understand that
the original design probably had to deal with encoder counters that
could only clear their count on index rather then latch the count on index.

A side benefit of not clearing the counter at index is that the hardware index
enable (and latch at index) can be enabled in normal operation and the latched
count used as a sanity check of encoder counting

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5 years 8 months ago #197788 by jhandel
Replied by jhandel on topic Step/Dir servos + Encoders = follow errors... and so much pain.....
Hurm.. head scratcher... The StepGenIndexPin is eating a QCountIDXPin.. Which makes since..... What will the behavior be if I need to eat a MuxedQCountIDXPin.

With a 7i76e & 7i89 all of my encoders are MuxedQCountIDXPin... How would that map out (or would it at all)?

Given the encoder signal is double-ended how else might I get that input into the system....

Sorry here I am throwing a wrench into the beautiful plan :-(..

Here is my vhd for reference (prior to any chances)
Code:
library IEEE; use IEEE.std_logic_1164.all; -- defines std_logic types use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Copyright (C) 2007, Peter C. Wallace, Mesa Electronics -- http://www.mesanet.com -- -- This program is is licensed under a disjunctive dual license giving you -- the choice of one of the two following sets of free software/open source -- licensing terms: -- -- * GNU General Public License (GPL), version 2.0 or later -- * 3-clause BSD License -- -- -- The GNU GPL License: -- -- This program is free software; you can redistribute it and/or modify -- it under the terms of the GNU General Public License as published by -- the Free Software Foundation; either version 2 of the License, or -- (at your option) any later version. -- -- This program is distributed in the hope that it will be useful, -- but WITHOUT ANY WARRANTY; without even the implied warranty of -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- GNU General Public License for more details. -- -- You should have received a copy of the GNU General Public License -- along with this program; if not, write to the Free Software -- Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -- -- -- The 3-clause BSD License: -- -- Redistribution and use in source and binary forms, with or without -- modification, are permitted provided that the following conditions -- are met: -- -- * Redistributions of source code must retain the above copyright -- notice, this list of conditions and the following disclaimer. -- -- * Redistributions in binary form must reproduce the above -- copyright notice, this list of conditions and the following -- disclaimer in the documentation and/or other materials -- provided with the distribution. -- -- * Neither the name of Mesa Electronics nor the names of its -- contributors may be used to endorse or promote products -- derived from this software without specific prior written -- permission. -- -- -- Disclaimer: -- -- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -- COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- POSSIBILITY OF SUCH DAMAGE. -- use work.IDROMConst.all; package PIN_7i76x1_7i89x2D_x15ABOB_51 is constant ModuleID : ModuleIDType :=( (HM2DPLLTag, x"00", ClockLowTag, x"01", HM2DPLLBaseRateAddr&PadT, HM2DPLLNumRegs, x"00", HM2DPLLMPBitMask), (WatchDogTag, x"00", ClockLowTag, x"01", WatchDogTimeAddr&PadT, WatchDogNumRegs, x"00", WatchDogMPBitMask), (IOPortTag, x"00", ClockLowTag, x"03", PortAddr&PadT, IOPortNumRegs, x"00", IOPortMPBitMask), (StepGenTag, x"02", ClockLowTag, x"06", StepGenRateAddr&PadT, StepGenNumRegs, x"00", StepGenMPBitMask), (MuxedQcountTag, MQCRev, ClockLowTag, x"0A", MuxedQcounterAddr&PadT, MuxedQCounterNumRegs,x"00", MuxedQCounterMPBitMask), (MuxedQCountSelTag, x"00", ClockLowTag, x"01", NullAddr&PadT, x"00", x"00", x"00000000"), (SSerialTag, x"00", ClockLowTag, x"01", SSerialCommandAddr&PadT, SSerialNumRegs, x"10", SSerialMPBitMask), (LEDTag, x"00", ClockLowTag, x"01", LEDAddr&PadT, LEDNumRegs, x"00", LEDMPBitMask), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"), (NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000") ); constant PinDesc : PinDescType :=( -- Base func sec unit sec func sec pin IOPortTag & x"00" & StepGenTag & StepGenDirPin, -- I/O 00 embedded 7I76 IOPortTag & x"00" & StepGenTag & StepGenStepPin, -- I/O 01 IOPortTag & x"01" & StepGenTag & StepGenDirPin, -- I/O 02 IOPortTag & x"01" & StepGenTag & StepGenStepPin, -- I/O 03 IOPortTag & x"02" & StepGenTag & StepGenDirPin, -- I/O 04 IOPortTag & x"02" & StepGenTag & StepGenStepPin, -- I/O 05 IOPortTag & x"03" & StepGenTag & StepGenDirPin, -- I/O 06 IOPortTag & x"03" & StepGenTag & StepGenStepPin, -- I/O 07 IOPortTag & x"04" & StepGenTag & StepGenDirPin, -- I/O 08 IOPortTag & x"04" & StepGenTag & StepGenStepPin, -- I/O 09 IOPortTag & x"00" & SSerialTag & SSerialTX0Pin, -- I/O 10 IOPortTag & x"00" & SSerialTag & SSerialRX0Pin, -- I/O 11 IOPortTag & x"00" & SSerialTag & SSerialTX1Pin, -- I/O 12 IOPortTag & x"00" & SSerialTag & SSerialRX1Pin, -- I/O 13 IOPortTag & x"04" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 14 IOPortTag & x"04" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 15 IOPortTag & x"04" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 16 -- P1 -- 5ABOB pinout -- 26 HDR -- IDC DB25 IOPortTag & x"05" & StepGenTag & StepGenStepPin, -- I/O 01 PIN 1 PIN 1 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 02 PIN 2 PIN 14 Spindle Step IOPortTag & x"05" & StepGenTag & StepGenDirPin, -- I/O 03 PIN 3 PIN 2 Spindle Direction IOPortTag & x"00" & NullTag & NullPin, -- I/O 04 PIN 4 PIN 15 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 05 PIN 5 PIN 3 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 06 PIN 6 PIN 16 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 07 PIN 7 PIN 4 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 08 PIN 8 PIN 17 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 09 PIN 9 PIN 5 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 10 PIN 11 PIN 6 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 11 PIN 13 PIN 7 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 12 PIN 15 PIN 8 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 13 PIN 17 PIN 9 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 14 PIN 19 PIN 10 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 15 PIN 21 PIN 11 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 16 PIN 23 PIN 12 just GPIO IOPortTag & x"00" & NullTag & NullPin, -- I/O 33 PIN 25 PIN 13 just GPIO -- P2 HDR26 DB25 IOPortTag & x"00" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 17 PIN 1 PIN 1 IOPortTag & x"00" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 18 PIN 14 PIN 2 IOPortTag & x"00" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 19 PIN 2 PIN 3 IOPortTag & x"01" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 20 PIN 15 PIN 4 IOPortTag & x"01" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 21 PIN 3 PIN 5 IOPortTag & x"01" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 22 PIN 16 PIN 6 IOPortTag & x"02" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 23 PIN 4 PIN 7 IOPortTag & x"02" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 24 PIN 17 PIN 8 IOPortTag & x"02" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 25 PIN 5 PIN 9 IOPortTag & x"03" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 26 PIN 6 PIN 11 IOPortTag & x"03" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 27 PIN 7 PIN 13 IOPortTag & x"03" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 28 PIN 8 PIN 15 IOPortTag & x"00" & MuxedQCountSelTag & MuxedQCountSel0Pin, -- I/O 29 PIN 9 PIN 17 IOPortTag & x"00" & NullTag & NullPin, -- I/O 30 PIN 10 PIN 19 powop IOPortTag & x"00" & SSerialTag & SSerialRX2Pin, -- I/O 31 PIN 11 PIN 21 IOPortTag & x"00" & SSerialTag & SSerialTX2Pin, -- I/O 32 PIN 12 PIN 23 IOPortTag & x"00" & SSerialTag & SSerialTXEN2Pin, -- I/O 33 PIN 13 PIN 25 LIOPortTag & x"00" & SSerialTag & SSerialNTXEn1Pin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, -- added for IDROM v3 emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin); end package PIN_7i76x1_7i89x2D_x15ABOB_51;

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5 years 8 months ago #197791 by PCW
Replied by PCW on topic Step/Dir servos + Encoders = follow errors... and so much pain.....
Yeah the step index needs a simple non-muxed source pin
Since the step index is mainly intended to work in systems without
encoder feedback.

For testing, you could use a free RS-422 RX channel

I will look into firmware using muxed pins but its a bit awkward since
it almost guaranteed that the stepgen and muxed encoders
would need to share at least the mux pin

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5 years 8 months ago #197792 by jhandel
Replied by jhandel on topic Step/Dir servos + Encoders = follow errors... and so much pain.....
Yah Muxing that pin would be a mess, you would have to use some formula like MuxStepGenIndexPin 0 maps to StepGen0 & StepGen 1, and so forth...

Can I dump SSerialRX0Pin & SSerialRX1Pin..

handling getting a double ended signal into a standard IO is going to be...... interesting (if I have one to spare).. That or I will need to remove the 7i89 as (if I am following) I won't be using it for actual encoding anymore.. (well I still need the spindle encoder, and my MPG encoder, but those can be handled by the 7i76....

(scratch head)... I'll tinker on this end a bit..

Thanks

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5 years 8 months ago #197793 by PCW
Replied by PCW on topic Step/Dir servos + Encoders = follow errors... and so much pain.....
I forget what hardware you are using but if its a 7I76E you cant dump RX0
(since its the interface to the local field I/O)

I think piggy-backing on the muxed encoder index is probably the
best way to use the stepgen index with muxed interface
daughterboards. It could possibly share the encoder index pins

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5 years 8 months ago #197796 by jhandel
Replied by jhandel on topic Step/Dir servos + Encoders = follow errors... and so much pain.....
Yah I have a 7i76e, a 7i89 and a 7i75.. the 7i75 is very busy with mpg & machine IO along with the normal IO on the 7i76e... The 7i89 has all of encoders on it..

(this machine has a metric ton of IO needs with 5 axis, an ATC, a tool setter, a probe, and an encoded servo for a spindle)...

I am not 100% sure what you mean by "piggy-back".. or were you just pontificating on something you would have to do to the source.

Sorry this has become such a pain in the patella.. :-(

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