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hm2 BSPI documentation, examples?
3 years 2 months ago #277441
by PCW
Replied by PCW on topic hm2 BSPI documentation, examples?
I don't think any resistors are needed.
The only undriven pin would be the FPGA cards SPI data input
(SDI) line which is only driven when a transfer is taking place, but
that has a pullup on a 7I92/7I92T.
The only undriven pin would be the FPGA cards SPI data input
(SDI) line which is only driven when a transfer is taking place, but
that has a pullup on a 7I92/7I92T.
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3 years 2 months ago #278739
by blazini36
Replied by blazini36 on topic hm2 BSPI documentation, examples?
So my hand got a little shaky when I was sticking a multi-meter probe in a step driver socket, pretty sure I shorted 24v+ to a GPIO (DIR) pin on the 7i92. Looks like there's a tiny hole in the bus switch IC. Is it likely that that's all I blew?
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3 years 2 months ago #278743
by PCW
Replied by PCW on topic hm2 BSPI documentation, examples?
That's usually the case, but no guarantees...
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3 years 1 month ago #281203
by blazini36
Replied by blazini36 on topic hm2 BSPI documentation, examples?
I replaced both the bus switch ICs (probably only needed 1) with SN74CBT16211CDGGR.
Does it make sense that random pins don't seem to work? Like my inmux data output pins are strobing, but the 7i92 can't see the data input pin, but I can verify address and data with the scope. BSPI pins don't seem to be working at all, at least the clock and chip selects. The step pin I shorted was probably IO18 and I think the 2 bus switches are per connector but it's odd that the opposite connector seems to have random bad pins.
Does that make any sense? Sound like the FPGA is damaged?
Does it make sense that random pins don't seem to work? Like my inmux data output pins are strobing, but the 7i92 can't see the data input pin, but I can verify address and data with the scope. BSPI pins don't seem to be working at all, at least the clock and chip selects. The step pin I shorted was probably IO18 and I think the 2 bus switches are per connector but it's odd that the opposite connector seems to have random bad pins.
Does that make any sense? Sound like the FPGA is damaged?
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3 years 1 month ago #281206
by PCW
Replied by PCW on topic hm2 BSPI documentation, examples?
Might be, 24V can do a lot of damage to 3.3/5V circuitry
as it may damage other parts/pins by conducting through
damaged chip
You could do an I/O check on each GPIO pin to check
(or just see if all pins are high when first powered up)
as it may damage other parts/pins by conducting through
damaged chip
You could do an I/O check on each GPIO pin to check
(or just see if all pins are high when first powered up)
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3 years 1 month ago #281220
by blazini36
Replied by blazini36 on topic hm2 BSPI documentation, examples?
Is there an all GPIO firmware I can flash?Might be, 24V can do a lot of damage to 3.3/5V circuitry
as it may damage other parts/pins by conducting through
damaged chip
You could do an I/O check on each GPIO pin to check
(or just see if all pins are high when first powered up)
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3 years 1 month ago #281224
by andypugh
Replied by andypugh on topic hm2 BSPI documentation, examples?
If you turn off the other features (num_stepgen=0, num_bspis=0, etc) then all pins become GPIO. (At the FPGA, not necessarily usefully so at the screw terminals)
Is there an all GPIO firmware I can flash?
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3 years 1 month ago #281256
by blazini36
Replied by blazini36 on topic hm2 BSPI documentation, examples?
I stripped my hal file down to this:
I thought it worked like you said but with just that in my halfile, these are my pins:
Halshow looks the same as my normal hal file as far as the 7i92 is concerned, the pins with a firmware module are not "full" gpio, no output and the inmux address lines are still strobing. Not sure if the config line is even necessary these days, looks like LinuxCNC is doing auto discovery. I just want straight GPIO so I can manually test inputs @ the headers.
Code:
#THIS IS A 7I92 GPIO TEST
loadrt [KINS]KINEMATICS
loadrt [EMCMOT]EMCMOT servo_period_nsec=[EMCMOT]SERVO_PERIOD num_joints=[KINS]JOINTS num_dio=8
loadrt hostmot2
loadrt hm2_eth board_ip="10.10.10.10" config=""
addf hm2_7i92.0.read servo-thread
addf motion-command-handler servo-thread
addf motion-controller servo-thread
setp hm2_7i92.0.dpll.01.timer-us -50
setp hm2_7i92.0.stepgen.timer-number 1
I thought it worked like you said but with just that in my halfile, these are my pins:
Code:
[color=#000000]$ halcmd show pin | grep 7i92 [/color]
36 float IN -50 hm2_7i92.0.dpll.01.timer-us
36 float IN 100 hm2_7i92.0.dpll.02.timer-us
36 float IN 100 hm2_7i92.0.dpll.03.timer-us
36 float IN 100 hm2_7i92.0.dpll.04.timer-us
36 float IN -1 hm2_7i92.0.dpll.base-freq-khz
36 u32 OUT 0x0000002A hm2_7i92.0.dpll.ddsize
36 float OUT 0 hm2_7i92.0.dpll.phase-error-us
36 u32 IN 0x00400000 hm2_7i92.0.dpll.plimit
36 u32 OUT 0x00000001 hm2_7i92.0.dpll.prescale
36 u32 IN 0x000007D0 hm2_7i92.0.dpll.time-const
36 bit OUT FALSE hm2_7i92.0.gpio.000.in
36 bit OUT TRUE hm2_7i92.0.gpio.000.in_not
36 bit IN FALSE hm2_7i92.0.gpio.000.out
36 bit OUT FALSE hm2_7i92.0.gpio.001.in
36 bit OUT TRUE hm2_7i92.0.gpio.001.in_not
36 bit IN FALSE hm2_7i92.0.gpio.001.out
36 bit OUT FALSE hm2_7i92.0.gpio.002.in
36 bit OUT TRUE hm2_7i92.0.gpio.002.in_not
36 bit IN FALSE hm2_7i92.0.gpio.002.out
36 bit OUT FALSE hm2_7i92.0.gpio.003.in
36 bit OUT TRUE hm2_7i92.0.gpio.003.in_not
36 bit IN FALSE hm2_7i92.0.gpio.003.out
36 bit OUT FALSE hm2_7i92.0.gpio.004.in
36 bit OUT TRUE hm2_7i92.0.gpio.004.in_not
36 bit IN FALSE hm2_7i92.0.gpio.004.out
36 bit OUT FALSE hm2_7i92.0.gpio.005.in
36 bit OUT TRUE hm2_7i92.0.gpio.005.in_not
36 bit IN FALSE hm2_7i92.0.gpio.005.out
36 bit OUT FALSE hm2_7i92.0.gpio.006.in
36 bit OUT TRUE hm2_7i92.0.gpio.006.in_not
36 bit IN FALSE hm2_7i92.0.gpio.006.out
36 bit OUT FALSE hm2_7i92.0.gpio.007.in
36 bit OUT TRUE hm2_7i92.0.gpio.007.in_not
36 bit IN FALSE hm2_7i92.0.gpio.007.out
36 bit OUT FALSE hm2_7i92.0.gpio.008.in
36 bit OUT TRUE hm2_7i92.0.gpio.008.in_not
36 bit OUT TRUE hm2_7i92.0.gpio.009.in
36 bit OUT FALSE hm2_7i92.0.gpio.009.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.010.in
36 bit OUT TRUE hm2_7i92.0.gpio.010.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.011.in
36 bit OUT TRUE hm2_7i92.0.gpio.011.in_not
36 bit OUT TRUE hm2_7i92.0.gpio.012.in
36 bit OUT FALSE hm2_7i92.0.gpio.012.in_not
36 bit OUT TRUE hm2_7i92.0.gpio.013.in
36 bit OUT FALSE hm2_7i92.0.gpio.013.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.014.in
36 bit OUT TRUE hm2_7i92.0.gpio.014.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.015.in
36 bit OUT TRUE hm2_7i92.0.gpio.015.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.016.in
36 bit OUT TRUE hm2_7i92.0.gpio.016.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.017.in
36 bit OUT TRUE hm2_7i92.0.gpio.017.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.018.in
36 bit OUT TRUE hm2_7i92.0.gpio.018.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.019.in
36 bit OUT TRUE hm2_7i92.0.gpio.019.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.020.in
36 bit OUT TRUE hm2_7i92.0.gpio.020.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.021.in
36 bit OUT TRUE hm2_7i92.0.gpio.021.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.022.in
36 bit OUT TRUE hm2_7i92.0.gpio.022.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.023.in
36 bit OUT TRUE hm2_7i92.0.gpio.023.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.024.in
36 bit OUT TRUE hm2_7i92.0.gpio.024.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.025.in
36 bit OUT TRUE hm2_7i92.0.gpio.025.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.026.in
36 bit OUT TRUE hm2_7i92.0.gpio.026.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.027.in
36 bit OUT TRUE hm2_7i92.0.gpio.027.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.028.in
36 bit OUT TRUE hm2_7i92.0.gpio.028.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.029.in
36 bit OUT TRUE hm2_7i92.0.gpio.029.in_not
36 bit IN FALSE hm2_7i92.0.gpio.029.out
36 bit OUT FALSE hm2_7i92.0.gpio.030.in
36 bit OUT TRUE hm2_7i92.0.gpio.030.in_not
36 bit IN FALSE hm2_7i92.0.gpio.030.out
36 bit OUT FALSE hm2_7i92.0.gpio.031.in
36 bit OUT TRUE hm2_7i92.0.gpio.031.in_not
36 bit IN FALSE hm2_7i92.0.gpio.031.out
36 bit OUT FALSE hm2_7i92.0.gpio.032.in
36 bit OUT TRUE hm2_7i92.0.gpio.032.in_not
36 bit OUT FALSE hm2_7i92.0.gpio.033.in
36 bit OUT TRUE hm2_7i92.0.gpio.033.in_not
36 s32 OUT 0 hm2_7i92.0.inmux.00.enc0-count
36 bit IN FALSE hm2_7i92.0.inmux.00.enc0-reset
36 s32 OUT 0 hm2_7i92.0.inmux.00.enc1-count
36 bit IN FALSE hm2_7i92.0.inmux.00.enc1-reset
36 s32 OUT 0 hm2_7i92.0.inmux.00.enc2-count
36 bit IN FALSE hm2_7i92.0.inmux.00.enc2-reset
36 s32 OUT 0 hm2_7i92.0.inmux.00.enc3-count
36 bit IN FALSE hm2_7i92.0.inmux.00.enc3-reset
36 bit OUT TRUE hm2_7i92.0.inmux.00.input-00
36 bit OUT FALSE hm2_7i92.0.inmux.00.input-00-not
36 bit IN FALSE hm2_7i92.0.inmux.00.input-00-slow
36 bit OUT TRUE hm2_7i92.0.inmux.00.input-01
36 bit OUT FALSE hm2_7i92.0.inmux.00.input-01-not
36 bit IN FALSE hm2_7i92.0.inmux.00.input-01-slow
36 bit OUT TRUE hm2_7i92.0.inmux.00.input-02
36 bit OUT FALSE hm2_7i92.0.inmux.00.input-02-not
36 bit IN FALSE hm2_7i92.0.inmux.00.input-02-slow
36 bit OUT TRUE hm2_7i92.0.inmux.00.input-03
36 bit OUT FALSE hm2_7i92.0.inmux.00.input-03-not
36 bit IN FALSE hm2_7i92.0.inmux.00.input-03-slow
36 bit OUT TRUE hm2_7i92.0.inmux.00.input-04
36 bit OUT FALSE hm2_7i92.0.inmux.00.input-04-not
36 bit IN FALSE hm2_7i92.0.inmux.00.input-04-slow
36 bit OUT TRUE hm2_7i92.0.inmux.00.input-05
36 bit OUT FALSE hm2_7i92.0.inmux.00.input-05-not
36 bit IN FALSE hm2_7i92.0.inmux.00.input-05-slow
36 bit OUT TRUE hm2_7i92.0.inmux.00.input-06
36 bit OUT FALSE hm2_7i92.0.inmux.00.input-06-not
36 bit IN FALSE hm2_7i92.0.inmux.00.input-06-slow
36 bit OUT TRUE hm2_7i92.0.inmux.00.input-07
36 bit OUT FALSE hm2_7i92.0.inmux.00.input-07-not
36 bit IN FALSE hm2_7i92.0.inmux.00.input-07-slow
36 bit OUT TRUE hm2_7i92.0.inmux.00.raw-input-00
36 bit OUT FALSE hm2_7i92.0.inmux.00.raw-input-00-not
36 bit OUT TRUE hm2_7i92.0.inmux.00.raw-input-01
36 bit OUT FALSE hm2_7i92.0.inmux.00.raw-input-01-not
36 bit OUT TRUE hm2_7i92.0.inmux.00.raw-input-02
36 bit OUT FALSE hm2_7i92.0.inmux.00.raw-input-02-not
36 bit OUT TRUE hm2_7i92.0.inmux.00.raw-input-03
36 bit OUT FALSE hm2_7i92.0.inmux.00.raw-input-03-not
36 bit OUT TRUE hm2_7i92.0.inmux.00.raw-input-04
36 bit OUT FALSE hm2_7i92.0.inmux.00.raw-input-04-not
36 bit OUT TRUE hm2_7i92.0.inmux.00.raw-input-05
36 bit OUT FALSE hm2_7i92.0.inmux.00.raw-input-05-not
36 bit OUT TRUE hm2_7i92.0.inmux.00.raw-input-06
36 bit OUT FALSE hm2_7i92.0.inmux.00.raw-input-06-not
36 bit OUT TRUE hm2_7i92.0.inmux.00.raw-input-07
36 bit OUT FALSE hm2_7i92.0.inmux.00.raw-input-07-not
36 bit IN FALSE hm2_7i92.0.led.CR01
36 bit IN FALSE hm2_7i92.0.led.CR02
36 bit IN FALSE hm2_7i92.0.led.CR03
36 bit IN FALSE hm2_7i92.0.led.CR04
36 bit OUT FALSE hm2_7i92.0.packet-error
36 bit OUT FALSE hm2_7i92.0.packet-error-exceeded
36 s32 OUT 0 hm2_7i92.0.packet-error-level
36 u32 I/O 0x00000000 hm2_7i92.0.packet-error-total
36 bit IN FALSE hm2_7i92.0.pwmgen.00.enable
36 float IN 0 hm2_7i92.0.pwmgen.00.value
36 bit IN FALSE hm2_7i92.0.pwmgen.01.enable
36 float IN 0 hm2_7i92.0.pwmgen.01.value
36 s32 OUT 0 hm2_7i92.0.read-request.time
36 s32 OUT 169856 hm2_7i92.0.read.time
36 bit IN FALSE hm2_7i92.0.stepgen.00.control-type
36 s32 OUT 0 hm2_7i92.0.stepgen.00.counts
36 float OUT 0 hm2_7i92.0.stepgen.00.dbg_err_at_match
36 float OUT 0 hm2_7i92.0.stepgen.00.dbg_ff_vel
36 float OUT 0 hm2_7i92.0.stepgen.00.dbg_pos_minus_prev_cmd
36 float OUT 0 hm2_7i92.0.stepgen.00.dbg_s_to_match
36 s32 OUT 0 hm2_7i92.0.stepgen.00.dbg_step_rate
36 float OUT 0 hm2_7i92.0.stepgen.00.dbg_vel_error
36 bit IN FALSE hm2_7i92.0.stepgen.00.enable
36 float IN 0 hm2_7i92.0.stepgen.00.position-cmd
36 float OUT 0 hm2_7i92.0.stepgen.00.position-fb
36 bit IN FALSE hm2_7i92.0.stepgen.00.position-reset
36 float IN 0 hm2_7i92.0.stepgen.00.velocity-cmd
36 float OUT 0 hm2_7i92.0.stepgen.00.velocity-fb
36 bit IN FALSE hm2_7i92.0.stepgen.01.control-type
36 s32 OUT 0 hm2_7i92.0.stepgen.01.counts
36 float OUT 0 hm2_7i92.0.stepgen.01.dbg_err_at_match
36 float OUT 0 hm2_7i92.0.stepgen.01.dbg_ff_vel
36 float OUT 0 hm2_7i92.0.stepgen.01.dbg_pos_minus_prev_cmd
36 float OUT 0 hm2_7i92.0.stepgen.01.dbg_s_to_match
36 s32 OUT 0 hm2_7i92.0.stepgen.01.dbg_step_rate
36 float OUT 0 hm2_7i92.0.stepgen.01.dbg_vel_error
36 bit IN FALSE hm2_7i92.0.stepgen.01.enable
36 float IN 0 hm2_7i92.0.stepgen.01.position-cmd
36 float OUT 0 hm2_7i92.0.stepgen.01.position-fb
36 bit IN FALSE hm2_7i92.0.stepgen.01.position-reset
36 float IN 0 hm2_7i92.0.stepgen.01.velocity-cmd
36 float OUT 0 hm2_7i92.0.stepgen.01.velocity-fb
36 bit IN FALSE hm2_7i92.0.stepgen.02.control-type
36 s32 OUT 0 hm2_7i92.0.stepgen.02.counts
36 float OUT 0 hm2_7i92.0.stepgen.02.dbg_err_at_match
36 float OUT 0 hm2_7i92.0.stepgen.02.dbg_ff_vel
36 float OUT 0 hm2_7i92.0.stepgen.02.dbg_pos_minus_prev_cmd
36 float OUT 0 hm2_7i92.0.stepgen.02.dbg_s_to_match
36 s32 OUT 0 hm2_7i92.0.stepgen.02.dbg_step_rate
36 float OUT 0 hm2_7i92.0.stepgen.02.dbg_vel_error
36 bit IN FALSE hm2_7i92.0.stepgen.02.enable
36 float IN 0 hm2_7i92.0.stepgen.02.position-cmd
36 float OUT 0 hm2_7i92.0.stepgen.02.position-fb
36 bit IN FALSE hm2_7i92.0.stepgen.02.position-reset
36 float IN 0 hm2_7i92.0.stepgen.02.velocity-cmd
36 float OUT 0 hm2_7i92.0.stepgen.02.velocity-fb
36 bit IN FALSE hm2_7i92.0.stepgen.03.control-type
36 s32 OUT 0 hm2_7i92.0.stepgen.03.counts
36 float OUT 0 hm2_7i92.0.stepgen.03.dbg_err_at_match
36 float OUT 0 hm2_7i92.0.stepgen.03.dbg_ff_vel
36 float OUT 0 hm2_7i92.0.stepgen.03.dbg_pos_minus_prev_cmd
36 float OUT 0 hm2_7i92.0.stepgen.03.dbg_s_to_match
36 s32 OUT 0 hm2_7i92.0.stepgen.03.dbg_step_rate
36 float OUT 0 hm2_7i92.0.stepgen.03.dbg_vel_error
36 bit IN FALSE hm2_7i92.0.stepgen.03.enable
36 float IN 0 hm2_7i92.0.stepgen.03.position-cmd
36 float OUT 0 hm2_7i92.0.stepgen.03.position-fb
36 bit IN FALSE hm2_7i92.0.stepgen.03.position-reset
36 float IN 0 hm2_7i92.0.stepgen.03.velocity-cmd
36 float OUT 0 hm2_7i92.0.stepgen.03.velocity-fb
36 bit IN FALSE hm2_7i92.0.stepgen.04.control-type
36 s32 OUT 0 hm2_7i92.0.stepgen.04.counts
36 float OUT 0 hm2_7i92.0.stepgen.04.dbg_err_at_match
36 float OUT 0 hm2_7i92.0.stepgen.04.dbg_ff_vel
36 float OUT 0 hm2_7i92.0.stepgen.04.dbg_pos_minus_prev_cmd
36 float OUT 0 hm2_7i92.0.stepgen.04.dbg_s_to_match
36 s32 OUT 0 hm2_7i92.0.stepgen.04.dbg_step_rate
36 float OUT 0 hm2_7i92.0.stepgen.04.dbg_vel_error
36 bit IN FALSE hm2_7i92.0.stepgen.04.enable
36 float IN 0 hm2_7i92.0.stepgen.04.position-cmd
36 float OUT 0 hm2_7i92.0.stepgen.04.position-fb
36 bit IN FALSE hm2_7i92.0.stepgen.04.position-reset
36 float IN 0 hm2_7i92.0.stepgen.04.velocity-cmd
36 float OUT 0 hm2_7i92.0.stepgen.04.velocity-fb
36 bit IN FALSE hm2_7i92.0.stepgen.05.control-type
36 s32 OUT 0 hm2_7i92.0.stepgen.05.counts
36 float OUT 0 hm2_7i92.0.stepgen.05.dbg_err_at_match
36 float OUT 0 hm2_7i92.0.stepgen.05.dbg_ff_vel
36 float OUT 0 hm2_7i92.0.stepgen.05.dbg_pos_minus_prev_cmd
36 float OUT 0 hm2_7i92.0.stepgen.05.dbg_s_to_match
36 s32 OUT 0 hm2_7i92.0.stepgen.05.dbg_step_rate
36 float OUT 0 hm2_7i92.0.stepgen.05.dbg_vel_error
36 bit IN FALSE hm2_7i92.0.stepgen.05.enable
36 float IN 0 hm2_7i92.0.stepgen.05.position-cmd
36 float OUT 0 hm2_7i92.0.stepgen.05.position-fb
36 bit IN FALSE hm2_7i92.0.stepgen.05.position-reset
36 float IN 0 hm2_7i92.0.stepgen.05.velocity-cmd
36 float OUT 0 hm2_7i92.0.stepgen.05.velocity-fb
36 s32 IN 1 hm2_7i92.0.stepgen.timer-number
36 bit I/O FALSE hm2_7i92.0.watchdog.has_bit
36 s32 OUT 0 hm2_7i92.0.write.time
Halshow looks the same as my normal hal file as far as the 7i92 is concerned, the pins with a firmware module are not "full" gpio, no output and the inmux address lines are still strobing. Not sure if the config line is even necessary these days, looks like LinuxCNC is doing auto discovery. I just want straight GPIO so I can manually test inputs @ the headers.
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3 years 1 month ago #281258
by andypugh
Replied by andypugh on topic hm2 BSPI documentation, examples?
You would need to actively turn off the functions.
You might be able to turn off the inmuxes, I am not sure.
Code:
loadrt hm2_eth board_ip="10.10.10.10" config="num_stepgens=0, num_pwmgens=0"
You might be able to turn off the inmuxes, I am not sure.
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3 years 1 month ago #281266
by blazini36
I Looks like it's time to order a new 7i92t. Pretty sure I shorted pin2 of P1 which traces to the right side bus switch but I'm missing inputs on the left side of P1 which trace to the left bus switch. PCW, can you confirm that is the right chip? I tossed the old chips and I soldered these like 2 weeks ago, but I recall there being a variant with a different pinout, pretty sure it's the last "C" pin thae part number that does it.
Andy, I have a question...
My friend did some work on the BSPI component. He did something I thought was odd, wanna see if I understand how bspi works. My MCU has 4 12bit ADC channels. My thought was to stuff them into a single 48bit SPI package. Looks like it can support a 64bit single package...
....but it looks like this function only supports 32bit so it could be split across 2
And then when dissecting that you would take bits 0-11, 12-23, of analog_rx[0] for the first 2 12bit readings, then the 3rd would be the upper 8bits of analog_rx[0] and the lower 4bits of analog_rx[1], then the 4th would be the next 12bits of analog_rx[1]. Or they could just be split into 24bits each.
I'm not a code gut so some of that might sound a little off but hopefully you understand the question. Looks like what he did, I suppose just to see if it works, in the MCU firmware he took the first 8bits of each adc value and lined them up then stuck the last 4bits of each together in the upper portion of the 48bit SPI package. So the component side would consist of 4 8bit values into analog_rx[0] then analog_rx[1] just goes to rtapi_print which doesn't seem to work on my system. I guess he figured that 2nd "hm2_tram_add_bspi_frame" probably wasn't going to work.
I would have tested it as is but my 7i92t is still broken so I figured I may as well ask about it.
Replied by blazini36 on topic hm2 BSPI documentation, examples?
I should have read that a bit better, setting the config lines to 0 did work.You would need to actively turn off the functions.
Code:loadrt hm2_eth board_ip="10.10.10.10" config="num_stepgens=0, num_pwmgens=0" You might be able to turn off the inmuxes, I am not sure.
I Looks like it's time to order a new 7i92t. Pretty sure I shorted pin2 of P1 which traces to the right side bus switch but I'm missing inputs on the left side of P1 which trace to the left bus switch. PCW, can you confirm that is the right chip? I tossed the old chips and I soldered these like 2 weeks ago, but I recall there being a variant with a different pinout, pretty sure it's the last "C" pin thae part number that does it.
Andy, I have a question...
My friend did some work on the BSPI component. He did something I thought was odd, wanna see if I understand how bspi works. My MCU has 4 12bit ADC channels. My thought was to stuff them into a single 48bit SPI package. Looks like it can support a 64bit single package...
Code:
r = hm2_bspi_setup_chan(name, 1, 1, 48, 4, 0, 1, 0, 1, 0, 0);
....but it looks like this function only supports 32bit so it could be split across 2
Code:
r = hm2_tram_add_bspi_frame(name, 1, &_analog_tx[0], &_analog_rx[0]);
r = hm2_tram_add_bspi_frame(name, 1, &_analog_tx[1], &_analog_rx[1]);
And then when dissecting that you would take bits 0-11, 12-23, of analog_rx[0] for the first 2 12bit readings, then the 3rd would be the upper 8bits of analog_rx[0] and the lower 4bits of analog_rx[1], then the 4th would be the next 12bits of analog_rx[1]. Or they could just be split into 24bits each.
I'm not a code gut so some of that might sound a little off but hopefully you understand the question. Looks like what he did, I suppose just to see if it works, in the MCU firmware he took the first 8bits of each adc value and lined them up then stuck the last 4bits of each together in the upper portion of the 48bit SPI package. So the component side would consist of 4 8bit values into analog_rx[0] then analog_rx[1] just goes to rtapi_print which doesn't seem to work on my system. I guess he figured that 2nd "hm2_tram_add_bspi_frame" probably wasn't going to work.
I would have tested it as is but my 7i92t is still broken so I figured I may as well ask about it.
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