troubleshooting 5i25/7i76 combination

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9 years 11 months ago #82988 by cts1085
Here is a brief history: got the kit from mesaus, flashed the 5i25 with the 5i25_7i67x2.bit and on the bench was able to see the pins for the 7i76 - even tested vfd/stepgens for one axis and spindle.

Now I have the 7i76 mounted in a case (with field power 24v to pin 1 and common to pin 8. I have both LED's lit on the 7i76 but I do not see the pins with the show pin command. When I try the --readhmid from the mesaflash i get the below output - what else can I check????

And yes, reapplied flash and powercycled everything several times.
Code:
cts@deb-linuxcnc:~$ sudo mesaflash --device 5i25 --readhmid Configuration Name: HOSTMOT2 General configuration information: BoardName : MESA5I25 FPGA Size: 9 KGates FPGA Pins: 144 Number of IO Ports: 2 Width of one I/O port: 17 Clock Low frequency: 33.3333 MHz Clock High frequency: 200.0000 MHz IDROM Type: 3 Instance Stride 0: 4 Instance Stride 1: 64 Register Stride 0: 256 Register Stride 1: 256 Modules in configuration: Module: WatchDog There are 1 of WatchDog in configuration Version: 0 Registers: 3 BaseAddress: 0C00 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: IOPort There are 2 of IOPort in configuration Version: 0 Registers: 5 BaseAddress: 1000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: QCount There are 2 of QCount in configuration Version: 2 Registers: 5 BaseAddress: 3000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: SSerial There are 1 of SSerial in configuration Version: 0 Registers: 6 BaseAddress: 5B00 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 64 bytes Module: StepGen There are 10 of StepGen in configuration Version: 2 Registers: 10 BaseAddress: 2000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: LED There are 1 of LED in configuration Version: 0 Registers: 1 BaseAddress: 0200 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Configuration pin-out: IO Connections for P3 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 0 IOPort StepGen 0 Dir/Table2 (Out) 14 1 IOPort StepGen 0 Step/Table1 (Out) 2 2 IOPort StepGen 1 Dir/Table2 (Out) 15 3 IOPort StepGen 1 Step/Table1 (Out) 3 4 IOPort StepGen 2 Dir/Table2 (Out) 16 5 IOPort StepGen 2 Step/Table1 (Out) 4 6 IOPort StepGen 3 Dir/Table2 (Out) 17 7 IOPort StepGen 3 Step/Table1 (Out) 5 8 IOPort StepGen 4 Dir/Table2 (Out) 6 9 IOPort StepGen 4 Step/Table1 (Out) 7 10 IOPort SSerial 0 TXData1 (Out) 8 11 IOPort SSerial 0 RXData1 (In) 9 12 IOPort SSerial 0 TXData2 (Out) 10 13 IOPort SSerial 0 RXData2 (In) 11 14 IOPort QCount 0 Quad-IDX (In) 12 15 IOPort QCount 0 Quad-B (In) 13 16 IOPort QCount 0 Quad-A (In) IO Connections for P2 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 17 IOPort StepGen 5 Dir/Table2 (Out) 14 18 IOPort StepGen 5 Step/Table1 (Out) 2 19 IOPort StepGen 6 Dir/Table2 (Out) 15 20 IOPort StepGen 6 Step/Table1 (Out) 3 21 IOPort StepGen 7 Dir/Table2 (Out) 16 22 IOPort StepGen 7 Step/Table1 (Out) 4 23 IOPort StepGen 8 Dir/Table2 (Out) 17 24 IOPort StepGen 8 Step/Table1 (Out) 5 25 IOPort StepGen 9 Dir/Table2 (Out) 6 26 IOPort StepGen 9 Step/Table1 (Out) 7 27 IOPort SSerial 0 TXData3 (Out) 8 28 IOPort SSerial 0 RXData3 (In) 9 29 IOPort SSerial 0 TXData4 (Out) 10 30 IOPort SSerial 0 RXData4 (In) 11 31 IOPort QCount 1 Quad-IDX (In) 12 32 IOPort QCount 1 Quad-B (In) 13 33 IOPort QCount 1 Quad-A (In)

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9 years 11 months ago #82989 by PCW
If the 7I76 field I/O pins dont appear (and you have field power)
make sure that the 7I76 W1 and W3 are in the left hand position
and that the 7I76 is connected to 5I25 P3 with a IEEE1284 cable

Also make sure the the 5I25 and 7I76 5V cable power jumpers
are correct for the power mode

7I76 5V from 5I25:

7I76 W2 LEFT
5I25 W2 UP

External 7I76 5V:

7I76 W2 RIGHT
5I25 W2 DOWN

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9 years 11 months ago #82992 by cts1085
ok - i am using the ieee parallel cable that came with the kit. the jumpers are:

5i25 w1-dn, w2-up, w3-up, w4-up, w5-up
7i76 w1-left, w2-left, w3-left, w4-right, w5-right, w6-right

I am expecting 5v from the 5i25 to the 7i76 - i have applied 24v field pwr to 7i76

And both LED's are lit.

What is next?

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9 years 11 months ago #82993 by cts1085
QQ - Does it matter what the power up order is? - 7i76 before 5i25 or after?

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9 years 11 months ago #82995 by PCW
No power up order is unimportant but all power must be there before linuxcnc starts

what does

halrun
halcmd: loadrt hostmot2
halcmd: loadrt hm2_pci
halcmd: show all
report?

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9 years 11 months ago #82996 by cts1085
Here is the output:
Code:
cts@deb-linuxcnc:~$ halrun . halcmd: loadrt hostmot2 halcmd: loadrt hm2_pci halcmd: show all Loaded HAL Components: ID Type Name PID State 5 RT hm2_pci ready 3 User halcmd4014 4014 ready 4 RT hostmot2 ready Component Pins: Owner Type Dir Value Name 5 s32 OUT 0 hm2_5i25.0.encoder.00.count 5 s32 OUT 0 hm2_5i25.0.encoder.00.count-latched 5 bit I/O FALSE hm2_5i25.0.encoder.00.index-enable 5 bit OUT TRUE hm2_5i25.0.encoder.00.input-a 5 bit OUT FALSE hm2_5i25.0.encoder.00.input-b 5 bit OUT FALSE hm2_5i25.0.encoder.00.input-index 5 bit IN FALSE hm2_5i25.0.encoder.00.latch-enable 5 bit IN FALSE hm2_5i25.0.encoder.00.latch-polarity 5 float OUT 0 hm2_5i25.0.encoder.00.position 5 float OUT 0 hm2_5i25.0.encoder.00.position-latched 5 bit OUT FALSE hm2_5i25.0.encoder.00.quad-error 5 bit IN FALSE hm2_5i25.0.encoder.00.quad-error-enable 5 s32 OUT 1 hm2_5i25.0.encoder.00.rawcounts 5 s32 OUT 1 hm2_5i25.0.encoder.00.rawlatch 5 bit IN FALSE hm2_5i25.0.encoder.00.reset 5 float OUT 0 hm2_5i25.0.encoder.00.velocity 5 s32 OUT 0 hm2_5i25.0.encoder.01.count 5 s32 OUT 0 hm2_5i25.0.encoder.01.count-latched 5 bit I/O FALSE hm2_5i25.0.encoder.01.index-enable 5 bit OUT TRUE hm2_5i25.0.encoder.01.input-a 5 bit OUT TRUE hm2_5i25.0.encoder.01.input-b 5 bit OUT FALSE hm2_5i25.0.encoder.01.input-index 5 bit IN FALSE hm2_5i25.0.encoder.01.latch-enable 5 bit IN FALSE hm2_5i25.0.encoder.01.latch-polarity 5 float OUT 0 hm2_5i25.0.encoder.01.position 5 float OUT 0 hm2_5i25.0.encoder.01.position-latched 5 bit OUT FALSE hm2_5i25.0.encoder.01.quad-error 5 bit IN FALSE hm2_5i25.0.encoder.01.quad-error-enable 5 s32 OUT 0 hm2_5i25.0.encoder.01.rawcounts 5 s32 OUT 0 hm2_5i25.0.encoder.01.rawlatch 5 bit IN FALSE hm2_5i25.0.encoder.01.reset 5 float OUT 0 hm2_5i25.0.encoder.01.velocity 5 u32 IN 0x00001FC8 hm2_5i25.0.encoder.sample-frequency 5 bit OUT FALSE hm2_5i25.0.gpio.000.in 5 bit OUT TRUE hm2_5i25.0.gpio.000.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.001.in 5 bit OUT TRUE hm2_5i25.0.gpio.001.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.002.in 5 bit OUT TRUE hm2_5i25.0.gpio.002.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.003.in 5 bit OUT TRUE hm2_5i25.0.gpio.003.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.004.in 5 bit OUT TRUE hm2_5i25.0.gpio.004.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.005.in 5 bit OUT TRUE hm2_5i25.0.gpio.005.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.006.in 5 bit OUT TRUE hm2_5i25.0.gpio.006.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.007.in 5 bit OUT TRUE hm2_5i25.0.gpio.007.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.008.in 5 bit OUT TRUE hm2_5i25.0.gpio.008.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.009.in 5 bit OUT TRUE hm2_5i25.0.gpio.009.in_not 5 bit OUT TRUE hm2_5i25.0.gpio.010.in 5 bit OUT FALSE hm2_5i25.0.gpio.010.in_not 5 bit IN FALSE hm2_5i25.0.gpio.010.out 5 bit OUT FALSE hm2_5i25.0.gpio.011.in 5 bit OUT TRUE hm2_5i25.0.gpio.011.in_not 5 bit IN FALSE hm2_5i25.0.gpio.011.out 5 bit OUT TRUE hm2_5i25.0.gpio.012.in 5 bit OUT FALSE hm2_5i25.0.gpio.012.in_not 5 bit IN FALSE hm2_5i25.0.gpio.012.out 5 bit OUT TRUE hm2_5i25.0.gpio.013.in 5 bit OUT FALSE hm2_5i25.0.gpio.013.in_not 5 bit IN FALSE hm2_5i25.0.gpio.013.out 5 bit OUT TRUE hm2_5i25.0.gpio.014.in 5 bit OUT FALSE hm2_5i25.0.gpio.014.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.015.in 5 bit OUT TRUE hm2_5i25.0.gpio.015.in_not 5 bit OUT TRUE hm2_5i25.0.gpio.016.in 5 bit OUT FALSE hm2_5i25.0.gpio.016.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.017.in 5 bit OUT TRUE hm2_5i25.0.gpio.017.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.018.in 5 bit OUT TRUE hm2_5i25.0.gpio.018.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.019.in 5 bit OUT TRUE hm2_5i25.0.gpio.019.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.020.in 5 bit OUT TRUE hm2_5i25.0.gpio.020.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.021.in 5 bit OUT TRUE hm2_5i25.0.gpio.021.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.022.in 5 bit OUT TRUE hm2_5i25.0.gpio.022.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.023.in 5 bit OUT TRUE hm2_5i25.0.gpio.023.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.024.in 5 bit OUT TRUE hm2_5i25.0.gpio.024.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.025.in 5 bit OUT TRUE hm2_5i25.0.gpio.025.in_not 5 bit OUT FALSE hm2_5i25.0.gpio.026.in 5 bit OUT TRUE hm2_5i25.0.gpio.026.in_not 5 bit OUT TRUE hm2_5i25.0.gpio.027.in 5 bit OUT FALSE hm2_5i25.0.gpio.027.in_not 5 bit IN FALSE hm2_5i25.0.gpio.027.out 5 bit OUT TRUE hm2_5i25.0.gpio.028.in 5 bit OUT FALSE hm2_5i25.0.gpio.028.in_not 5 bit IN FALSE hm2_5i25.0.gpio.028.out 5 bit OUT TRUE hm2_5i25.0.gpio.029.in 5 bit OUT FALSE hm2_5i25.0.gpio.029.in_not 5 bit IN FALSE hm2_5i25.0.gpio.029.out 5 bit OUT TRUE hm2_5i25.0.gpio.030.in 5 bit OUT FALSE hm2_5i25.0.gpio.030.in_not 5 bit IN FALSE hm2_5i25.0.gpio.030.out 5 bit OUT TRUE hm2_5i25.0.gpio.031.in 5 bit OUT FALSE hm2_5i25.0.gpio.031.in_not 5 bit OUT TRUE hm2_5i25.0.gpio.032.in 5 bit OUT FALSE hm2_5i25.0.gpio.032.in_not 5 bit OUT TRUE hm2_5i25.0.gpio.033.in 5 bit OUT FALSE hm2_5i25.0.gpio.033.in_not 5 bit IN FALSE hm2_5i25.0.led.CR01 5 bit IN FALSE hm2_5i25.0.led.CR02 5 s32 OUT 0 hm2_5i25.0.read.time 5 s32 OUT 0 hm2_5i25.0.read_gpio.time 5 bit IN FALSE hm2_5i25.0.stepgen.00.control-type 5 s32 OUT 0 hm2_5i25.0.stepgen.00.counts 5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_err_at_match 5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_ff_vel 5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_pos_minus_prev_cmd 5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_s_to_match 5 s32 OUT 0 hm2_5i25.0.stepgen.00.dbg_step_rate 5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_vel_error 5 bit IN FALSE hm2_5i25.0.stepgen.00.enable 5 float IN 0 hm2_5i25.0.stepgen.00.position-cmd 5 float OUT 0 hm2_5i25.0.stepgen.00.position-fb 5 float IN 0 hm2_5i25.0.stepgen.00.velocity-cmd 5 float OUT 0 hm2_5i25.0.stepgen.00.velocity-fb 5 bit IN FALSE hm2_5i25.0.stepgen.01.control-type 5 s32 OUT 0 hm2_5i25.0.stepgen.01.counts 5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_err_at_match 5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_ff_vel 5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_pos_minus_prev_cmd 5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_s_to_match 5 s32 OUT 0 hm2_5i25.0.stepgen.01.dbg_step_rate 5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_vel_error 5 bit IN FALSE hm2_5i25.0.stepgen.01.enable 5 float IN 0 hm2_5i25.0.stepgen.01.position-cmd 5 float OUT 0 hm2_5i25.0.stepgen.01.position-fb 5 float IN 0 hm2_5i25.0.stepgen.01.velocity-cmd 5 float OUT 0 hm2_5i25.0.stepgen.01.velocity-fb 5 bit IN FALSE hm2_5i25.0.stepgen.02.control-type 5 s32 OUT 0 hm2_5i25.0.stepgen.02.counts 5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_err_at_match 5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_ff_vel 5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_pos_minus_prev_cmd 5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_s_to_match 5 s32 OUT 0 hm2_5i25.0.stepgen.02.dbg_step_rate 5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_vel_error 5 bit IN FALSE hm2_5i25.0.stepgen.02.enable 5 float IN 0 hm2_5i25.0.stepgen.02.position-cmd 5 float OUT 0 hm2_5i25.0.stepgen.02.position-fb 5 float IN 0 hm2_5i25.0.stepgen.02.velocity-cmd 5 float OUT 0 hm2_5i25.0.stepgen.02.velocity-fb 5 bit IN FALSE hm2_5i25.0.stepgen.03.control-type 5 s32 OUT 0 hm2_5i25.0.stepgen.03.counts 5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_err_at_match 5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_ff_vel 5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_pos_minus_prev_cmd 5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_s_to_match 5 s32 OUT 0 hm2_5i25.0.stepgen.03.dbg_step_rate 5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_vel_error 5 bit IN FALSE hm2_5i25.0.stepgen.03.enable 5 float IN 0 hm2_5i25.0.stepgen.03.position-cmd 5 float OUT 0 hm2_5i25.0.stepgen.03.position-fb 5 float IN 0 hm2_5i25.0.stepgen.03.velocity-cmd 5 float OUT 0 hm2_5i25.0.stepgen.03.velocity-fb 5 bit IN FALSE hm2_5i25.0.stepgen.04.control-type 5 s32 OUT 0 hm2_5i25.0.stepgen.04.counts 5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_err_at_match 5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_ff_vel 5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_pos_minus_prev_cmd 5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_s_to_match 5 s32 OUT 0 hm2_5i25.0.stepgen.04.dbg_step_rate 5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_vel_error 5 bit IN FALSE hm2_5i25.0.stepgen.04.enable 5 float IN 0 hm2_5i25.0.stepgen.04.position-cmd 5 float OUT 0 hm2_5i25.0.stepgen.04.position-fb 5 float IN 0 hm2_5i25.0.stepgen.04.velocity-cmd 5 float OUT 0 hm2_5i25.0.stepgen.04.velocity-fb 5 bit IN FALSE hm2_5i25.0.stepgen.05.control-type 5 s32 OUT 0 hm2_5i25.0.stepgen.05.counts 5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_err_at_match 5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_ff_vel 5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_pos_minus_prev_cmd 5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_s_to_match 5 s32 OUT 0 hm2_5i25.0.stepgen.05.dbg_step_rate 5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_vel_error 5 bit IN FALSE hm2_5i25.0.stepgen.05.enable 5 float IN 0 hm2_5i25.0.stepgen.05.position-cmd 5 float OUT 0 hm2_5i25.0.stepgen.05.position-fb 5 float IN 0 hm2_5i25.0.stepgen.05.velocity-cmd 5 float OUT 0 hm2_5i25.0.stepgen.05.velocity-fb 5 bit IN FALSE hm2_5i25.0.stepgen.06.control-type 5 s32 OUT 0 hm2_5i25.0.stepgen.06.counts 5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_err_at_match 5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_ff_vel 5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_pos_minus_prev_cmd 5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_s_to_match 5 s32 OUT 0 hm2_5i25.0.stepgen.06.dbg_step_rate 5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_vel_error 5 bit IN FALSE hm2_5i25.0.stepgen.06.enable 5 float IN 0 hm2_5i25.0.stepgen.06.position-cmd 5 float OUT 0 hm2_5i25.0.stepgen.06.position-fb 5 float IN 0 hm2_5i25.0.stepgen.06.velocity-cmd 5 float OUT 0 hm2_5i25.0.stepgen.06.velocity-fb 5 bit IN FALSE hm2_5i25.0.stepgen.07.control-type 5 s32 OUT 0 hm2_5i25.0.stepgen.07.counts 5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_err_at_match 5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_ff_vel 5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_pos_minus_prev_cmd 5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_s_to_match 5 s32 OUT 0 hm2_5i25.0.stepgen.07.dbg_step_rate 5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_vel_error 5 bit IN FALSE hm2_5i25.0.stepgen.07.enable 5 float IN 0 hm2_5i25.0.stepgen.07.position-cmd 5 float OUT 0 hm2_5i25.0.stepgen.07.position-fb 5 float IN 0 hm2_5i25.0.stepgen.07.velocity-cmd 5 float OUT 0 hm2_5i25.0.stepgen.07.velocity-fb 5 bit IN FALSE hm2_5i25.0.stepgen.08.control-type 5 s32 OUT 0 hm2_5i25.0.stepgen.08.counts 5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_err_at_match 5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_ff_vel 5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_pos_minus_prev_cmd 5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_s_to_match 5 s32 OUT 0 hm2_5i25.0.stepgen.08.dbg_step_rate 5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_vel_error 5 bit IN FALSE hm2_5i25.0.stepgen.08.enable 5 float IN 0 hm2_5i25.0.stepgen.08.position-cmd 5 float OUT 0 hm2_5i25.0.stepgen.08.position-fb 5 float IN 0 hm2_5i25.0.stepgen.08.velocity-cmd 5 float OUT 0 hm2_5i25.0.stepgen.08.velocity-fb 5 bit IN FALSE hm2_5i25.0.stepgen.09.control-type 5 s32 OUT 0 hm2_5i25.0.stepgen.09.counts 5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_err_at_match 5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_ff_vel 5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_pos_minus_prev_cmd 5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_s_to_match 5 s32 OUT 0 hm2_5i25.0.stepgen.09.dbg_step_rate 5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_vel_error 5 bit IN FALSE hm2_5i25.0.stepgen.09.enable 5 float IN 0 hm2_5i25.0.stepgen.09.position-cmd 5 float OUT 0 hm2_5i25.0.stepgen.09.position-fb 5 float IN 0 hm2_5i25.0.stepgen.09.velocity-cmd 5 float OUT 0 hm2_5i25.0.stepgen.09.velocity-fb 5 bit I/O FALSE hm2_5i25.0.watchdog.has_bit 5 s32 OUT 0 hm2_5i25.0.write.time 5 s32 OUT 0 hm2_5i25.0.write_gpio.time Pin Aliases: Alias Original Name Signals: Type Value Name (linked to) Parameters: Owner Type Dir Value Name 5 bit RW FALSE hm2_5i25.0.encoder.00.counter-mode 5 bit RW TRUE hm2_5i25.0.encoder.00.filter 5 bit RW FALSE hm2_5i25.0.encoder.00.index-invert 5 bit RW FALSE hm2_5i25.0.encoder.00.index-mask 5 bit RW FALSE hm2_5i25.0.encoder.00.index-mask-invert 5 float RW 1 hm2_5i25.0.encoder.00.scale 5 float RW 0.5 hm2_5i25.0.encoder.00.vel-timeout 5 bit RW FALSE hm2_5i25.0.encoder.01.counter-mode 5 bit RW TRUE hm2_5i25.0.encoder.01.filter 5 bit RW FALSE hm2_5i25.0.encoder.01.index-invert 5 bit RW FALSE hm2_5i25.0.encoder.01.index-mask 5 bit RW FALSE hm2_5i25.0.encoder.01.index-mask-invert 5 float RW 1 hm2_5i25.0.encoder.01.scale 5 float RW 0.5 hm2_5i25.0.encoder.01.vel-timeout 5 bit RW FALSE hm2_5i25.0.gpio.000.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.000.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.001.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.001.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.002.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.002.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.003.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.003.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.004.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.004.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.005.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.005.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.006.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.006.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.007.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.007.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.008.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.008.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.009.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.009.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.010.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.010.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.010.is_output 5 bit RW FALSE hm2_5i25.0.gpio.011.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.011.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.011.is_output 5 bit RW FALSE hm2_5i25.0.gpio.012.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.012.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.012.is_output 5 bit RW FALSE hm2_5i25.0.gpio.013.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.013.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.013.is_output 5 bit RW FALSE hm2_5i25.0.gpio.017.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.017.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.018.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.018.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.019.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.019.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.020.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.020.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.021.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.021.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.022.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.022.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.023.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.023.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.024.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.024.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.025.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.025.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.026.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.026.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.027.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.027.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.027.is_output 5 bit RW FALSE hm2_5i25.0.gpio.028.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.028.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.028.is_output 5 bit RW FALSE hm2_5i25.0.gpio.029.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.029.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.029.is_output 5 bit RW FALSE hm2_5i25.0.gpio.030.invert_output 5 bit RW FALSE hm2_5i25.0.gpio.030.is_opendrain 5 bit RW FALSE hm2_5i25.0.gpio.030.is_output 5 bit RW FALSE hm2_5i25.0.io_error 5 s32 RW 0 hm2_5i25.0.read.tmax 5 bit RO FALSE hm2_5i25.0.read.tmax-increased 5 s32 RW 0 hm2_5i25.0.read_gpio.tmax 5 bit RO FALSE hm2_5i25.0.read_gpio.tmax-increased 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.dirhold 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.dirsetup 5 float RW 1 hm2_5i25.0.stepgen.00.maxaccel 5 float RW 0 hm2_5i25.0.stepgen.00.maxvel 5 float RW 1 hm2_5i25.0.stepgen.00.position-scale 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.step_type 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.steplen 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.stepspace 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-0 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-1 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-2 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-3 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.dirhold 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.dirsetup 5 float RW 1 hm2_5i25.0.stepgen.01.maxaccel 5 float RW 0 hm2_5i25.0.stepgen.01.maxvel 5 float RW 1 hm2_5i25.0.stepgen.01.position-scale 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.step_type 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.steplen 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.stepspace 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-0 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-1 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-2 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-3 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.dirhold 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.dirsetup 5 float RW 1 hm2_5i25.0.stepgen.02.maxaccel 5 float RW 0 hm2_5i25.0.stepgen.02.maxvel 5 float RW 1 hm2_5i25.0.stepgen.02.position-scale 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.step_type 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.steplen 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.stepspace 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-0 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-1 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-2 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-3 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.dirhold 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.dirsetup 5 float RW 1 hm2_5i25.0.stepgen.03.maxaccel 5 float RW 0 hm2_5i25.0.stepgen.03.maxvel 5 float RW 1 hm2_5i25.0.stepgen.03.position-scale 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.step_type 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.steplen 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.stepspace 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-0 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-1 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-2 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-3 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.dirhold 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.dirsetup 5 float RW 1 hm2_5i25.0.stepgen.04.maxaccel 5 float RW 0 hm2_5i25.0.stepgen.04.maxvel 5 float RW 1 hm2_5i25.0.stepgen.04.position-scale 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.step_type 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.steplen 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.stepspace 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-0 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-1 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-2 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-3 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.dirhold 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.dirsetup 5 float RW 1 hm2_5i25.0.stepgen.05.maxaccel 5 float RW 0 hm2_5i25.0.stepgen.05.maxvel 5 float RW 1 hm2_5i25.0.stepgen.05.position-scale 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.step_type 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.steplen 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.stepspace 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-0 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-1 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-2 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-3 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.dirhold 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.dirsetup 5 float RW 1 hm2_5i25.0.stepgen.06.maxaccel 5 float RW 0 hm2_5i25.0.stepgen.06.maxvel 5 float RW 1 hm2_5i25.0.stepgen.06.position-scale 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.step_type 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.steplen 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.stepspace 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-0 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-1 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-2 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-3 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.dirhold 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.dirsetup 5 float RW 1 hm2_5i25.0.stepgen.07.maxaccel 5 float RW 0 hm2_5i25.0.stepgen.07.maxvel 5 float RW 1 hm2_5i25.0.stepgen.07.position-scale 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.step_type 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.steplen 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.stepspace 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-0 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-1 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-2 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-3 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.08.dirhold 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.08.dirsetup 5 float RW 1 hm2_5i25.0.stepgen.08.maxaccel 5 float RW 0 hm2_5i25.0.stepgen.08.maxvel 5 float RW 1 hm2_5i25.0.stepgen.08.position-scale 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.08.step_type 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.08.steplen 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.08.stepspace 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.08.table-data-0 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.08.table-data-1 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.08.table-data-2 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.08.table-data-3 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.09.dirhold 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.09.dirsetup 5 float RW 1 hm2_5i25.0.stepgen.09.maxaccel 5 float RW 0 hm2_5i25.0.stepgen.09.maxvel 5 float RW 1 hm2_5i25.0.stepgen.09.position-scale 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.09.step_type 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.09.steplen 5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.09.stepspace 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.09.table-data-0 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.09.table-data-1 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.09.table-data-2 5 u32 RW 0x00000000 hm2_5i25.0.stepgen.09.table-data-3 5 u32 RW 0x004C4B40 hm2_5i25.0.watchdog.timeout_ns 5 s32 RW 0 hm2_5i25.0.write.tmax 5 bit RO FALSE hm2_5i25.0.write.tmax-increased 5 s32 RW 0 hm2_5i25.0.write_gpio.tmax 5 bit RO FALSE hm2_5i25.0.write_gpio.tmax-increased Parameter Aliases: Alias Original Name Exported Functions: Owner CodeAddr Arg FP Users Name 00005 f88e9890 f3704000 YES 0 hm2_5i25.0.read 00005 f88e9500 f3704000 YES 0 hm2_5i25.0.read_gpio 00005 f88e9760 f3704000 YES 0 hm2_5i25.0.write 00005 f88e9730 f3704000 YES 0 hm2_5i25.0.write_gpio Realtime Threads: Period FP Name ( Time, Max-Time )

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9 years 11 months ago #82997 by PCW
OK so no sserial, so like a hardware issue with the 5I25/7I76/cable so they should probably be returned as a set for evaluation

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