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Mesa 7i77 not working after switching 7i96 to 7i96s
3 years 11 months ago #257335
by markkram
Mesa 7i77 not working after switching 7i96 to 7i96s was created by markkram
Hello, I'm pretty new to this whole LinuxCNC thing so please be patient if I don't know a lot.
After my 7i96 broke, I replaced it with a 7i96s due to supply. I then updated mesaflash and linuxcnc from 2.8.3 to 2.8.4 and quickly threw together a configuration with pncconf to check if the card was detected. Until then everything seemed fine, but after connecting the 7i77, none of the doughtercard pins like hm2_7i69s.0.7i77.0.0.input-XX were found. Also CR16 is on permanently.
So to make it short, even though everything is connected like before, nothing seems to recognize the 7i77. Can someone tell me where to look for errors? I'm out of ideas.
Thanks a lot in advance,
Mark
After my 7i96 broke, I replaced it with a 7i96s due to supply. I then updated mesaflash and linuxcnc from 2.8.3 to 2.8.4 and quickly threw together a configuration with pncconf to check if the card was detected. Until then everything seemed fine, but after connecting the 7i77, none of the doughtercard pins like hm2_7i69s.0.7i77.0.0.input-XX were found. Also CR16 is on permanently.
So to make it short, even though everything is connected like before, nothing seems to recognize the 7i77. Can someone tell me where to look for errors? I'm out of ideas.
Thanks a lot in advance,
Mark
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3 years 11 months ago #257338
by PCW
Replied by PCW on topic Mesa 7i77 not working after switching 7i96 to 7i96s
Does the 7I77 have 5V power?
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3 years 11 months ago #257342
by markkram
Replied by markkram on topic Mesa 7i77 not working after switching 7i96 to 7i96s
Yes, CR1,3,5,7 are on
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3 years 11 months ago #257343
by PCW
Replied by PCW on topic Mesa 7i77 not working after switching 7i96 to 7i96s
What happened to the 7I96?, it is possible the 7I77 was damaged
at the same time?
I can try that board combination later today to verify that there are no
firmware issues
at the same time?
I can try that board combination later today to verify that there are no
firmware issues
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3 years 11 months ago #257344
by markkram
Replied by markkram on topic Mesa 7i77 not working after switching 7i96 to 7i96s
I switched out the 7i77 as well, sorry I forgot to mention that.
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3 years 11 months ago #257346
by PCW
Replied by PCW on topic Mesa 7i77 not working after switching 7i96 to 7i96s
7I77 W4 and W12 in left hand position?
Also what is the LinuxCNC startup printout?
(Best done by starting LinuxCNC in a terminal window)
Edit: Tested 7I96S+7I77 with 7i96s_7i77d.bit firmware and it works correctly
so the problem is likely specific to your setup. Could be a bad card or cable
or some kind of more global issue.
Also what is the LinuxCNC startup printout?
(Best done by starting LinuxCNC in a terminal window)
Edit: Tested 7I96S+7I77 with 7i96s_7i77d.bit firmware and it works correctly
so the problem is likely specific to your setup. Could be a bad card or cable
or some kind of more global issue.
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3 years 11 months ago #257471
by markkram
Replied by markkram on topic Mesa 7i77 not working after switching 7i96 to 7i96s
Thanks a lot for testing the setup!
W4 and W12 are in left hand position. After starting Linuxcnc from terminal, I get the following (I don't know if you meant this with startup printout, I'm really new to Linux):
W4 and W12 are in left hand position. After starting Linuxcnc from terminal, I get the following (I don't know if you meant this with startup printout, I'm really new to Linux):
Warning: Spoiler!
Code:
cnc@debian:~$ linuxcnc
LINUXCNC - 2.8.4
Machine configuration directory is '/home/cnc/linuxcnc/configs/Kühn_GNC1_V08'
Machine configuration file is 'GNC1.ini'
Starting LinuxCNC...
Found file(REL): ./GNC1.hal
Note: Using POSIX realtime
hm2: loading Mesa HostMot2 driver version 0.15
hm2_eth: loading Mesa AnyIO HostMot2 ethernet driver version 0.2
hm2_eth: 192.168.1.121: INFO: Hardware address (MAC): 00:60:1b:16:83:62
hm2_eth: discovered 7I96S
hm2/hm2_7i96s.0: Low Level init 0.15
hm2/hm2_7i96s.0: IDRom:
hm2/hm2_7i96s.0: IDRom Type: 0x00000003
hm2/hm2_7i96s.0: Offset to Modules: 0x00000040
hm2/hm2_7i96s.0: Offset to Pin Description: 0x000001C0
hm2/hm2_7i96s.0: Board Name: MESA7I96
hm2/hm2_7i96s.0: FPGA Size: 20
hm2/hm2_7i96s.0: FPGA Pins: 256
hm2/hm2_7i96s.0: Port Width: 17
hm2/hm2_7i96s.0: IO Ports: 3
hm2/hm2_7i96s.0: IO Width: 51
hm2/hm2_7i96s.0: Clock Low: 100000000 Hz (100000 KHz, 100 MHz)
hm2/hm2_7i96s.0: Clock High: 200000000 Hz (200000 KHz, 200 MHz)
hm2/hm2_7i96s.0: Instance Stride 0: 0x00000004
hm2/hm2_7i96s.0: Instance Stride 1: 0x00000040
hm2/hm2_7i96s.0: Register Stride 0: 0x00000100
hm2/hm2_7i96s.0: Register Stride 1: 0x00000100
hm2/hm2_7i96s.0: 51 HM2 Pin Descriptors:
hm2/hm2_7i96s.0: pin 0:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x23 (InM Input Module)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x01 (in0, Input)
hm2/hm2_7i96s.0: pin 1:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x23 (InM Input Module)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x02 (in1, Input)
hm2/hm2_7i96s.0: pin 2:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x23 (InM Input Module)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x03 (in2, Input)
hm2/hm2_7i96s.0: pin 3:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x23 (InM Input Module)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x04 (in3, Input)
hm2/hm2_7i96s.0: pin 4:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x23 (InM Input Module)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x05 (in4, Input)
hm2/hm2_7i96s.0: pin 5:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x23 (InM Input Module)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x06 (in5, Input)
hm2/hm2_7i96s.0: pin 6:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x23 (InM Input Module)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x07 (in6, Input)
hm2/hm2_7i96s.0: pin 7:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x23 (InM Input Module)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x08 (in7, Input)
hm2/hm2_7i96s.0: pin 8:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x23 (InM Input Module)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x09 (in8, Input)
hm2/hm2_7i96s.0: pin 9:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x23 (InM Input Module)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x0A (in9, Input)
hm2/hm2_7i96s.0: pin 10:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x23 (InM Input Module)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x0B (in10, Input)
hm2/hm2_7i96s.0: pin 11:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0xC3 (SSR)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x81 (Out-00, Output)
hm2/hm2_7i96s.0: pin 12:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0xC3 (SSR)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x82 (Out-01, Output)
hm2/hm2_7i96s.0: pin 13:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0xC3 (SSR)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x83 (Out-02, Output)
hm2/hm2_7i96s.0: pin 14:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0xC3 (SSR)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x84 (Out-03, Output)
hm2/hm2_7i96s.0: pin 15:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x2D (OutM Output Module)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x85 (Out-04, Output)
hm2/hm2_7i96s.0: pin 16:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x2D (OutM Output Module)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x86 (Out-05, Output)
hm2/hm2_7i96s.0: pin 17:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x05 (StepGen)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x81 (Step, Output)
hm2/hm2_7i96s.0: pin 18:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x05 (StepGen)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x82 (Direction, Output)
hm2/hm2_7i96s.0: pin 19:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x05 (StepGen)
hm2/hm2_7i96s.0: Secondary Unit: 0x01
hm2/hm2_7i96s.0: Secondary Pin: 0x81 (Step, Output)
hm2/hm2_7i96s.0: pin 20:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x05 (StepGen)
hm2/hm2_7i96s.0: Secondary Unit: 0x01
hm2/hm2_7i96s.0: Secondary Pin: 0x82 (Direction, Output)
hm2/hm2_7i96s.0: pin 21:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x05 (StepGen)
hm2/hm2_7i96s.0: Secondary Unit: 0x02
hm2/hm2_7i96s.0: Secondary Pin: 0x81 (Step, Output)
hm2/hm2_7i96s.0: pin 22:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x05 (StepGen)
hm2/hm2_7i96s.0: Secondary Unit: 0x02
hm2/hm2_7i96s.0: Secondary Pin: 0x82 (Direction, Output)
hm2/hm2_7i96s.0: pin 23:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x05 (StepGen)
hm2/hm2_7i96s.0: Secondary Unit: 0x03
hm2/hm2_7i96s.0: Secondary Pin: 0x81 (Step, Output)
hm2/hm2_7i96s.0: pin 24:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x05 (StepGen)
hm2/hm2_7i96s.0: Secondary Unit: 0x03
hm2/hm2_7i96s.0: Secondary Pin: 0x82 (Direction, Output)
hm2/hm2_7i96s.0: pin 25:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x05 (StepGen)
hm2/hm2_7i96s.0: Secondary Unit: 0x04
hm2/hm2_7i96s.0: Secondary Pin: 0x81 (Step, Output)
hm2/hm2_7i96s.0: pin 26:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x05 (StepGen)
hm2/hm2_7i96s.0: Secondary Unit: 0x04
hm2/hm2_7i96s.0: Secondary Pin: 0x82 (Direction, Output)
hm2/hm2_7i96s.0: pin 27:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x04 (Encoder)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x01 (A, Input)
hm2/hm2_7i96s.0: pin 28:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x04 (Encoder)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x02 (B, Input)
hm2/hm2_7i96s.0: pin 29:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0x04 (Encoder)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x03 (Index, Input)
hm2/hm2_7i96s.0: pin 30:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0xC1 (Smart Serial Interface)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x01 (rx0, Input)
hm2/hm2_7i96s.0: pin 31:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0xC1 (Smart Serial Interface)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x81 (tx0, Output)
hm2/hm2_7i96s.0: pin 32:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0xC1 (Smart Serial Interface)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0x91 (txen0, Output)
hm2/hm2_7i96s.0: pin 33:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Secondary Tag: 0xC3 (SSR)
hm2/hm2_7i96s.0: Secondary Unit: 0x00
hm2/hm2_7i96s.0: Secondary Pin: 0xA0 (AC Ref (internal), Output)
hm2/hm2_7i96s.0: pin 34:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 35:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 36:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 37:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 38:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 39:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 40:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 41:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 42:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 43:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 44:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 45:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 46:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 47:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 48:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 49:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: pin 50:
hm2/hm2_7i96s.0: Primary Tag: 0x03 (IOPort)
hm2/hm2_7i96s.0: Module Descriptor 0 at 0x0440:
hm2/hm2_7i96s.0: General Function Tag: 26 (Hostmot2 DPLL)
hm2/hm2_7i96s.0: Version: 0
hm2/hm2_7i96s.0: Clock Tag: 1 (100.000 MHz)
hm2/hm2_7i96s.0: Instances: 1
hm2/hm2_7i96s.0: Base Address: 0x7000
hm2/hm2_7i96s.0: -- Num Registers: 7
hm2/hm2_7i96s.0: Register Stride: 0x00000100
hm2/hm2_7i96s.0: -- Instance Stride: 0x00000004
hm2/hm2_7i96s.0: -- Multiple Registers: 0x00000000
hm2/hm2_7i96s.0: Module Descriptor 1 at 0x044C:
hm2/hm2_7i96s.0: General Function Tag: 2 (Watchdog)
hm2/hm2_7i96s.0: Version: 0
hm2/hm2_7i96s.0: Clock Tag: 1 (100.000 MHz)
hm2/hm2_7i96s.0: Instances: 1
hm2/hm2_7i96s.0: Base Address: 0x0C00
hm2/hm2_7i96s.0: -- Num Registers: 3
hm2/hm2_7i96s.0: Register Stride: 0x00000100
hm2/hm2_7i96s.0: -- Instance Stride: 0x00000004
hm2/hm2_7i96s.0: -- Multiple Registers: 0x00000000
hm2/hm2_7i96s.0: Module Descriptor 2 at 0x0458:
hm2/hm2_7i96s.0: General Function Tag: 3 (IOPort)
hm2/hm2_7i96s.0: Version: 0
hm2/hm2_7i96s.0: Clock Tag: 1 (100.000 MHz)
hm2/hm2_7i96s.0: Instances: 3
hm2/hm2_7i96s.0: Base Address: 0x1000
hm2/hm2_7i96s.0: -- Num Registers: 5
hm2/hm2_7i96s.0: Register Stride: 0x00000100
hm2/hm2_7i96s.0: -- Instance Stride: 0x00000004
hm2/hm2_7i96s.0: -- Multiple Registers: 0x0000001F
hm2/hm2_7i96s.0: Module Descriptor 3 at 0x0464:
hm2/hm2_7i96s.0: General Function Tag: 45 (OutM Output Module)
hm2/hm2_7i96s.0: Version: 0
hm2/hm2_7i96s.0: Clock Tag: 1 (100.000 MHz)
hm2/hm2_7i96s.0: Instances: 1
hm2/hm2_7i96s.0: Base Address: 0xB000
hm2/hm2_7i96s.0: -- Num Registers: 1
hm2/hm2_7i96s.0: Register Stride: 0x00000100
hm2/hm2_7i96s.0: -- Instance Stride: 0x00000004
hm2/hm2_7i96s.0: -- Multiple Registers: 0x00000001
hm2/hm2_7i96s.0: Module Descriptor 4 at 0x0470:
hm2/hm2_7i96s.0: General Function Tag: 6 (PWMGen)
hm2/hm2_7i96s.0: Version: 0
hm2/hm2_7i96s.0: Clock Tag: 2 (200.000 MHz)
hm2/hm2_7i96s.0: Instances: 1
hm2/hm2_7i96s.0: Base Address: 0x4100
hm2/hm2_7i96s.0: -- Num Registers: 5
hm2/hm2_7i96s.0: Register Stride: 0x00000100
hm2/hm2_7i96s.0: -- Instance Stride: 0x00000004
hm2/hm2_7i96s.0: -- Multiple Registers: 0x00000003
hm2/hm2_7i96s.0: Module Descriptor 5 at 0x047C:
hm2/hm2_7i96s.0: General Function Tag: 5 (StepGen)
hm2/hm2_7i96s.0: Version: 2
hm2/hm2_7i96s.0: Clock Tag: 1 (100.000 MHz)
hm2/hm2_7i96s.0: Instances: 5
hm2/hm2_7i96s.0: Base Address: 0x2000
hm2/hm2_7i96s.0: -- Num Registers: 10
hm2/hm2_7i96s.0: Register Stride: 0x00000100
hm2/hm2_7i96s.0: -- Instance Stride: 0x00000004
hm2/hm2_7i96s.0: -- Multiple Registers: 0x000001FF
hm2/hm2_7i96s.0: Module Descriptor 6 at 0x0488:
hm2/hm2_7i96s.0: General Function Tag: 4 (Encoder)
hm2/hm2_7i96s.0: Version: 2
hm2/hm2_7i96s.0: Clock Tag: 1 (100.000 MHz)
hm2/hm2_7i96s.0: Instances: 1
hm2/hm2_7i96s.0: Base Address: 0x3000
hm2/hm2_7i96s.0: -- Num Registers: 5
hm2/hm2_7i96s.0: Register Stride: 0x00000100
hm2/hm2_7i96s.0: -- Instance Stride: 0x00000004
hm2/hm2_7i96s.0: -- Multiple Registers: 0x00000003
hm2/hm2_7i96s.0: Module Descriptor 7 at 0x0494:
hm2/hm2_7i96s.0: General Function Tag: 193 (Smart Serial Interface)
hm2/hm2_7i96s.0: Version: 0
hm2/hm2_7i96s.0: Clock Tag: 1 (100.000 MHz)
hm2/hm2_7i96s.0: Instances: 1
hm2/hm2_7i96s.0: Base Address: 0x5B00
hm2/hm2_7i96s.0: -- Num Registers: 6
hm2/hm2_7i96s.0: Register Stride: 0x00000100
hm2/hm2_7i96s.0: -- Instance Stride: 0x00000040
hm2/hm2_7i96s.0: -- Multiple Registers: 0x0000003C
hm2/hm2_7i96s.0: Module Descriptor 8 at 0x04A0:
hm2/hm2_7i96s.0: General Function Tag: 195 (SSR)
hm2/hm2_7i96s.0: Version: 0
hm2/hm2_7i96s.0: Clock Tag: 1 (100.000 MHz)
hm2/hm2_7i96s.0: Instances: 1
hm2/hm2_7i96s.0: Base Address: 0x7D00
hm2/hm2_7i96s.0: -- Num Registers: 2
hm2/hm2_7i96s.0: Register Stride: 0x00000100
hm2/hm2_7i96s.0: -- Instance Stride: 0x00000004
hm2/hm2_7i96s.0: -- Multiple Registers: 0x00000003
hm2/hm2_7i96s.0: Module Descriptor 9 at 0x04AC:
hm2/hm2_7i96s.0: General Function Tag: 35 (InM Input Module)
hm2/hm2_7i96s.0: Version: 0
hm2/hm2_7i96s.0: Clock Tag: 1 (100.000 MHz)
hm2/hm2_7i96s.0: Instances: 1
hm2/hm2_7i96s.0: Base Address: 0x8500
hm2/hm2_7i96s.0: -- Num Registers: 5
hm2/hm2_7i96s.0: Register Stride: 0x00000100
hm2/hm2_7i96s.0: -- Instance Stride: 0x00000004
hm2/hm2_7i96s.0: -- Multiple Registers: 0x0000001F
hm2/hm2_7i96s.0: Module Descriptor 10 at 0x04B8:
hm2/hm2_7i96s.0: General Function Tag: 128 (LED)
hm2/hm2_7i96s.0: Version: 0
hm2/hm2_7i96s.0: Clock Tag: 1 (100.000 MHz)
hm2/hm2_7i96s.0: Instances: 1
hm2/hm2_7i96s.0: Base Address: 0x0200
hm2/hm2_7i96s.0: -- Num Registers: 1
hm2/hm2_7i96s.0: Register Stride: 0x00000100
hm2/hm2_7i96s.0: -- Instance Stride: 0x00000004
hm2/hm2_7i96s.0: -- Multiple Registers: 0x00000000
hm2/hm2_7i96s.0: Smart Serial Firmware Version 43
hm2/hm2_7i96s.0: 51 I/O Pins used:
hm2/hm2_7i96s.0: IO Pin 000 (TB3-01): InM Input Module #0, pin in0 (Input)
hm2/hm2_7i96s.0: IO Pin 001 (TB3-02): InM Input Module #0, pin in1 (Input)
hm2/hm2_7i96s.0: IO Pin 002 (TB3-03): InM Input Module #0, pin in2 (Input)
hm2/hm2_7i96s.0: IO Pin 003 (TB3-04): InM Input Module #0, pin in3 (Input)
hm2/hm2_7i96s.0: IO Pin 004 (TB3-05): InM Input Module #0, pin in4 (Input)
hm2/hm2_7i96s.0: IO Pin 005 (TB3-06): InM Input Module #0, pin in5 (Input)
hm2/hm2_7i96s.0: IO Pin 006 (TB3-07): InM Input Module #0, pin in6 (Input)
hm2/hm2_7i96s.0: IO Pin 007 (TB3-08): InM Input Module #0, pin in7 (Input)
hm2/hm2_7i96s.0: IO Pin 008 (TB3-09): InM Input Module #0, pin in8 (Input)
hm2/hm2_7i96s.0: IO Pin 009 (TB3-10): InM Input Module #0, pin in9 (Input)
hm2/hm2_7i96s.0: IO Pin 010 (TB3-11): InM Input Module #0, pin in10 (Input)
hm2/hm2_7i96s.0: IO Pin 011 (TB3-13/TB3-14): SSR #0, pin Out-00 (Output)
hm2/hm2_7i96s.0: IO Pin 012 (TB3-15/TB3-16): SSR #0, pin Out-01 (Output)
hm2/hm2_7i96s.0: IO Pin 013 (TB3-17/TB3-18): SSR #0, pin Out-02 (Output)
hm2/hm2_7i96s.0: IO Pin 014 (TB3-19/TB3-20): SSR #0, pin Out-03 (Output)
hm2/hm2_7i96s.0: IO Pin 015 (TB3-21/TB3-22): OutM Output Module #0, pin Out-04 (Output)
hm2/hm2_7i96s.0: IO Pin 016 (TB3-23/TB3-24): OutM Output Module #0, pin Out-05 (Output)
hm2/hm2_7i96s.0: IO Pin 017 (TB1-02/TB1-03): StepGen #0, pin Step (Output)
hm2/hm2_7i96s.0: IO Pin 018 (TB1-04/TB1-05): StepGen #0, pin Direction (Output)
hm2/hm2_7i96s.0: IO Pin 019 (TB1-08/TB1-09): StepGen #1, pin Step (Output)
hm2/hm2_7i96s.0: IO Pin 020 (TB1-10/TB1-11): StepGen #1, pin Direction (Output)
hm2/hm2_7i96s.0: IO Pin 021 (TB1-14/TB1-15): StepGen #2, pin Step (Output)
hm2/hm2_7i96s.0: IO Pin 022 (TB1-16/TB1-17): StepGen #2, pin Direction (Output)
hm2/hm2_7i96s.0: IO Pin 023 (TB1-20/TB1-21): StepGen #3, pin Step (Output)
hm2/hm2_7i96s.0: IO Pin 024 (TB1-22-TB1-23): StepGen #3, pin Direction (Output)
hm2/hm2_7i96s.0: IO Pin 025 (TB2-02/TB2-03): StepGen #4, pin Step (Output)
hm2/hm2_7i96s.0: IO Pin 026 (TB2-04/TB2-05): StepGen #4, pin Direction (Output)
hm2/hm2_7i96s.0: IO Pin 027 (TB2-07/TB2-08): Encoder #0, pin A (Input)
hm2/hm2_7i96s.0: IO Pin 028 (TB2-10/TB2-11): Encoder #0, pin B (Input)
hm2/hm2_7i96s.0: IO Pin 029 (TB2-13/TB2-14): Encoder #0, pin Index (Input)
hm2/hm2_7i96s.0: IO Pin 030 (TB2-16/TB2-17): IOPort
hm2/hm2_7i96s.0: IO Pin 031 (TB2-18/TB2-19): IOPort
hm2/hm2_7i96s.0: IO Pin 032 (internal): IOPort
hm2/hm2_7i96s.0: IO Pin 033 (internal): SSR #0, pin AC Ref (internal) (Output)
hm2/hm2_7i96s.0: IO Pin 034 (P1-01): IOPort
hm2/hm2_7i96s.0: IO Pin 035 (P1-02): IOPort
hm2/hm2_7i96s.0: IO Pin 036 (P1-03): IOPort
hm2/hm2_7i96s.0: IO Pin 037 (P1-04): IOPort
hm2/hm2_7i96s.0: IO Pin 038 (P1-05): IOPort
hm2/hm2_7i96s.0: IO Pin 039 (P1-06): IOPort
hm2/hm2_7i96s.0: IO Pin 040 (P1-07): IOPort
hm2/hm2_7i96s.0: IO Pin 041 (P1-08): IOPort
hm2/hm2_7i96s.0: IO Pin 042 (P1-09): IOPort
hm2/hm2_7i96s.0: IO Pin 043 (P1-11): IOPort
hm2/hm2_7i96s.0: IO Pin 044 (P1-13): IOPort
hm2/hm2_7i96s.0: IO Pin 045 (P1-15): IOPort
hm2/hm2_7i96s.0: IO Pin 046 (P1-17): IOPort
hm2/hm2_7i96s.0: IO Pin 047 (P1-19): IOPort
hm2/hm2_7i96s.0: IO Pin 048 (P1-21): IOPort
hm2/hm2_7i96s.0: IO Pin 049 (P1-23): IOPort
hm2/hm2_7i96s.0: IO Pin 050 (P1-25): IOPort
hm2/hm2_7i96s.0: HM2 Modules used:
hm2/hm2_7i96s.0: Encoders: 1
hm2/hm2_7i96s.0: clock_frequency: 100000000 Hz (100.000 MHz)
hm2/hm2_7i96s.0: version: 2
hm2/hm2_7i96s.0: counter_addr: 0x3000
hm2/hm2_7i96s.0: latch_control_addr: 0x3100
hm2/hm2_7i96s.0: timestamp_div_addr: 0x3200
hm2/hm2_7i96s.0: timestamp_count_addr: 0x3300
hm2/hm2_7i96s.0: filter_rate_addr: 0x3400
hm2/hm2_7i96s.0: timestamp_div: 0x0000
hm2/hm2_7i96s.0: instance 0:
hm2/hm2_7i96s.0: hw:
hm2/hm2_7i96s.0: counter = 000a.ffff
hm2/hm2_7i96s.0: latch/control = 0000.0800
hm2/hm2_7i96s.0: prev_control = 0000.0800
hm2/hm2_7i96s.0: StepGen: 5
hm2/hm2_7i96s.0: clock_frequency: 100000000 Hz (100.000 MHz)
hm2/hm2_7i96s.0: version: 2
hm2/hm2_7i96s.0: step_rate_addr: 0x2000
hm2/hm2_7i96s.0: accumulator_addr: 0x2100
hm2/hm2_7i96s.0: mode_addr: 0x2200
hm2/hm2_7i96s.0: dir_setup_time_addr: 0x2300
hm2/hm2_7i96s.0: dir_hold_time_addr: 0x2400
hm2/hm2_7i96s.0: pulse_width_addr: 0x2500
hm2/hm2_7i96s.0: pulse_idle_width_addr: 0x2600
hm2/hm2_7i96s.0: table_sequence_data_setup_addr: 0x2700
hm2/hm2_7i96s.0: table_sequence_length_addr: 0x2800
hm2/hm2_7i96s.0: master_dds_addr: 0x2900
hm2/hm2_7i96s.0: instance 0:
hm2/hm2_7i96s.0: enable = 0
hm2/hm2_7i96s.0: hw:
hm2/hm2_7i96s.0: step_rate = 0x00000000
hm2/hm2_7i96s.0: accumulator = 0x00000000
hm2/hm2_7i96s.0: mode = 0x00000000
hm2/hm2_7i96s.0: dir_setup_time = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: dir_hold_time = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: pulse_width = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: pulse_idle_width = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: instance 1:
hm2/hm2_7i96s.0: enable = 0
hm2/hm2_7i96s.0: hw:
hm2/hm2_7i96s.0: step_rate = 0x00000000
hm2/hm2_7i96s.0: accumulator = 0x00000000
hm2/hm2_7i96s.0: mode = 0x00000000
hm2/hm2_7i96s.0: dir_setup_time = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: dir_hold_time = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: pulse_width = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: pulse_idle_width = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: instance 2:
hm2/hm2_7i96s.0: enable = 0
hm2/hm2_7i96s.0: hw:
hm2/hm2_7i96s.0: step_rate = 0x00000000
hm2/hm2_7i96s.0: accumulator = 0x00000000
hm2/hm2_7i96s.0: mode = 0x00000000
hm2/hm2_7i96s.0: dir_setup_time = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: dir_hold_time = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: pulse_width = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: pulse_idle_width = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: instance 3:
hm2/hm2_7i96s.0: enable = 0
hm2/hm2_7i96s.0: hw:
hm2/hm2_7i96s.0: step_rate = 0x00000000
hm2/hm2_7i96s.0: accumulator = 0x00000000
hm2/hm2_7i96s.0: mode = 0x00000000
hm2/hm2_7i96s.0: dir_setup_time = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: dir_hold_time = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: pulse_width = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: pulse_idle_width = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: instance 4:
hm2/hm2_7i96s.0: enable = 0
hm2/hm2_7i96s.0: hw:
hm2/hm2_7i96s.0: step_rate = 0x00000000
hm2/hm2_7i96s.0: accumulator = 0x00000000
hm2/hm2_7i96s.0: mode = 0x00000000
hm2/hm2_7i96s.0: dir_setup_time = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: dir_hold_time = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: pulse_width = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: pulse_idle_width = 0x00003FFF (163830 ns)
hm2/hm2_7i96s.0: IO Ports: 3
hm2/hm2_7i96s.0: clock_frequency: 100000000 Hz (100.000 MHz)
hm2/hm2_7i96s.0: version: 0
hm2/hm2_7i96s.0: data_addr: 0x1000
hm2/hm2_7i96s.0: ddr_addr: 0x1100
hm2/hm2_7i96s.0: alt_source_addr: 0x1200
hm2/hm2_7i96s.0: open_drain_addr: 0x1300
hm2/hm2_7i96s.0: output_invert_addr: 0x1400
hm2/hm2_7i96s.0: instance 0:
hm2/hm2_7i96s.0: data_read = 0x018000
hm2/hm2_7i96s.0: data_write = 0x000000
hm2/hm2_7i96s.0: ddr = 0x000000
hm2/hm2_7i96s.0: alt_source = 0x01FFFF
hm2/hm2_7i96s.0: open_drain = 0x000000
hm2/hm2_7i96s.0: output_invert = 0x000000
hm2/hm2_7i96s.0: instance 1:
hm2/hm2_7i96s.0: data_read = 0x00CBFF
hm2/hm2_7i96s.0: data_write = 0x000000
hm2/hm2_7i96s.0: ddr = 0x000000
hm2/hm2_7i96s.0: alt_source = 0x011FFF
hm2/hm2_7i96s.0: open_drain = 0x000000
hm2/hm2_7i96s.0: output_invert = 0x000000
hm2/hm2_7i96s.0: instance 2:
hm2/hm2_7i96s.0: data_read = 0x00F0FF
hm2/hm2_7i96s.0: data_write = 0x000000
hm2/hm2_7i96s.0: ddr = 0x000000
hm2/hm2_7i96s.0: alt_source = 0x000000
hm2/hm2_7i96s.0: open_drain = 0x000000
hm2/hm2_7i96s.0: output_invert = 0x000000
hm2/hm2_7i96s.0: SSRs: 1
hm2/hm2_7i96s.0: clock_frequency: 100000000 Hz (100.000 MHz)
hm2/hm2_7i96s.0: version: 0
hm2/hm2_7i96s.0: data_addr: 0x7D00
hm2/hm2_7i96s.0: rate_addr: 0x7E00
hm2/hm2_7i96s.0: instance 0:
hm2/hm2_7i96s.0: data_reg = 0x00000000
hm2/hm2_7i96s.0: rate_reg = 0x00001030
hm2/hm2_7i96s.0: outms: 1
hm2/hm2_7i96s.0: clock_frequency: 100000000 Hz (100.000 MHz)
hm2/hm2_7i96s.0: version: 0
hm2/hm2_7i96s.0: data_addr: 0xB000
hm2/hm2_7i96s.0: instance 0:
hm2/hm2_7i96s.0: data_reg = 0x00000000
hm2/hm2_7i96s.0: Watchdog: 1
hm2/hm2_7i96s.0: clock_frequency: 100000000 Hz (100.000 MHz)
hm2/hm2_7i96s.0: version: 0
hm2/hm2_7i96s.0: timer_addr: 0x0C00
hm2/hm2_7i96s.0: status_addr: 0x0D00
hm2/hm2_7i96s.0: reset_addr: 0x0E00
hm2/hm2_7i96s.0: instance 0:
hm2/hm2_7i96s.0: param timeout_ns = 5000000
hm2/hm2_7i96s.0: pin has_bit = 0
hm2/hm2_7i96s.0: reg timer = 0x80000000
hm2/hm2_7i96s.0: inms: 1
hm2/hm2_7i96s.0: clock_frequency: 100000000 Hz (100.000 MHz)
hm2/hm2_7i96s.0: version: 0
hm2/hm2_7i96s.0: control_addr: 0x8500
hm2/hm2_7i96s.0: filter_addr: 0x8600
hm2/hm2_7i96s.0: input_data_addr: 0x8700
hm2/hm2_7i96s.0: raw_data_addr: 0x8800
hm2/hm2_7i96s.0: mpg_addr: 0x8900
hm2/hm2_7i96s.0: instance 0:
hm2/hm2_7i96s.0: control_reg = 0x7D051C20
hm2/hm2_7i96s.0: filter_reg = 0x00000000
hm2/hm2_7i96s.0: input_data_reg: 0x00000000
hm2/hm2_7i96s.0: raw_data_reg: 0x00000000
hm2/hm2_7i96s.0: mpg_reg = 0x00000000
hm2/hm2_7i96s.0: registered
Found file(REL): ./hal_input.hal
note: MAXV max: 35.000 units/sec 2100.000 units/min
note: LJOG max: 35.000 units/sec 2100.000 units/min
note: LJOG default: 10.000 units/sec 600.000 units/min
note: jog_order='XYZ'
note: jog_invert=set([])
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3 years 11 months ago #257480
by PCW
Replied by PCW on topic Mesa 7i77 not working after switching 7i96 to 7i96s
It appears that the 7I96S has stock firmware loaded, not firmware to support a 7I77.
To install 7I77 compatible firmware. you would run these mesaflash commands:
mesaflash --device 7i96s --addr[the 7i96s ip address] --write 7i96s_7i77d.bin
mesaflash --device 7i96s --addr[the 7i96s ip address] --reload
The last command can be skipped by power cycling the 7I96S which does a reload
The first command assumes that you are running mesaflash from a directory that
contains the 7I96S configuration files.
To install 7I77 compatible firmware. you would run these mesaflash commands:
mesaflash --device 7i96s --addr[the 7i96s ip address] --write 7i96s_7i77d.bin
mesaflash --device 7i96s --addr[the 7i96s ip address] --reload
The last command can be skipped by power cycling the 7I96S which does a reload
The first command assumes that you are running mesaflash from a directory that
contains the 7I96S configuration files.
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