[solved] Need help with RV901T as MESA 7i90: SPI isn't working

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2 years 7 months ago #296850 by Cant do this anymore bye all
I think I recall you were powering the board from 3.5v I’d check the output from the voltage regs, just to make sure everything is as it should be.

I noticed that in your card file you changed the clock values from constants to integer values, that wasn’t needed, neither was changing the card name values, but that should be neither here nor there.

For some reason I can’t find the SPI sources for the rv901t, tho I do have EPP but These are for 7c81 as my poor board has a couple of issues with the knuckle dragger who desoldered 2 chips, yeah a broken track per chip.

At this stage it might well worth loading a led flasher type bitstream just to confirm operation of the board.

Also Pete’s suggestion about disconnecting the logic analyser would be an idea. All I used was a multimeter just to check that the power rails were good.

With clocks 8 has to become 16 and 4 has to become 8, so there’s only 2 values to change.

During my experiments I was only using a single GND. Mesaflash worked fine, but wasn’t so great when communicating with the driver, I had to limit the clock speed.

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2 years 7 months ago #296940 by ago_tm
Guys, thanks a lot! Looks like there was my bad with the not very qualified soldering. I desoldered all the pads and cleaned the mask from them. Then returned all back and it start working! even with analyzer.

Still had to find the place of checking the crystal in mesaflash to avoid this:
Code:
sudo ./mesaflash --device 7i90 --spi --addr /dev/spidev0.0 --fallback --write ~/Downloads/topgcspihostmot2.bit Checking file... OK File type: Xilinx bit file Error: wrong bitfile destination device: 6slx16ftg256, should be 6slx9tqg144

But this is the minor thing. Thanks again!
Code:
sudo ./mesaflash --device 7i90 --spi --addr /dev/spidev0.0 --readhmid --verbose unable to set bpw32, fallback to bpw8 Configuration Name: HOSTMOT2 General configuration information: BoardName : MESA7I90 FPGA Size: 16 KGates FPGA Pins: 256 Number of IO Ports: 3 Width of one I/O port: 24 Clock Low frequency: 100.0000 MHz Clock High frequency: 200.0000 MHz IDROM Type: 3 Instance Stride 0: 4 Instance Stride 1: 64 Register Stride 0: 256 Register Stride 1: 256

Added [solved] to header!

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2 years 7 months ago #296942 by ago_tm
Sorry, removed [solved] for a while...

Code:
sudo ./mesaflash --device 7i90 --spi --addr /dev/spidev0.0 --fallback --write ~/Downloads/topgcspihostmot2.bit Checking file... OK File type: Xilinx bit file Error: wrong bitfile destination device: 6slx16ftg256, should be 6slx9tqg144 But this is the minor thing. Thanks again!

Hmmm... I easily changed the following line
Code:
board->llio.fpga_part_number = "6slx16ftg256";
but now I faced with the BootBlock...
Code:
$ sudo ./mesaflash --device 7i90 --spi --addr /dev/spidev0.0 --fix-boot-block --fallback --write ~/Downloads/topgcspihostmot2.bit unable to set bpw32, fallback to bpw8 Checking file... OK File type: Xilinx bit file Erasing sector 0 for boot block BootBlock installed Failed to write valid boot sector

Is it possible to write the fallback bitstream to the flash using mesaflash in my case?

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2 years 7 months ago #296947 by PCW
what does:

sudo ./mesaflash --device 7i90 --spi --addr /dev/spidev0.0 --verbose

report?

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2 years 7 months ago #296968 by ago_tm

what does:
Code:
sudo ./mesaflash --device 7i90 --spi --addr /dev/spidev0.0 --verbose
report?

Honestly... not too much:
Code:
unable to set bpw32, fallback to bpw8
and this is it.
Code:
sudo ./mesaflash --device 7i90 --spi --addr /dev/spidev0.0 --verbose --readhmid

gives more:
Code:
unable to set bpw32, fallback to bpw8 Configuration Name: HOSTMOT2 General configuration information: BoardName : MESA7I90 FPGA Size: 16 KGates FPGA Pins: 256 Number of IO Ports: 3 Width of one I/O port: 24 Clock Low frequency: 100.0000 MHz Clock High frequency: 200.0000 MHz IDROM Type: 3 Instance Stride 0: 4 Instance Stride 1: 64 Register Stride 0: 256 Register Stride 1: 256 Modules in configuration: Module: WatchDog There are 1 of WatchDog in configuration Version: 0 Registers: 3 BaseAddress: 0C00 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: IOPort There are 3 of IOPort in configuration Version: 0 Registers: 5 BaseAddress: 1000 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: LED There are 1 of LED in configuration Version: 0 Registers: 1 BaseAddress: 0200 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Configuration pin-out: IO Connections for P1 Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir 1 0 IOPort None 3 1 IOPort None 5 2 IOPort None 7 3 IOPort None 9 4 IOPort None 11 5 IOPort None 13 6 IOPort None 15 7 IOPort None 17 8 IOPort None 19 9 IOPort None 21 10 IOPort None 23 11 IOPort None 25 12 IOPort None 27 13 IOPort None 29 14 IOPort None 31 15 IOPort None 33 16 IOPort None 35 17 IOPort None 37 18 IOPort None 39 19 IOPort None 41 20 IOPort None 43 21 IOPort None 45 22 IOPort None 47 23 IOPort None IO Connections for P2 Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir 1 24 IOPort None 3 25 IOPort None 5 26 IOPort None 7 27 IOPort None 9 28 IOPort None 11 29 IOPort None 13 30 IOPort None 15 31 IOPort None 17 32 IOPort None 19 33 IOPort None 21 34 IOPort None 23 35 IOPort None 25 36 IOPort None 27 37 IOPort None 29 38 IOPort None 31 39 IOPort None 33 40 IOPort None 35 41 IOPort None 37 42 IOPort None 39 43 IOPort None 41 44 IOPort None 43 45 IOPort None 45 46 IOPort None 47 47 IOPort None IO Connections for P3 Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir 1 48 IOPort None 3 49 IOPort None 5 50 IOPort None 7 51 IOPort None 9 52 IOPort None 11 53 IOPort None 13 54 IOPort None 15 55 IOPort None 17 56 IOPort None 19 57 IOPort None 21 58 IOPort None 23 59 IOPort None 25 60 IOPort None 27 61 IOPort None 29 62 IOPort None 31 63 IOPort None 33 64 IOPort None 35 65 IOPort None 37 66 IOPort None 39 67 IOPort None 41 68 IOPort None 43 69 IOPort None 45 70 IOPort None 47 71 IOPort None

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2 years 7 months ago #297003 by PCW
Ahh I had forgotten that only Ethernet and serial cards provide
a lot of info from the --verbose command, including the FPGA
flash memory size, ID code and write and erase page sizes:

    3: FPGAFlsh (flash, RW, 32-bit) [size=16M], page size: 256, erase size: 65536

  [space 3] FPGA flash eeprom:
    flash size: 16Mb (id: 0x14)

I suspect some error either with an unsupported flash chip or maybe a
SPI pinout issue

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2 years 7 months ago #297041 by ago_tm
I finally get flash written with just using the same SPI0 on RPI and JP5 connector
JP5 connector on RV901T

In Xilinx ISE it it required to set the output bitstream format as bin (right click on the "Generate Programming File" > "Process Properties..." > "Create Binary Configuration File" ☑ ).
Then
Code:
sudo apt install -y flashrom sudo flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=10000 > Found Winbond flash chip "W25Q32.V" (4096 kB, SPI) on linux_spi. sudo flashrom -f -p linux_spi:dev=/dev/spidev0.0,spispeed=10000 -w ~/Downloads/TopGCSPIHostMot2.bin > Error: Image size (524288 B) doesn't match the expected size (4194304 B)! dd if=/dev/zero bs=1 count=1 seek=4194303 of=TopGCSPIHostMot2.bin sudo flashrom -f -p linux_spi:dev=/dev/spidev0.0,spispeed=10000 -w ~/Downloads/TopGCSPIHostMot2.bin > Found Winbond flash chip "W25Q32.V" (4096 kB, SPI) on linux_spi. > Reading old flash chip contents... done. > Erasing and writing flash chip... Erase/write done. > Verifying flash... VERIFIED.

I also tried to make a kind of SPI-bridge bitstream for the board to avoid disconnecting of the rv901t board from the RPi, but it is not my level of fpga configuring yet.

Anyway, I think I can mark it as [solved].

Many thanks to PCW and cornholio!

Not sure, probably this thread better to move to the Hardware & Machines section.

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2 years 6 months ago #297301 by ago_tm
As a bottom line I did a rebase to remove unnecessary changes and save the only required changes for running RV901T as Mesa 7i90 via spi in a single of the just the changes required to get it started with just 72 I/O pins:  github.com/golyakoff/hostmot2-rv901t-7i9...abf87a09ed5a3145c7d2

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2 years 6 months ago #297334 by Cant do this anymore bye all
All my bit files are 464577 bytes for the RV901T. I suspect the bin files would be smaller as the bit files are text based. (guessing)

I can't say I've used bin format, so unsure how long the file should be.

I use a usb-blaster and OpenFPGAloader, to program the flash it first loads a a bit stream to load the flash via JTAG, then loads the flash with your bit stream.

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2 years 6 months ago #297337 by Cant do this anymore bye all
This tread as well would be better off in "Driver Boards".

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