Setting up a 5i25/G540/7i76 Gantry

Configuration Name: HOSTMOT2 General configuration information: BoardName : MESA5I25 FPGA Size: 9 KGates FPGA Pins: 144 Number of IO Ports: 2 Width of one I/O port: 17 Clock Low frequency: 33.3333 MHz Clock High frequency: 200.0000 MHz IDROM Type: 3 Instance Stride 0: 4 Instance Stride 1: 64 Register Stride 0: 256 Register Stride 1: 256 Modules in configuration: Module: WatchDog There are 1 of WatchDog in configuration Version: 0 Registers: 3 BaseAddress: 0C00 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: IOPort There are 2 of IOPort in configuration Version: 0 Registers: 5 BaseAddress: 1000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: PWM There are 1 of PWM in configuration Version: 0 Registers: 5 BaseAddress: 4100 ClockFrequency: 200.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: QCount There are 2 of QCount in configuration Version: 2 Registers: 5 BaseAddress: 3000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: SSerial There are 1 of SSerial in configuration Version: 0 Registers: 6 BaseAddress: 5B00 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 64 bytes Module: StepGen There are 10 of StepGen in configuration Version: 2 Registers: 10 BaseAddress: 2000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: LED There are 1 of LED in configuration Version: 0 Registers: 1 BaseAddress: 0200 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Configuration pin-out: IO Connections for P3 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 0 IOPort StepGen 0 Dir/Table2 (Out) 14 1 IOPort StepGen 0 Step/Table1 (Out) 2 2 IOPort StepGen 1 Dir/Table2 (Out) 15 3 IOPort StepGen 1 Step/Table1 (Out) 3 4 IOPort StepGen 2 Dir/Table2 (Out) 16 5 IOPort StepGen 2 Step/Table1 (Out) 4 6 IOPort StepGen 3 Dir/Table2 (Out) 17 7 IOPort StepGen 3 Step/Table1 (Out) 5 8 IOPort StepGen 4 Dir/Table2 (Out) 6 9 IOPort StepGen 4 Step/Table1 (Out) 7 10 IOPort SSerial 0 TXData1 (Out) 8 11 IOPort SSerial 0 RXData1 (In) 9 12 IOPort SSerial 0 TXData2 (Out) 10 13 IOPort SSerial 0 RXData2 (In) 11 14 IOPort QCount 0 Quad-IDX (In) 12 15 IOPort QCount 0 Quad-B (In) 13 16 IOPort QCount 0 Quad-A (In) IO Connections for P2 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 17 IOPort None 14 18 IOPort PWM 0 PWM (Out) 2 19 IOPort StepGen 5 Step/Table1 (Out) 15 20 IOPort None 3 21 IOPort StepGen 5 Dir/Table2 (Out) 16 22 IOPort StepGen 9 Step/Table1 (Out) 4 23 IOPort StepGen 6 Step/Table1 (Out) 17 24 IOPort None 5 25 IOPort StepGen 6 Dir/Table2 (Out) 6 26 IOPort StepGen 7 Step/Table1 (Out) 7 27 IOPort StepGen 7 Dir/Table2 (Out) 8 28 IOPort StepGen 8 Step/Table1 (Out) 9 29 IOPort StepGen 8 Dir/Table2 (Out) 10 30 IOPort QCount 1 Quad-A (In) 11 31 IOPort QCount 1 Quad-B (In) 12 32 IOPort QCount 1 Quad-IDX (In) 13 33 IOPort None

General configuration information: BoardName : MESA5I25 FPGA Size: 9 KGates FPGA Pins: 144 Number of IO Ports: 2 Width of one I/O port: 17 Clock Low frequency: 33.3333 MHz Clock High frequency: 200.0000 MHz IDROM Type: 3 Instance Stride 0: 4 Instance Stride 1: 64 Register Stride 0: 256 Register Stride 1: 256 IDROM Type: 3 Modules in configuration: Module: WatchDog There are 1 of WatchDog in configuration Version: 0 Registers: 3 BaseAddress: 0C00 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: IOPort There are 2 of IOPort in configuration Version: 0 Registers: 5 BaseAddress: 1000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: QCount There are 2 of QCount in configuration Version: 2 Registers: 5 BaseAddress: 3000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: SSerial There are 1 of SSerial in configuration Version: 0 Registers: 6 BaseAddress: 5B00 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 64 bytes Module: StepGen There are 10 of StepGen in configuration Version: 2 Registers: 10 BaseAddress: 2000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: PWMGen There are 1 of PWMGen in configuration Version: 0 Registers: 5 BaseAddress: 4100 ClockFrequency: 200.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: LED There are 1 of LED in configuration Version: 0 Registers: 1 BaseAddress: 0200 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Configuration pin-out: IO Connections for P3 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 0 IOPort None 14 1 IOPort PWMGen 0 PWM (Out) 2 2 IOPort StepGen 0 Step (Out) 15 3 IOPort None 3 4 IOPort StepGen 0 Dir (Out) 16 5 IOPort StepGen 4 Step (Out) 4 6 IOPort StepGen 1 Step (Out) 17 7 IOPort None 5 8 IOPort StepGen 1 Dir (Out) 6 9 IOPort StepGen 2 Step (Out) 7 10 IOPort StepGen 2 Dir (Out) 8 11 IOPort StepGen 3 Step (Out) 9 12 IOPort StepGen 3 Dir (Out) 10 13 IOPort QCount 0 Quad-A (In) 11 14 IOPort QCount 0 Quad-B (In) 12 15 IOPort QCount 0 Quad-IDX (In) 13 16 IOPort None IO Connections for P2 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 17 IOPort StepGen 5 Dir (Out) 14 18 IOPort StepGen 5 Step (Out) 2 19 IOPort StepGen 6 Dir (Out) 15 20 IOPort StepGen 6 Step (Out) 3 21 IOPort StepGen 7 Dir (Out) 16 22 IOPort StepGen 7 Step (Out) 4 23 IOPort StepGen 8 Dir (Out) 17 24 IOPort StepGen 8 Step (Out) 5 25 IOPort StepGen 9 Dir (Out) 6 26 IOPort StepGen 9 Step (Out) 7 27 IOPort SSerial 0 TXData1 (Out) 8 28 IOPort SSerial 0 RXData1 (In) 9 29 IOPort SSerial 0 TXData2 (Out) 10 30 IOPort SSerial 0 RXData2 (In) 11 31 IOPort QCount 1 Quad-IDX (In) 12 32 IOPort QCount 1 Quad-B (In) 13 33 IOPort QCount 1 Quad-A (In)

General configuration information: BoardName : MESA5I25 FPGA Size: 9 KGates FPGA Pins: 144 Number of IO Ports: 2 Width of one I/O port: 17 Clock Low frequency: 33.3333 MHz Clock High frequency: 200.0000 MHz IDROM Type: 3 Instance Stride 0: 4 Instance Stride 1: 64 Register Stride 0: 256 Register Stride 1: 256 Modules in configuration: Module: WatchDog There are 1 of WatchDog in configuration Version: 0 Registers: 3 BaseAddress: 0C00 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: IOPort There are 2 of IOPort in configuration Version: 0 Registers: 5 BaseAddress: 1000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: PWM There are 1 of PWM in configuration Version: 0 Registers: 5 BaseAddress: 4100 ClockFrequency: 200.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: QCount There are 2 of QCount in configuration Version: 2 Registers: 5 BaseAddress: 3000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: SSerial There are 1 of SSerial in configuration Version: 0 Registers: 6 BaseAddress: 5B00 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 64 bytes Module: StepGen There are 10 of StepGen in configuration Version: 2 Registers: 10 BaseAddress: 2000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: LED There are 1 of LED in configuration Version: 0 Registers: 1 BaseAddress: 0200 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Configuration pin-out: IO Connections for P3 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 0 IOPort StepGen 0 Dir/Table2 (Out) 14 1 IOPort StepGen 0 Step/Table1 (Out) 2 2 IOPort StepGen 1 Dir/Table2 (Out) 15 3 IOPort StepGen 1 Step/Table1 (Out) 3 4 IOPort StepGen 2 Dir/Table2 (Out) 16 5 IOPort StepGen 2 Step/Table1 (Out) 4 6 IOPort StepGen 3 Dir/Table2 (Out) 17 7 IOPort StepGen 3 Step/Table1 (Out) 5 8 IOPort StepGen 4 Dir/Table2 (Out) 6 9 IOPort StepGen 4 Step/Table1 (Out) 7 10 IOPort SSerial 0 TXData1 (Out) 8 11 IOPort SSerial 0 RXData1 (In) 9 12 IOPort SSerial 0 TXData2 (Out) 10 13 IOPort SSerial 0 RXData2 (In) 11 14 IOPort QCount 0 Quad-IDX (In) 12 15 IOPort QCount 0 Quad-B (In) 13 16 IOPort QCount 0 Quad-A (In) IO Connections for P2 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 17 IOPort None 14 18 IOPort PWM 0 PWM (Out) 2 19 IOPort StepGen 5 Step/Table1 (Out) 15 20 IOPort None 3 21 IOPort StepGen 5 Dir/Table2 (Out) 16 22 IOPort StepGen 9 Step/Table1 (Out) 4 23 IOPort StepGen 6 Step/Table1 (Out) 17 24 IOPort None 5 25 IOPort StepGen 6 Dir/Table2 (Out) 6 26 IOPort StepGen 7 Step/Table1 (Out) 7 27 IOPort StepGen 7 Dir/Table2 (Out) 8 28 IOPort StepGen 8 Step/Table1 (Out) 9 29 IOPort StepGen 8 Dir/Table2 (Out) 10 30 IOPort QCount 1 Quad-A (In) 11 31 IOPort QCount 1 Quad-B (In) 12 32 IOPort QCount 1 Quad-IDX (In) 13 33 IOPort None

Configuration Name: HOSTMOT2 General configuration information: BoardName : MESA5I25 FPGA Size: 9 KGates FPGA Pins: 144 Number of IO Ports: 2 Width of one I/O port: 17 Clock Low frequency: 33.3333 MHz Clock High frequency: 200.0000 MHz IDROM Type: 3 Instance Stride 0: 4 Instance Stride 1: 64 Register Stride 0: 256 Register Stride 1: 256 IDROM Type: 3 Modules in configuration: Module: WatchDog There are 1 of WatchDog in configuration Version: 0 Registers: 3 BaseAddress: 0C00 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: IOPort There are 2 of IOPort in configuration Version: 0 Registers: 5 BaseAddress: 1000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: QCount There are 2 of QCount in configuration Version: 2 Registers: 5 BaseAddress: 3000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: SSerial There are 1 of SSerial in configuration Version: 0 Registers: 6 BaseAddress: 5B00 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 64 bytes Module: StepGen There are 10 of StepGen in configuration Version: 2 Registers: 10 BaseAddress: 2000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: PWMGen There are 1 of PWMGen in configuration Version: 0 Registers: 5 BaseAddress: 4100 ClockFrequency: 200.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: LED There are 1 of LED in configuration Version: 0 Registers: 1 BaseAddress: 0200 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Configuration pin-out: IO Connections for P3 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 0 IOPort None 14 1 IOPort PWMGen 0 PWM (Out) 2 2 IOPort StepGen 0 Step (Out) 15 3 IOPort None 3 4 IOPort StepGen 0 Dir (Out) 16 5 IOPort StepGen 4 Step (Out) 4 6 IOPort StepGen 1 Step (Out) 17 7 IOPort None 5 8 IOPort StepGen 1 Dir (Out) 6 9 IOPort StepGen 2 Step (Out) 7 10 IOPort StepGen 2 Dir (Out) 8 11 IOPort StepGen 3 Step (Out) 9 12 IOPort StepGen 3 Dir (Out) 10 13 IOPort QCount 0 Quad-A (In) 11 14 IOPort QCount 0 Quad-B (In) 12 15 IOPort QCount 0 Quad-IDX (In) 13 16 IOPort None IO Connections for P2 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 17 IOPort StepGen 5 Dir (Out) 14 18 IOPort StepGen 5 Step (Out) 2 19 IOPort StepGen 6 Dir (Out) 15 20 IOPort StepGen 6 Step (Out) 3 21 IOPort StepGen 7 Dir (Out) 16 22 IOPort StepGen 7 Step (Out) 4 23 IOPort StepGen 8 Dir (Out) 17 24 IOPort StepGen 8 Step (Out) 5 25 IOPort StepGen 9 Dir (Out) 6 26 IOPort StepGen 9 Step (Out) 7 27 IOPort SSerial 0 TXData1 (Out) 8 28 IOPort SSerial 0 RXData1 (In) 9 29 IOPort SSerial 0 TXData2 (Out) 10 30 IOPort SSerial 0 RXData2 (In) 11 31 IOPort QCount 1 Quad-IDX (In) 12 32 IOPort QCount 1 Quad-B (In) 13 33 IOPort QCount 1 Quad-A (In)

loadrt [KINS]KINEMATICS loadrt motmod servo_period_nsec=1000000 num_joints=4 loadrt hostmot2 loadrt hm2_pci config="num_stepgens=5" loadrt pid names=pid.0,pid.1,pid.2,pid.3 setp hm2_5i25.0.watchdog.timeout_ns 5000000 #CHARGE PUMP setp hm2_5i25.0.stepgen.04.control-type 1 setp hm2_5i25.0.stepgen.04.position-scale 1 setp hm2_5i25.0.stepgen.04.velocity-cmd 16000 setp hm2_5i25.0.stepgen.04.steplen 62500 net machine-is-enabled hm2_5i25.0.stepgen.04.enable # external output signals # external input signals # --- HOME-ALL --- net home-ALL <= hm2_5i25.0.gpio.002.in #******************* # JOINT 0 (X) #******************* setp pid.0.Pgain [JOINT_0]P setp pid.0.Igain [JOINT_0]I setp pid.0.Dgain [JOINT_0]D setp pid.0.bias [JOINT_0]BIAS setp pid.0.FF0 [JOINT_0]FF0 setp pid.0.FF1 [JOINT_0]FF1 setp pid.0.FF2 [JOINT_0]FF2 setp pid.0.deadband [JOINT_0]DEADBAND setp pid.0.maxoutput [JOINT_0]MAX_OUTPUT setp pid.0.error-previous-target true # Step Gen signals/setup setp hm2_5i25.0.stepgen.00.dirsetup [JOINT_0]DIRSETUP setp hm2_5i25.0.stepgen.00.dirhold [JOINT_0]DIRHOLD setp hm2_5i25.0.stepgen.00.steplen [JOINT_0]STEPLEN setp hm2_5i25.0.stepgen.00.stepspace [JOINT_0]STEPSPACE setp hm2_5i25.0.stepgen.00.position-scale [JOINT_0]STEP_SCALE setp hm2_5i25.0.stepgen.00.step_type 0 setp hm2_5i25.0.stepgen.00.control-type 1 setp hm2_5i25.0.stepgen.00.maxaccel [JOINT_0]STEPGEN_MAXACCEL setp hm2_5i25.0.stepgen.00.maxvel [JOINT_0]STEPGEN_MAXVEL # ---closedloop stepper signals--- net 0-pos-cmd <= joint.0.motor-pos-cmd net 0-vel-cmd <= joint.0.vel-cmd net 0-output <= hm2_5i25.0.stepgen.00.velocity-cmd net 0-pos-fb <= hm2_5i25.0.stepgen.00.position-fb net 0-pos-fb => joint.0.motor-pos-fb net 0-enable <= joint.0.amp-enable-out net 0-enable => hm2_5i25.0.stepgen.00.enable # ---setup home / limit switch signals--- net home-all => joint.0.home-sw-in net home-all => joint.0.neg-lim-sw-in #******************* # JOINT 3 (X) #******************* setp pid.0.Pgain [JOINT_3]P setp pid.0.Igain [JOINT_3]I setp pid.0.Dgain [JOINT_3]D setp pid.0.bias [JOINT_3]BIAS setp pid.0.FF0 [JOINT_3]FF0 setp pid.0.FF1 [JOINT_3]FF1 setp pid.0.FF2 [JOINT_3]FF2 setp pid.0.deadband [JOINT_3]DEADBAND setp pid.0.maxoutput [JOINT_3]MAX_OUTPUT setp pid.0.error-previous-target true # Step Gen signals/setup #setp hm2_5i25.0.stepgen.03.invert_output 1 setp hm2_5i25.0.stepgen.03.dirsetup [JOINT_3]DIRSETUP setp hm2_5i25.0.stepgen.03.dirhold [JOINT_3]DIRHOLD setp hm2_5i25.0.stepgen.03.steplen [JOINT_3]STEPLEN setp hm2_5i25.0.stepgen.03.stepspace [JOINT_3]STEPSPACE setp hm2_5i25.0.stepgen.03.position-scale [JOINT_3]STEP_SCALE setp hm2_5i25.0.stepgen.03.step_type 0 setp hm2_5i25.0.stepgen.03.control-type 1 setp hm2_5i25.0.stepgen.03.maxaccel [JOINT_3]STEPGEN_MAXACCEL setp hm2_5i25.0.stepgen.03.maxvel [JOINT_3]STEPGEN_MAXVEL # ---closedloop stepper signals--- net 3-pos-cmd <= joint.3.motor-pos-cmd net 3-vel-cmd <= joint.3.vel-cmd net 3-output <= hm2_5i25.0.stepgen.03.velocity-cmd net 3-pos-fb <= hm2_5i25.0.stepgen.03.position-fb net 3-pos-fb => joint.3.motor-pos-fb net 3-enable <= joint.3.amp-enable-out net 3-enable => hm2_5i25.0.stepgen.03.enable # ---setup home / limit switch signals--- net home-all => joint.3.home-sw-in net home-all => joint.3.neg-lim-sw-in #******************* # JOINT 1 (Y) #******************* setp pid.1.Pgain [JOINT_1]P setp pid.1.Igain [JOINT_1]I setp pid.1.Dgain [JOINT_1]D setp pid.1.bias [JOINT_1]BIAS setp pid.1.FF0 [JOINT_1]FF0 setp pid.1.FF1 [JOINT_1]FF1 setp pid.1.FF2 [JOINT_1]FF2 setp pid.1.deadband [JOINT_1]DEADBAND setp pid.1.maxoutput [JOINT_1]MAX_OUTPUT setp pid.1.error-previous-target true net 1-index-enable <=> pid.1.index-enable net 1-enable => pid.1.enable net 1-pos-cmd => pid.1.command net 1-vel-cmd => pid.1.command-deriv net 1-pos-fb => pid.1.feedback net 1-output => pid.1.output # Step Gen signals/setup setp hm2_5i25.0.stepgen.01.dirsetup [JOINT_1]DIRSETUP setp hm2_5i25.0.stepgen.01.dirhold [JOINT_1]DIRHOLD setp hm2_5i25.0.stepgen.01.steplen [JOINT_1]STEPLEN setp hm2_5i25.0.stepgen.01.stepspace [JOINT_1]STEPSPACE setp hm2_5i25.0.stepgen.01.position-scale [JOINT_1]STEP_SCALE setp hm2_5i25.0.stepgen.01.step_type 0 setp hm2_5i25.0.stepgen.01.control-type 1 setp hm2_5i25.0.stepgen.01.maxaccel [JOINT_1]STEPGEN_MAXACCEL setp hm2_5i25.0.stepgen.01.maxvel [JOINT_1]STEPGEN_MAXVEL # ---closedloop stepper signals--- net 1-pos-cmd <= joint.1.motor-pos-cmd net 1-vel-cmd <= joint.1.vel-cmd net 1-output <= hm2_5i25.0.stepgen.01.velocity-cmd net 1-pos-fb <= hm2_5i25.0.stepgen.01.position-fb net 1-pos-fb => joint.1.motor-pos-fb net 1-enable <= joint.1.amp-enable-out net 1-enable => hm2_5i25.0.stepgen.01.enable # ---setup home / limit switch signals--- net home-all => joint.1.home-sw-in net home-all => joint.1.neg-lim-sw-in #******************* # JOINT 2 (Z) #******************* setp pid.2.Pgain [JOINT_2]P setp pid.2.Igain [JOINT_2]I setp pid.2.Dgain [JOINT_2]D setp pid.2.bias [JOINT_2]BIAS setp pid.2.FF0 [JOINT_2]FF0 setp pid.2.FF1 [JOINT_2]FF1 setp pid.2.FF2 [JOINT_2]FF2 setp pid.2.deadband [JOINT_2]DEADBAND setp pid.2.maxoutput [JOINT_2]MAX_OUTPUT setp pid.2.error-previous-target true net 2-index-enable <=> pid.2.index-enable net 2-enable => pid.2.enable net 2-pos-cmd => pid.2.command net 2-vel-cmd => pid.2.command-deriv net 2-pos-fb => pid.2.feedback net 2-output => pid.2.output # Step Gen signals/setup setp hm2_5i25.0.stepgen.02.dirsetup [JOINT_2]DIRSETUP setp hm2_5i25.0.stepgen.02.dirhold [JOINT_2]DIRHOLD setp hm2_5i25.0.stepgen.02.steplen [JOINT_2]STEPLEN setp hm2_5i25.0.stepgen.02.stepspace [JOINT_2]STEPSPACE setp hm2_5i25.0.stepgen.02.position-scale [JOINT_2]STEP_SCALE setp hm2_5i25.0.stepgen.02.step_type 0 setp hm2_5i25.0.stepgen.02.control-type 1 setp hm2_5i25.0.stepgen.02.maxaccel [JOINT_2]STEPGEN_MAXACCEL setp hm2_5i25.0.stepgen.02.maxvel [JOINT_2]STEPGEN_MAXVEL # ---closedloop stepper signals--- net 2-pos-cmd <= joint.2.motor-pos-cmd net 2-vel-cmd <= joint.2.vel-cmd net 2-output <= hm2_5i25.0.stepgen.02.velocity-cmd net 2-pos-fb <= hm2_5i25.0.stepgen.02.position-fb net 2-pos-fb => joint.2.motor-pos-fb net 2-enable <= joint.2.amp-enable-out net 2-enable => hm2_5i25.0.stepgen.02.enable # ---setup home / limit switch signals--- net home-all => joint.2.home-sw-in net home-all => joint.2.pos-lim-sw-in # ---motion control signals--- #net in-position <= motion.in-position #net machine-is-enabled <= motion.motion-enabled # ---digital in / out signals--- # ---estop signals--- #net estop-out <= iocontrol.0.user-enable-out net estop-out <= hm2_5i25.0.gpio.003.in_not net estop-out => iocontrol.0.emc-enable-in