mesaboard 7i76e + 7i85s + 7i85 with ssi for absolute encoder bitfile

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17 Mar 2022 15:59 - 17 Mar 2022 16:02 #237535 by nachoalja
Hello everyone.
I 'm new in this forum. It's the first time I write. 
My cuestion is:
I have a ssi absolute encoder. I want to probe it in 7i76e rs422. Does it exists a bitfile for this?
I have a 7i76e + 7i85s with relative encoders. I would like to have a bitfile to substitute the smart serial port in both boards for ssi rs422. One in 7i76e and in 7i85s.
Other option is to buy a 7i85.
With this last option I want to know if I can use the absolute encoder with the standard --> 7i76e_7i76x1_7i85x1_7i85sx1D.bit 
Thanks in advance.
Nacho
Last edit: 17 Mar 2022 16:02 by nachoalja. Reason: an error

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17 Mar 2022 17:32 #237544 by PCW
Here is a 7I76E +7I85S configuration with both free sserial ports
replaced with SSI interfaces:


File Attachment:

File Name: 7i76e_7i76...ssid.zip
File Size:141 KB
Attachments:

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18 Mar 2022 11:03 #237629 by nachoalja
Thanks for the bitfile.
I have written with mesaflash.
My encoder is double ended for clock and data. clock+, clock-, data+, data-.
The bitfile has pins only for single ended.
Does it exist a bitfile for double ended? or Do I have a solution for joining both pairs in only one pair?
Does linuxcnc hostmost ssi support double ended?
Thanks a lot.

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18 Mar 2022 15:20 #237644 by PCW
The differential signal processing is done by external circuitry,
that is, on the 7I76E, the differential I/O for the SSI interface uses
the RS-422 interface normally used for SSerisl expansion.
This converts the single ended FPGA signals to differential.
The second SSI interface on the 7I85S also uses the 7I85S's
differential interface hardware so has single ended FPGA pins.

(The FPGA pins themselves are not suited to RS-422 interfaces do to lack of common
mode range and fragility, so there is no point in having differential FPGA pins for this usage)

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18 Mar 2022 16:29 #237649 by nachoalja
Thank you for your quick answer.
If I understand well the rs422 protocol is differencial and use 4 wires for signal more vcc and ground, total 6.

So i can connect 7i76e mesaboard and 7i85s mesaboard to encoder.
MESABOARD --> ENCODER
GND --> GND
RS-422 RX+ --> DATA+
RS-422 RX- --> DATA--
RS-422 TX+ --> CLOCK+
RS-422 TX- -->CLOCK-
+5VP -->VCC

Thanks for your help.

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18 Mar 2022 17:15 #237654 by PCW
Note that sometimes the polarities need to be changed (by swapping the pins)

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18 Mar 2022 18:38 #237662 by nachoalja
I have conected but the numbers of the pins rawcount, etc , do not stop to run.

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18 Mar 2022 19:10 #237664 by nachoalja
I have this hal


loadrt [KINS]KINEMATICS
loadrt [EMCMOT]EMCMOT servo_period_nsec=[EMCMOT]SERVO_PERIOD num_joints=[KINS]JOINTS
loadrt hostmot2
loadrt hm2_eth board_ip="10.10.10.10" config="num_encoders=-1 ssi_chan_0=articulacion_4%2babsoluto_4%12e num_pwmgens=0 num_stepgens=5 sserial_port_0=00000000"
setp hm2_7i76e.0.watchdog.timeout_ns 5000000
loadrt pid names=pid.x,pid.y,pid.z,pid.a,pid.s,pid.c

addf hm2_7i76e.0.read servo-thread
addf motion-command-handler servo-thread
addf motion-controller servo-thread
addf pid.x.do-pid-calcs servo-thread
addf pid.y.do-pid-calcs servo-thread
addf pid.z.do-pid-calcs servo-thread
addf pid.a.do-pid-calcs servo-thread
addf pid.s.do-pid-calcs servo-thread
addf pid.c.do-pid-calcs servo-thread
addf hm2_7i76e.0.write servo-thread

setp hm2_7i76e.0.dpll.01.timer-us -200
setp hm2_7i76e.0.stepgen.timer-number 1
setp hm2_7i76e.0.encoder.timer-number 1
setp hm2_7i76e.0.encoder.00.scale -200
setp hm2_7i76e.0.encoder.01.scale 200
setp hm2_7i76e.0.encoder.02.scale -200
#setp hm2_7i76e.0.encoder.03.scale 416.05285
#setp hm2_7i76e.0.encoder.04.scale -312.5

setp hm2_7i76e.0.ssi.00.frequency-khz 500
setp hm2_7i76e.0.ssi.00.timer-number 1

setp hm2_7i76e.0.ssi.00.absoluto_4.scale -555.55556
setp hm2_7i76e.0.ssi.00.absoluto_4.counts-per-rev 4096

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18 Mar 2022 19:14 #237665 by PCW
Did you try inverting the clock and data (I suspect both need to be inverted)

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18 Mar 2022 21:38 #237679 by nachoalja
Thanks again. I am not in work place.
The monday I will do all the combination to test.

ssi_chan_0=articulacion_4%2babsoluto_4%12e

The (n)b after first % in the format string, I realy do not understand. Can you explain me? Maybe is the first bit to comunicate between máster slave?

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