7i92, can I use "STEP" outputs with no "DIR"?

I ran both my X drives on separate STEP/DIR channels, now I'm trying to add a 4th axis which would mean I need a 5th stepper control signal pair.

There's DIR0-DIR3.  The others STEP4-9 are just "STEP", no "DIR".  

Is there a way to get a fifth stepper control pair?  Or do I need a different bitfile?

OK I reread the manual and saw this:
>G540X2 is a configuration intended to work with two Gecko G540 four axis step motor drives. It includes eight hardware step generators, two PWM generators, four GPIO outputs, eight GPIO inputs, two charge pump drivers and a watchdog timer.

I'm still confused, I see where P2 hooks straight up to a G540, but P1 doesn't seem to be able to connect to a G540 because no DIR pins.

I see the descriptions of the other bitfiles. That LinuxCNC machine is at the shop, I'm at home trying to see what the other bitfiles assign to so I can see what's the most compatible with my PCB. Well, I only see text descriptions in the manual. How can I find the actual pinouts without a machine to install mesaflash on? Google is failing me somehow

The 7i92_g540x2 configuration has 10 stepgens total, 5 per connector.

On each connector there are 4 normal stepgens that include both step
and direction signals, and 1 stepgen with only a step pin. This stepgen
is used to drive the G540s chargepump circuit.

Yeah, accidentally...

Still at home with just my Windows machine, looking for where I can download these pinouts and Google is somehow failing me.

Where can I find the info on the bitfiles?  

What I have on my -readhmid is step/dir 0-3 on P2, one lone step4 on P2, and step5-9 on P1 but no DIR.  I'm not seeing pins for 5x step/dir pairs on  P2, and none on P1.

The .pin files are in the 7i92 support zip file, 7i92.zip. (in configs/hostmot2)

I get this configuration pinout from the 7i92_G540X2D.bit bitfile:

Configuration pin-out:

IO Connections for P2
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1      0   IOPort       None
14      1   IOPort       PWM              0        PWM             (Out)
 2      2   IOPort       StepGen          0        Step/Table1     (Out)
15      3   IOPort       None
 3      4   IOPort       StepGen          0        Dir/Table2      (Out)
16      5   IOPort       StepGen          4        Step/Table1     (Out)
 4      6   IOPort       StepGen          1        Step/Table1     (Out)
17      7   IOPort       None
 5      8   IOPort       StepGen          1        Dir/Table2      (Out)
 6      9   IOPort       StepGen          2        Step/Table1     (Out)
 7     10   IOPort       StepGen          2        Dir/Table2      (Out)
 8     11   IOPort       StepGen          3        Step/Table1     (Out)
 9     12   IOPort       StepGen          3        Dir/Table2      (Out)
10     13   IOPort       QCount           0        Quad-A          (In)
11     14   IOPort       QCount           0        Quad-B          (In)
12     15   IOPort       QCount           0        Quad-IDX        (In)
13     16   IOPort       None

IO Connections for P1
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1     17   IOPort       None
14     18   IOPort       PWM              1        PWM             (Out)
 2     19   IOPort       StepGen          5        Step/Table1     (Out)
15     20   IOPort       None
 3     21   IOPort       StepGen          5        Dir/Table2      (Out)
16     22   IOPort       StepGen          9        Step/Table1     (Out)
 4     23   IOPort       StepGen          6        Step/Table1     (Out)
17     24   IOPort       None
 5     25   IOPort       StepGen          6        Dir/Table2      (Out)
 6     26   IOPort       StepGen          7        Step/Table1     (Out)
 7     27   IOPort       StepGen          7        Dir/Table2      (Out)
 8     28   IOPort       StepGen          8        Step/Table1     (Out)
 9     29   IOPort       StepGen          8        Dir/Table2      (Out)
10     30   IOPort       QCount           1        Quad-A          (In)
11     31   IOPort       QCount           1        Quad-B          (In)
12     32   IOPort       QCount           1        Quad-IDX        (In)
13     33   IOPort       None

 

Hello PCW-

OK, so I see we're using stepgen 0-3, ch 4 has no DIR so it's not a motor channel, and then we've got the 4th axis rotary hooked up to stepgen 5.

Do I need to say "num_stepgens=5" or "num_stepgens=6"? Because the fifth isn't a usable channel but it looks like these have to be enabled in ascending order.

I do see on my schematics I have IO1, IO3, and IO5 going to limit switches. If I have to enable it as 6 stepgens, is this going to be a conflict?