bspi problems

thanks peter, that makes perfect sense, though im not sure how to implement in the current driver as each bspi frame registers a single 32 bit tram read region and the tram reads are executed without regard to the counter value.

i expect ill have to refactor the driver and maybe ditch tram maps for direct reads and writes

hi andy, ill take a look at absencoder for guidance, thanks.

i noticed that the pktuart driver eschews tram maps and uses low level io exclusively

what are the performance implications of that? would that be acceptable in the bspi driver?

TRAM isn't _really_ TRAM. But it could become so in future.

But doing discrete writes using LLIO rather than the block transfers seems wasteful.

i got this to work using peters suggestions. though i need to polish the refactor a bit more.

im still confused about the register addresses for the channel descriptors, seems like i have to use 0x5600 for all bspi 0 descriptors, 0x5604 for all bspi descriptors and so on, whereas i would have expected 0x5600, 0x5640 like regmap indicates, but at the moment things are working and readings aren't jumping between sensors anymore. i need to finish fabbing my control board before i can really test it with many spi devices.

currently tracking my work at
github.com/sleepybishop/linuxcnc/commits...mesa-hostmot2/bspi.c
ill cherry pick changes from here to a separate branch after i clean things up (and if theres interest for my changes) to submit another pr.

anyhow just wanted to say thanks @pcw and @andypugh