mesa 5i20 and DAC

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16 years 5 months ago #2916 by stormpetrel
Replied by stormpetrel on topic Re:mesa 5i20 and DAC
Thank you PCW
I will send you all the information this weekend.

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16 years 5 months ago #3008 by stormpetrel
Replied by stormpetrel on topic Re:mesa 5i20 and DAC
Hi PCW


I use the P2 connector of the 5i20 mesa board for the encoders and the P3 connector to command the DAC and the relays of my Maho milling machine.

image missing http://img706.imageshack.us/img706/3630/ss20100526131605.png

OUT_RLY_X: mesa 5i20 output, x relay, the main electric motor drives the x axis
OUT_RLY_Y: mesa 5i20 output, y relay, the main electric motor drives the y axis
OUT_RLY_Z: mesa 5i20 output, z relay, the main electric motor drives the z axis
OUT_RLY_FAST: mesa 5i20 output, fast motion relay
OUT_RLY_DIR: mesa 5i20 output, direction relay
OUT_RLY_AUTO: mesa 5i20 output, automatic mode relay
OUT_RLY_STOP: mesa 5i20 output, stop relay

IN_RAPID: mesa 5i20 input, MAHO user interface switch, FAST motion
IN_START: mesa 5i20 input, MAHO user interface switch, START
IN_STOP: mesa 5i20 input, MAHO user interface switch, emergency stop


DAC control
D0-D7: mesa 5i20 output,data bus
MCDAC_MSB: mesa 5i20 output, select MSB or LSB
CS_MCDAC: mesa 5i20 output, chip select DAC

MCDAC_RDY: mesa 5i20 input, DAC ready for a new conversion


image missing http://img401.imageshack.us/img401/8484/text3865273.png

t1-2: >50ns
t2-3: >50ns
t3-4: >900ns
t5-6: >900ns

The DAC (AD5570) has a bandwith of 20kHz, however I will use it at a frequency between 100 samples/sec up to 1ksps.

Cheers, Dom

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16 years 5 months ago #3012 by PCW
Replied by PCW on topic Re:mesa 5i20 and DAC
OK thanks for the detailed info, that makes it easy!
Are you sure the LSB selector is high for LSB? Seems backwards
( though any output polarity errors can be fixed with the HM2 invert option)

Ill try and get you a test config tomorrow

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16 years 5 months ago #3013 by stormpetrel
Replied by stormpetrel on topic Re:mesa 5i20 and DAC
You are right! It makes more sense if MSB is on the data bus when MSB/LSB is high!

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16 years 5 months ago #3019 by PCW
Replied by PCW on topic Re:mesa 5i20 and DAC
Also RDY polarity must be reversed as well
because your buffer would be disabled during
the transfer if active high as shown in the chart

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16 years 5 months ago #3021 by stormpetrel
Replied by stormpetrel on topic Re:mesa 5i20 and DAC
The DAC is not directly accessible by the mesa board. The DAC is controlled via SPI by a micro-controller I will program.
As I was focused on designing the hardware, I brewed this temporary protocol however I agree with you about using standard hand-shaking protocol.

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