Compiling firmware for Mesa 5i20 + 7i48 + 7i44
- erasmo
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14 Jul 2014 16:43 - 14 Jul 2014 17:25 #48759
by erasmo
Compiling firmware for Mesa 5i20 + 7i48 + 7i44 was created by erasmo
Hi,
I am trying to generate SVSS6_8 firmware for 5i20 using Xilinix ISE Project Navigator 9.2i.
I'm follow these instructions: linuxcnc.org/lucid/index.php/english/for...irmware?limitstart=0
But during build I get error:
hostmot2.vhd contains libraries to load and one is missing:
Is there any other way to compile .bit file?
I have tried to comment that line but I get next errors:
Thanks in advance.
I am trying to generate SVSS6_8 firmware for 5i20 using Xilinix ISE Project Navigator 9.2i.
I'm follow these instructions: linuxcnc.org/lucid/index.php/english/for...irmware?limitstart=0
But during build I get error:
Compiling vhdl file "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/i20card.vhd" in Library work.
Compiling vhdl file "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/PIN_SVSS6_8_72.vhd" in Library work.
Compiling vhdl file "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/hostmot2.vhd" in Library work.
ERROR:HDLParsers:3014 - "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/hostmot2.vhd" Line 80. Library unit InputPinsPerModule is not available in library work.
-->
Total memory usage is 156696 kilobytes
Number of errors : 1 ( 0 filtered)
Number of warnings : 0 ( 0 filtered)
Number of infos : 0 ( 0 filtered)
Process "Synthesize" failedhostmot2.vhd contains libraries to load and one is missing:
use work.IDROMConst.all;
library UNISIM;
use UNISIM.VComponents.all;
use work.log2.all;
use work.decodedstrobe.all;
use work.oneofndecode.all;
use work.IDROMConst.all;
use work.NumberOfModules.all;
use work.MaxPinsPerModule.all;
use work.MaxInputPinsPerModule.all;
use work.InputPinsPerModule.all; << this one is missing (no file InputPinsPerModule.vhd)
use work.MaxOutputPinsPerModule.all;
use work.MaxIOPinsPerModule.all;
use work.CountPinsInRange.all;
use work.PinExists.all;
use work.ModuleExists.all; Is there any other way to compile .bit file?
I have tried to comment that line but I get next errors:
Compiling vhdl file "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/idrom.vhd" in Library work.
Architecture syn of Entity idrom is up to date.
Compiling vhdl file "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/i20card.vhd" in Library work.
Compiling vhdl file "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/PIN_SVSS6_8_72.vhd" in Library work.
Compiling vhdl file "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/hostmot2.vhd" in Library work.
Entity <hostmot2> compiled.
ERROR:HDLParsers:3312 - "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/hostmot2.vhd" Line 171. Undefined symbol 'InputPinsPerModule'.
ERROR:HDLParsers:1209 - "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/hostmot2.vhd" Line 172. InputPinsPerModule: Undefined symbol (last report in this block)
ERROR:HDLParsers:532 - "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/hostmot2.vhd" Line 170. Deferred constant are allowed only in packages.
ERROR:HDLParsers:3312 - "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/hostmot2.vhd" Line 2886. Undefined symbol 'UARTSPerSSerial'.
ERROR:HDLParsers:1209 - "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/hostmot2.vhd" Line 2886. UARTSPerSSerial: Undefined symbol (last report in this block)
ERROR:HDLParsers:851 - "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/hostmot2.vhd" Line 2884. Formal Ports of entity with no default value must be associated with an actual value.
ERROR:HDLParsers:851 - "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/hostmot2.vhd" Line 2884. Formal InterfaceRegs of entity with no default value must be associated with an actual value.
ERROR:HDLParsers:3312 - "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/hostmot2.vhd" Line 2962. Undefined symbol 'UARTSPerSSerial'.
ERROR:HDLParsers:1209 - "F:/5i20/CONFIGS/HOSTMOT2/SOURCE/hostmot2.vhd" Line 2962. UARTSPerSSerial: Undefined symbol (last report in this block)
-->
Total memory usage is 159768 kilobytes
Number of errors : 9 ( 0 filtered)
Number of warnings : 0 ( 0 filtered)
Number of infos : 0 ( 0 filtered)
Process "Synthesize" failedThanks in advance.
Last edit: 14 Jul 2014 17:25 by erasmo. Reason: correction
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- PCW
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14 Jul 2014 21:33 #48767
by PCW
Replied by PCW on topic Compiling firmware for Mesa 5i20 + 7i48 + 7i44
Oops looks like the (recently added)
InputPinsPerModule.vhd is missing from the source zipfile
I will fix this later today sometime
InputPinsPerModule.vhd is missing from the source zipfile
I will fix this later today sometime
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- erasmo
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15 Jul 2014 01:26 #48775
by erasmo
Replied by erasmo on topic Compiling firmware for Mesa 5i20 + 7i48 + 7i44
Ow, that would be great,
Will you tell me when it is fixed?
Thank you very much in advance.
Will you tell me when it is fixed?
Thank you very much in advance.
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15 Jul 2014 03:13 #48777
by PCW
Replied by PCW on topic Compiling firmware for Mesa 5i20 + 7i48 + 7i44
freeby.mesanet.com/hostmot2.zip
has the latest source with the missing InputPinsPerModule.vhd fiile
has the latest source with the missing InputPinsPerModule.vhd fiile
The following user(s) said Thank You: erasmo
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15 Jul 2014 13:55 #48795
by erasmo
Replied by erasmo on topic Compiling firmware for Mesa 5i20 + 7i48 + 7i44
Firware works fine 
But due to limitations of 5i20 (200k) I had to cut out two smart serial channels to fit firmware in fpga.
But I still have 6 ch of smart serial witch is enough for me.
Best regards.
Robert
But due to limitations of 5i20 (200k) I had to cut out two smart serial channels to fit firmware in fpga.
But I still have 6 ch of smart serial witch is enough for me.
Best regards.
Robert
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- vre
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21 Jul 2014 10:43 - 21 Jul 2014 10:56 #48993
by vre
Replied by vre on topic Compiling firmware for Mesa 5i20 + 7i48 + 7i44
I have downloaded this file freeby.mesanet.com/hostmot2.zip
installed 14.7 suite and when iam trying to open project fivei24.xise
it say me to migrate because the project has done with older version of suite.
When i choose migrate it say me that some files are missing
Also to flash 5i24 must have xilinx jtag cable or not ?
if i continue removing missing files from project and try to synthesize i get the following error
installed 14.7 suite and when iam trying to open project fivei24.xise
it say me to migrate because the project has done with older version of suite.
When i choose migrate it say me that some files are missing
Also to flash 5i24 must have xilinx jtag cable or not ?
PIN_7I76P_7I85_34.vhd
PIN_7I77_7I85S_34.vhdif i continue removing missing files from project and try to synthesize i get the following error
Parsing VHDL file "/home/user/Downloads/hostmot2/hostmot2.vhd" into library work
ERROR:HDLCompiler:104 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 80: Cannot find <inputpinspermodule> in library <work>. Please ensure that the library was compiled, and that a library and a use clause are present in the VHDL file.
Parsing entity <HostMot2>.
ERROR:HDLCompiler:854 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 87: Unit <hostmot2> ignored due to previous errors.
Parsing architecture <dataflow> of entity <hostmot2>.
ERROR:HDLCompiler:374 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 144: Entity <hostmot2> is not yet compiled.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 150: <integer> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 151: <integer> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 152: <integer> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 153: <integer> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 154: <integer> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 155: <boolean> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 156: <integer> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 157: <integer> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 158: <integer> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 159: <integer> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 160: <integer> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 161: <integer> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 162: <integer> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 163: <integer> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 165: <integer> is not declared.
ERROR:HDLCompiler:69 - "/home/user/Downloads/hostmot2/hostmot2.vhd" Line 166: <integer> is not declared.
Sorry, too many errors..
-->
Last edit: 21 Jul 2014 10:56 by vre.
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21 Jul 2014 11:02 - 21 Jul 2014 11:09 #48994
by PCW
Replied by PCW on topic Compiling firmware for Mesa 5i20 + 7i48 + 7i44
You will need to add the inputspinspermodule package to the project
(right click in the source pane, click on the add source menu item and select InputPinsPerModel.vhd)
(note that you need ISE version 9.2 to build 5I20 or other Spartan2 FPGA firmware)
Flashing the 5I24 is done with the mesaflash utility that runs under linux, no cables are needed,
however if you are building your own firmware I would suggest having a xilinx compatible JTAG cable
since its easy enough to make a broken bit file and a JTAG cable may be the only way restore the card.
Are you unable to use any of the standard pinouts?
(right click in the source pane, click on the add source menu item and select InputPinsPerModel.vhd)
(note that you need ISE version 9.2 to build 5I20 or other Spartan2 FPGA firmware)
Flashing the 5I24 is done with the mesaflash utility that runs under linux, no cables are needed,
however if you are building your own firmware I would suggest having a xilinx compatible JTAG cable
since its easy enough to make a broken bit file and a JTAG cable may be the only way restore the card.
Are you unable to use any of the standard pinouts?
Last edit: 21 Jul 2014 11:09 by PCW.
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- vre
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21 Jul 2014 12:54 - 21 Jul 2014 17:20 #48995
by vre
Replied by vre on topic Compiling firmware for Mesa 5i20 + 7i48 + 7i44
Iam just experimenting i don't have the 5i24 (i have ordered and is on the road) yet to try any stantard pinouts.
From these jtag cables
www.ebay.com/itm/JTAG-Download-Cable-Xil...2-DB25-/400504096068 (PC3)
www.ebay.com/itm/Xilinx-DLC7-Parallel-Ca...018249-/121386353212 (PC4)
www.ebay.com/itm/Xilinx-Platform-USB-Dow...C2C64A-/390809652326
www.ebay.com/itm/ALTERA-XILINX-Lattice-3...loader-/280959075692
which will work ?
From these jtag cables
www.ebay.com/itm/JTAG-Download-Cable-Xil...2-DB25-/400504096068 (PC3)
www.ebay.com/itm/Xilinx-DLC7-Parallel-Ca...018249-/121386353212 (PC4)
www.ebay.com/itm/Xilinx-Platform-USB-Dow...C2C64A-/390809652326
www.ebay.com/itm/ALTERA-XILINX-Lattice-3...loader-/280959075692
which will work ?
Last edit: 21 Jul 2014 17:20 by vre.
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21 Jul 2014 21:28 #49002
by PCW
Replied by PCW on topic Compiling firmware for Mesa 5i20 + 7i48 + 7i44
www.ebay.com/itm/Xilinx-Platform-USB-Dow...C2C64A-/390809652326
looks like the most likely one to work
looks like the most likely one to work
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16 Aug 2014 09:03 #49914
by vre
Replied by vre on topic Compiling firmware for Mesa 5i20 + 7i48 + 7i44
I want to change number of instances for a module and the ordering of pins. How to edit the arrays?
In this example if i want to change the number of 8 instances of stepgen to 3 instances must edit x"08" to x"03" ?
Also if i want to change ordering of pins is enough to change the ordering of PinDesc array elements ?or must change and the entries of this array ? What mean the hex numbers x"00", x"81" / x"82" etc ?
constant ModuleID : ModuleIDType
and
constant PinDesc : PinDescTypeIn this example if i want to change the number of 8 instances of stepgen to 3 instances must edit x"08" to x"03" ?
(StepGenTag, x"02", ClockLowTag, x"08", StepGenRateAddr&PadT, StepGenNumRegs, x"00", StepGenMPBitMask),Also if i want to change ordering of pins is enough to change the ordering of PinDesc array elements ?
IOPortTag & x"00" & StepGenTag & x"81", -- I/O 24
IOPortTag & x"00" & StepGenTag & x"82", -- I/O 25
IOPortTag & x"00" & StepGenTag & x"83", -- I/O 26
IOPortTag & x"00" & StepGenTag & x"84", -- I/O 27
IOPortTag & x"00" & StepGenTag & x"85", -- I/O 28Please Log in or Create an account to join the conversation.
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