Using the parallel port on the MESA 7i95?

More
5 years 5 months ago #210853 by arch dude
I'm assuming that there must exist firmware source code for the 7i95 and that it is available to be modified. My Xylinx FPGA skills are very rusty, but I would hope that reassigning the pins would be a fairly straightforward change. I will have some wiggle room because I can remove several modules. I assume my tasks would be to download and install the Xylinx dev system (is it still ISE?), download the MESA 7i95 project, and then study. Comments?

Please Log in or Create an account to join the conversation.

More
5 years 5 months ago #210887 by PCW
Yes you would download the 7i95.zip file from mesa and ISE14.7 from Xilinx

If you connect the 7I95 step/dir pins directly, why would a DB25 be involved at all?
That is, why would you need to keep the parallel port breakout?

Please Log in or Create an account to join the conversation.

More
5 years 5 months ago #210894 by arch dude
The machine is a big knee mill, like a Bridgeport. It was converted to CNC berore 2005, and all the wires run to a Sound Logic Bob In an enclosure bolted to the side of the machine's base. I do not want to mess with all that old wiring yet, so I want to just plug a parallel port cable into the old BoB. Otherwise, I will need to fabricate a new enclosure or run a lot of wires. This old BoB also has some 120 VAC relays and an opto-isolated interface to the old VFD spindle control. To use the 7i95, with no firmware change to drive a parallel port cable to plug into the BoB, I would (apparently) need to connect the individual wires in the parallel port cable to the screw terminals on the 7i95.

Where exactly on the MESA site (or elsewhere) can I find 7i95.zip?

Please Log in or Create an account to join the conversation.

More
5 years 5 months ago #210897 by PCW
www.mesanet.com/software/parallel/7i95.zip

It should be in the same place as the manual in the store also

Please Log in or Create an account to join the conversation.

More
5 years 4 months ago #210932 by arch dude
Thanks for your help. It took me most of the afternoon to install a VM and then install a full-up ISE environment. I have not yet built the 7i95.zip. I intend to build it with no modifications and then compare my bitfile with the provided bitfile, but I'm too tired to do that today.

Please Log in or Create an account to join the conversation.

More
5 years 4 months ago #211420 by arch dude
After returning from a little vacation, I unzipped 7i95.zip into a subdirectory of my home directory. Using
tom-itx.no-ip.biz:81/~webpage/emc/xilinx...14_install_index.php
as a guide (a hint, really) I set up the project in ISE. There were some minor glitches, all recoverable, until I actually tried to build the project. I encountered three lines of code in the top VHDL file that were not VHDL syntax:
use work.@card@.all
use work.@pin@.all
It looks like the @xxx@ construct is some sort of parameterization or macro substitution, so a just did a brute-force edit to insert the correct card and pin. However, I would prefer to do this properly if ISE and/or VHDL have this capability, or if Mesa has some sort of standard procedure I should be using. Where should I look?

The project builds with a new Pin file that is an exact duplicate of the old one except for the name. I will now attempt to modify my new pin file.

Please Log in or Create an account to join the conversation.

Moderators: PCW, jmelson
Time to create page: 0.208 seconds
Powered by Kunena Forum