7I80HDT Efinix Project File

I am cleaning up a converted HNC bar chucker that previously had a 5I23 driving a 7I42TA unbuffered I/O card and the special version of the 7I49 with the high voltage resolver customization. After trying a few different board combinations, I settled on moving all the control and signaling into one cabinet with a 7I80 driving the 7I49 and two 7I37TAs. I was trying yesterday to sort out the firmware, and it appears that there is not one for the Efinix silicon that supports the resolver card.

I downloaded the firmware ZIP file off Mesa's site and unzipped one of the files in the archive containing the Efinix files (efinehm2.zip). The Efinity software takes XML project files, and I am not seeing one.

If there is a project file for this silicon, would someone mind pointing me in the right direction? I have written a great deal of RTL for Altera, Xilinx, and Lattice devices, but this is sort of new territory to me as I have been able to use the "stock" firmware in every other LinuxCNC/Mesa application.

efinehm2.zip is the source for the embedded processor ROM that runs the
Ethernet --> hostmot2 code
(not needed unless you want to change the Ethernet interface)

The VHDL source and Efinity project files are in 7i80hdt-hm2-zip or 7i80hdt25-hm2.zip
(7i80hdt25-hm2.zip is for larger projects so has more relaxed timings)

Thank you for the instantaneous reply, PCW. Your reputation precedes you!

I have managed to pull the project into the Efinix software and run synthesis and PAR. I noticed in another thread about the 7I92 that there was a mention of a clock bug. Compiling the project out of the box with a top-level module being pulled in as TopEthernetHostmot2, I see these exceptions during compilation.

Missing a clock can throw a wrench in the works. Is it possible to brick one of these devices to where I would have to have a JTAG programmer to write a new bitstream, or does the Micrel MCU next to the Ethernet port handle all the flashing operations? I know that the Mesa hardware is designed to be immune to bricking, but I want to check before I hammer out some bitstreams.

The 7I49 should use the fast clock for PWM so that's not expected

You have to try pretty hard to brick a 7I80

If accidentally brick the card, you can move both IP address jumpers
to the "up" position which will force the fallback configuration to load.

In addition there are two separate EEPROMs both containing a user and fallback configuration

The PIN_SV6_7I49_72.vhd pinout builds here with no major complaints
and meets timing (though I have not tested it with a 7I49):

Maximum possible analyzed clocks frequency
Clock Name Period (ns) Frequency (MHz) Edge
procclk 9.444 105.885 (R-R)
hm2fastclock 4.672 214.037 (R-R)

Geomean max period: 6.643

Setup (Max) Clock Relationship
Launch Clock Capture Clock Constraint (ns) Slack (ns) Edge
procclk procclk 9.900 0.456 (R-R)
hm2fastclock hm2fastclock 6.100 1.428 (R-R)

Hold (Min) Clock Relationship
Launch Clock Capture Clock Constraint (ns) Slack (ns) Edge
procclk procclk 0.000 0.086 (R-R)
hm2fastclock hm2fastclock 0.000 0.307 (R-R)

Hi PCW.
I got efinix 7i80hdt + 7i48 + 7i44 - what's firmware i can use ?
Thank You !

 
 
should be correct for a 7I48+7I44