Axis Enables won't invert
06 Jun 2015 19:32 #59518
by rszemeti
Axis Enables won't invert was created by rszemeti
Here are the drive enable lines from my HAL file.
Problem: the Y enable refuses to be inverted. It responds to the machine on/off on the GUI, changing state
but I cannot set it as an active low signal, the "invert_output" seems to have no effect.
I have not checked the X and Z enables at this point.
According to the Mesa 5i20 with 7i33 manual, the 7i33 expects joint enables on IO Channels 10,11,22 and 23
I dont understand why the HAL file refers to 012,013,016 ... but, I am getting an enable signal on
phsyical pin 13 of the 7i33, which is connected to 5i20 pin
The physical "enable" pins on the 7i33 (driver side) are 13,25,37 .. these connect back to IO channels 10,11,23 on the 5i20
I tried changing the X Enable block to refer to pin gpio.010 .. emc crashed out during load, so I guess 012,013 and 016 are correct.
Why can't I invert the enable signals?
# --- X-ENABLE ---
setp hm2_5i20.0.gpio.012.is_output true
net x-enable hm2_5i20.0.gpio.012.out
setp hm2_5i20.0.gpio.012.invert_output true
# --- Y-ENABLE ---
setp hm2_5i20.0.gpio.013.is_output true
net y-enable hm2_5i20.0.gpio.013.out
setp hm2_5i20.0.gpio.013.invert_output true
# --- Z-ENABLE ---
setp hm2_5i20.0.gpio.016.is_output true
net z-enable hm2_5i20.0.gpio.016.out
setp hm2_5i20.0.gpio.016.invert_output true
Problem: the Y enable refuses to be inverted. It responds to the machine on/off on the GUI, changing state
but I cannot set it as an active low signal, the "invert_output" seems to have no effect.
I have not checked the X and Z enables at this point.
According to the Mesa 5i20 with 7i33 manual, the 7i33 expects joint enables on IO Channels 10,11,22 and 23
I dont understand why the HAL file refers to 012,013,016 ... but, I am getting an enable signal on
phsyical pin 13 of the 7i33, which is connected to 5i20 pin
The physical "enable" pins on the 7i33 (driver side) are 13,25,37 .. these connect back to IO channels 10,11,23 on the 5i20
I tried changing the X Enable block to refer to pin gpio.010 .. emc crashed out during load, so I guess 012,013 and 016 are correct.
Why can't I invert the enable signals?
# --- X-ENABLE ---
setp hm2_5i20.0.gpio.012.is_output true
net x-enable hm2_5i20.0.gpio.012.out
setp hm2_5i20.0.gpio.012.invert_output true
# --- Y-ENABLE ---
setp hm2_5i20.0.gpio.013.is_output true
net y-enable hm2_5i20.0.gpio.013.out
setp hm2_5i20.0.gpio.013.invert_output true
# --- Z-ENABLE ---
setp hm2_5i20.0.gpio.016.is_output true
net z-enable hm2_5i20.0.gpio.016.out
setp hm2_5i20.0.gpio.016.invert_output true
Please Log in or Create an account to join the conversation.
06 Jun 2015 19:47 #59519
by andypugh
The definitive mapping of pins to functions to gpio numbers will be in the dmesg output after the firmware is loaded.
You seem to be using STSV8_4.
git.linuxcnc.org/gitweb?p=hostmot2-firmw...9d6b451b72d4ceff6372
Seems to agree that the enables go to GPIO 10, 11, 22 and 23.
LinuxCNC will probably refuse to let you set the "is_output" of a pin that is claimed by a PWMgen, but I think it should let you invert it.
What was the actual exit message (I don't like the word crash")
Replied by andypugh on topic Axis Enables won't invert
According to the Mesa 5i20 with 7i33 manual, the 7i33 expects joint enables on IO Channels 10,11,22 and 23
I dont understand why the HAL file refers to 012,013,016 ... but, I am getting an enable signal on
phsyical pin 13 of the 7i33, which is connected to 5i20 pin
The definitive mapping of pins to functions to gpio numbers will be in the dmesg output after the firmware is loaded.
You seem to be using STSV8_4.
git.linuxcnc.org/gitweb?p=hostmot2-firmw...9d6b451b72d4ceff6372
Seems to agree that the enables go to GPIO 10, 11, 22 and 23.
LinuxCNC will probably refuse to let you set the "is_output" of a pin that is claimed by a PWMgen, but I think it should let you invert it.
What was the actual exit message (I don't like the word crash")
The following user(s) said Thank You: rszemeti
Please Log in or Create an account to join the conversation.
06 Jun 2015 19:59 #59522
by rszemeti
Replied by rszemeti on topic Axis Enables won't invert
Thats fine, if 012,013 and 016 are correct, no problem with that ... and as I said, the enable output DOES correctly get to the right physical pin on the 7i33 ... so OK, I guess the numbers assigned by pncconf are correct.
So why can't I invert my enable signal then?
So why can't I invert my enable signal then?
Please Log in or Create an account to join the conversation.
06 Jun 2015 20:29 - 06 Jun 2015 20:30 #59523
by andypugh
But I don't think that they are correct.
pncconf doesn't isn't what decides which pin is twiddled by hm2_5i20.0.pwmgen.00.enable. That comes from the firmware.
Definitely says GPIO numbers 10,11, 22, 23 are the PWM enables.
So, I can invert GPIO 10, but not GPIO 16.
Replied by andypugh on topic Axis Enables won't invert
Thats fine, if 012,013 and 016 are correct, no problem with that
But I don't think that they are correct.
I guess the numbers assigned by pncconf are correct.
pncconf doesn't isn't what decides which pin is twiddled by hm2_5i20.0.pwmgen.00.enable. That comes from the firmware.
andypugh@mill:~$ halrun
halcmd: loadrt hostmot2
halcmd: loadrt hm2_pci config="firmware=hm2/5i23/SVST8_4.BIT"
halcmd: exit
andypugh@mill:~$ dmesg
[ 342.734132] hm2_5i23.0: firmware: requesting hm2/5i23/SVST8_4.BIT
[ 342.958807] hm2/hm2_5i23.0: 72 I/O Pins used:
[ 342.958817] hm2/hm2_5i23.0: IO Pin 000 (P2-01): Encoder #1, pin B (Input)
[ 342.958825] hm2/hm2_5i23.0: IO Pin 001 (P2-03): Encoder #1, pin A (Input)
[ 342.958833] hm2/hm2_5i23.0: IO Pin 002 (P2-05): Encoder #0, pin B (Input)
[ 342.958840] hm2/hm2_5i23.0: IO Pin 003 (P2-07): Encoder #0, pin A (Input)
[ 342.958847] hm2/hm2_5i23.0: IO Pin 004 (P2-09): Encoder #1, pin Index (Input)
[ 342.958855] hm2/hm2_5i23.0: IO Pin 005 (P2-11): Encoder #0, pin Index (Input)
[ 342.958863] hm2/hm2_5i23.0: IO Pin 006 (P2-13): PWMGen #1, pin Out0 (PWM or Up) (Output)
[ 342.958870] hm2/hm2_5i23.0: IO Pin 007 (P2-15): PWMGen #0, pin Out0 (PWM or Up) (Output)
[ 342.958878] hm2/hm2_5i23.0: IO Pin 008 (P2-17): PWMGen #1, pin Out1 (Dir or Down) (Output)
[ 342.958886] hm2/hm2_5i23.0: IO Pin 009 (P2-19): PWMGen #0, pin Out1 (Dir or Down) (Output)
[ 342.958894] hm2/hm2_5i23.0: IO Pin 010 (P2-21): PWMGen #1, pin Not-Enable (Output)
[ 342.958902] hm2/hm2_5i23.0: IO Pin 011 (P2-23): PWMGen #0, pin Not-Enable (Output)
[ 342.958909] hm2/hm2_5i23.0: IO Pin 012 (P2-25): Encoder #3, pin B (Input)
[ 342.958917] hm2/hm2_5i23.0: IO Pin 013 (P2-27): Encoder #3, pin A (Input)
[ 342.958924] hm2/hm2_5i23.0: IO Pin 014 (P2-29): Encoder #2, pin B (Input)
[ 342.958931] hm2/hm2_5i23.0: IO Pin 015 (P2-31): Encoder #2, pin A (Input)
[ 342.958939] hm2/hm2_5i23.0: IO Pin 016 (P2-33): Encoder #3, pin Index (Input)
[ 342.958946] hm2/hm2_5i23.0: IO Pin 017 (P2-35): Encoder #2, pin Index (Input)
[ 342.958954] hm2/hm2_5i23.0: IO Pin 018 (P2-37): PWMGen #3, pin Out0 (PWM or Up) (Output)
[ 342.958962] hm2/hm2_5i23.0: IO Pin 019 (P2-39): PWMGen #2, pin Out0 (PWM or Up) (Output)
[ 342.958970] hm2/hm2_5i23.0: IO Pin 020 (P2-41): PWMGen #3, pin Out1 (Dir or Down) (Output)
[ 342.958978] hm2/hm2_5i23.0: IO Pin 021 (P2-43): PWMGen #2, pin Out1 (Dir or Down) (Output)
[ 342.958985] hm2/hm2_5i23.0: IO Pin 022 (P2-45): PWMGen #3, pin Not-Enable (Output)
[ 342.958993] hm2/hm2_5i23.0: IO Pin 023 (P2-47): PWMGen #2, pin Not-Enable (Output)
[ 342.959001] hm2/hm2_5i23.0: IO Pin 024 (P3-01): Encoder #5, pin B (Input)
[ 342.959008] hm2/hm2_5i23.0: IO Pin 025 (P3-03): Encoder #5, pin A (Input)
[ 342.959015] hm2/hm2_5i23.0: IO Pin 026 (P3-05): Encoder #4, pin B (Input)
[ 342.959022] hm2/hm2_5i23.0: IO Pin 027 (P3-07): Encoder #4, pin A (Input)
[ 342.959030] hm2/hm2_5i23.0: IO Pin 028 (P3-09): Encoder #5, pin Index (Input)
[ 342.959037] hm2/hm2_5i23.0: IO Pin 029 (P3-11): Encoder #4, pin Index (Input)
[ 342.959045] hm2/hm2_5i23.0: IO Pin 030 (P3-13): PWMGen #5, pin Out0 (PWM or Up) (Output)
[ 342.959053] hm2/hm2_5i23.0: IO Pin 031 (P3-15): PWMGen #4, pin Out0 (PWM or Up) (Output)
[ 342.959061] hm2/hm2_5i23.0: IO Pin 032 (P3-17): PWMGen #5, pin Out1 (Dir or Down) (Output)
[ 342.959069] hm2/hm2_5i23.0: IO Pin 033 (P3-19): PWMGen #4, pin Out1 (Dir or Down) (Output)
[ 342.959077] hm2/hm2_5i23.0: IO Pin 034 (P3-21): PWMGen #5, pin Not-Enable (Output)
[ 342.959084] hm2/hm2_5i23.0: IO Pin 035 (P3-23): PWMGen #4, pin Not-Enable (Output)
[ 342.959092] hm2/hm2_5i23.0: IO Pin 036 (P3-25): Encoder #7, pin B (Input)
[ 342.959099] hm2/hm2_5i23.0: IO Pin 037 (P3-27): Encoder #7, pin A (Input)
[ 342.959106] hm2/hm2_5i23.0: IO Pin 038 (P3-29): Encoder #6, pin B (Input)
[ 342.959113] hm2/hm2_5i23.0: IO Pin 039 (P3-31): Encoder #6, pin A (Input)
[ 342.959121] hm2/hm2_5i23.0: IO Pin 040 (P3-33): Encoder #7, pin Index (Input)
[ 342.959128] hm2/hm2_5i23.0: IO Pin 041 (P3-35): Encoder #6, pin Index (Input)
[ 342.959136] hm2/hm2_5i23.0: IO Pin 042 (P3-37): PWMGen #7, pin Out0 (PWM or Up) (Output)
[ 342.959144] hm2/hm2_5i23.0: IO Pin 043 (P3-39): PWMGen #6, pin Out0 (PWM or Up) (Output)
[ 342.959152] hm2/hm2_5i23.0: IO Pin 044 (P3-41): PWMGen #7, pin Out1 (Dir or Down) (Output)
[ 342.959160] hm2/hm2_5i23.0: IO Pin 045 (P3-43): PWMGen #6, pin Out1 (Dir or Down) (Output)
[ 342.959168] hm2/hm2_5i23.0: IO Pin 046 (P3-45): PWMGen #7, pin Not-Enable (Output)
[ 342.959175] hm2/hm2_5i23.0: IO Pin 047 (P3-47): PWMGen #6, pin Not-Enable (Output)
[ 342.959183] hm2/hm2_5i23.0: IO Pin 048 (P4-01): StepGen #0, pin Step (Output)
[ 342.959191] hm2/hm2_5i23.0: IO Pin 049 (P4-03): StepGen #0, pin Direction (Output)
[ 342.959198] hm2/hm2_5i23.0: IO Pin 050 (P4-05): IOPort
[ 342.959204] hm2/hm2_5i23.0: IO Pin 051 (P4-07): IOPort
[ 342.959210] hm2/hm2_5i23.0: IO Pin 052 (P4-09): IOPort
[ 342.959216] hm2/hm2_5i23.0: IO Pin 053 (P4-11): IOPort
[ 342.959223] hm2/hm2_5i23.0: IO Pin 054 (P4-13): StepGen #1, pin Step (Output)
[ 342.959230] hm2/hm2_5i23.0: IO Pin 055 (P4-15): StepGen #1, pin Direction (Output)
[ 342.959237] hm2/hm2_5i23.0: IO Pin 056 (P4-17): IOPort
[ 342.959243] hm2/hm2_5i23.0: IO Pin 057 (P4-19): IOPort
[ 342.959249] hm2/hm2_5i23.0: IO Pin 058 (P4-21): IOPort
[ 342.959255] hm2/hm2_5i23.0: IO Pin 059 (P4-23): IOPort
[ 342.959262] hm2/hm2_5i23.0: IO Pin 060 (P4-25): StepGen #2, pin Step (Output)
[ 342.959270] hm2/hm2_5i23.0: IO Pin 061 (P4-27): StepGen #2, pin Direction (Output)
[ 342.959277] hm2/hm2_5i23.0: IO Pin 062 (P4-29): IOPort
[ 342.959283] hm2/hm2_5i23.0: IO Pin 063 (P4-31): IOPort
[ 342.959289] hm2/hm2_5i23.0: IO Pin 064 (P4-33): IOPort
[ 342.959295] hm2/hm2_5i23.0: IO Pin 065 (P4-35): IOPort
[ 342.959302] hm2/hm2_5i23.0: IO Pin 066 (P4-37): StepGen #3, pin Step (Output)
[ 342.959309] hm2/hm2_5i23.0: IO Pin 067 (P4-39): StepGen #3, pin Direction (Output)
[ 342.959316] hm2/hm2_5i23.0: IO Pin 068 (P4-41): IOPort
[ 342.959322] hm2/hm2_5i23.0: IO Pin 069 (P4-43): IOPort
[ 342.959328] hm2/hm2_5i23.0: IO Pin 070 (P4-45): IOPort
[ 342.959334] hm2/hm2_5i23.0: IO Pin 071 (P4-47): IOPort
[ 342.959687] hm2/hm2_5i23.0: registered
[ 342.959693] hm2_5i23.0: initialized AnyIO board at 0000:05:00.0
[ 345.013585] hm2_5i23.0: dropping AnyIO board at 0000:05:00.0
[ 345.013600] hm2/hm2_5i23.0: unregistered
[ 345.013640] hm2_pci 0000:05:00.0: PCI INT A disabled
[ 345.013693] hm2_pci: driver unloaded
[ 345.018281] hm2: unloading
[ 345.167411] RTAI[math]: unloaded.
[ 345.215454] SCHED releases registered named ALIEN RTGLBH
[ 345.245477] RTAI[malloc]: unloaded.
[ 345.344029] RTAI[sched]: unloaded (forced hard/soft/hard transitions: traps 0, syscalls 0).
[ 345.348371] I-pipe: Domain RTAI unregistered.
[ 345.348473] RTAI[hal]: unmounted.Definitely says GPIO numbers 10,11, 22, 23 are the PWM enables.
andypugh@mill:~$ halrun
halcmd: loadrt hostmot2
halcmd: loadrt hm2_pci config="firmware=hm2/5i23/SVST8_4.BIT"
halcmd: setp hm2_5i23.0.gpio.010.invert_output 1
halcmd: setp hm2_5i23.0.gpio.016.invert_output 1
<stdin>:5: parameter or pin 'hm2_5i23.0.gpio.016.invert_output' not found
halcmd:So, I can invert GPIO 10, but not GPIO 16.
Last edit: 06 Jun 2015 20:30 by andypugh.
Please Log in or Create an account to join the conversation.
06 Jun 2015 21:03 - 06 Jun 2015 21:06 #59526
by rszemeti
Replied by rszemeti on topic Axis Enables won't invert
OK, I'll go and replace the Y axis config with the following lines then instead:
setp hm2_5i20.0.gpio.010.is_output true
net y-enable hm2_5i20.0.gpio.010.out
setp hm2_5i20.0.gpio.010.invert_output true
And can you explain how if the config is so incorrect, why I am getting an enable signal on pin 13 of the Mesa 7i33 .. which hangs on gpio.023 and nothing in my HAL file refers to that pin?
I should add: the lines referring to gpio.016 do not cause any error when emc loads ... which is kinda weird.
setp hm2_5i20.0.gpio.010.is_output true
net y-enable hm2_5i20.0.gpio.010.out
setp hm2_5i20.0.gpio.010.invert_output true
And can you explain how if the config is so incorrect, why I am getting an enable signal on pin 13 of the Mesa 7i33 .. which hangs on gpio.023 and nothing in my HAL file refers to that pin?
I should add: the lines referring to gpio.016 do not cause any error when emc loads ... which is kinda weird.
Last edit: 06 Jun 2015 21:06 by rszemeti.
Please Log in or Create an account to join the conversation.
06 Jun 2015 21:23 #59527
by andypugh
The hm2_5i20.... pins are _all_ hooked up to either physical pins or internal values on the FPGA by the firmware and driver. The HAL config only connects those pins to other bits of linuxCNC.
Keep a copy of your dmesg output somewhere, that is created on-the-fly as the driver allocates the pins.
Pncconf does its best to keep track of what the pins exported by the driver do, but it's a moving target. (admittedly not one that has moved in a long time for the 5i20)
Replied by andypugh on topic Axis Enables won't invert
I wouldn't bother with the "is_output", the pin is hard-coded as an output in the firmware if the pwmgen in question is enabled.OK, I'll go and replace the Y axis config with the following lines then instead:
setp hm2_5i20.0.gpio.010.is_output true
net y-enable hm2_5i20.0.gpio.010.out
setp hm2_5i20.0.gpio.010.invert_output true
And can you explain how if the config is so incorrect, why I am getting an enable signal on pin 13 of the Mesa 7i33 .. which hangs on gpio.023 and nothing in my HAL file refers to that pin?.
The hm2_5i20.... pins are _all_ hooked up to either physical pins or internal values on the FPGA by the firmware and driver. The HAL config only connects those pins to other bits of linuxCNC.
Keep a copy of your dmesg output somewhere, that is created on-the-fly as the driver allocates the pins.
Pncconf does its best to keep track of what the pins exported by the driver do, but it's a moving target. (admittedly not one that has moved in a long time for the 5i20)
Please Log in or Create an account to join the conversation.
06 Jun 2015 21:39 #59528
by rszemeti
Replied by rszemeti on topic Axis Enables won't invert
Here we go, my dmesg output for the relevant part:
Unsuprisingly, the gpio.010 thing produced a "PIN NOT FOUND" stylee error
[91951.615010] hm2: loading Mesa HostMot2 driver version 0.15
[91951.618383] hm2_pci: loading Mesa AnyIO HostMot2 driver version 0.7
[91951.618444] hm2_pci: discovered 5i20 at 0000:03:03.0
[91951.774037] hm2/hm2_5i20.0: 72 I/O Pins used:
[91951.774046] hm2/hm2_5i20.0: IO Pin 000 (P2-01): Encoder #1, pin B (Input)
[91951.774051] hm2/hm2_5i20.0: IO Pin 001 (P2-03): Encoder #1, pin A (Input)
[91951.774056] hm2/hm2_5i20.0: IO Pin 002 (P2-05): Encoder #0, pin B (Input)
[91951.774060] hm2/hm2_5i20.0: IO Pin 003 (P2-07): Encoder #0, pin A (Input)
[91951.774065] hm2/hm2_5i20.0: IO Pin 004 (P2-09): Encoder #1, pin Index (Input)
[91951.774070] hm2/hm2_5i20.0: IO Pin 005 (P2-11): Encoder #0, pin Index (Input)
[91951.774075] hm2/hm2_5i20.0: IO Pin 006 (P2-13): PWMGen #1, pin Out0 (PWM or Up) (Output)
[91951.774080] hm2/hm2_5i20.0: IO Pin 007 (P2-15): PWMGen #0, pin Out0 (PWM or Up) (Output)
[91951.774085] hm2/hm2_5i20.0: IO Pin 008 (P2-17): PWMGen #1, pin Out1 (Dir or Down) (Output)
[91951.774090] hm2/hm2_5i20.0: IO Pin 009 (P2-19): PWMGen #0, pin Out1 (Dir or Down) (Output)
[91951.774095] hm2/hm2_5i20.0: IO Pin 010 (P2-21): PWMGen #1, pin Not-Enable (Output)
[91951.774099] hm2/hm2_5i20.0: IO Pin 011 (P2-23): PWMGen #0, pin Not-Enable (Output)
[91951.774104] hm2/hm2_5i20.0: IO Pin 012 (P2-25): IOPort
[91951.774108] hm2/hm2_5i20.0: IO Pin 013 (P2-27): IOPort
[91951.774113] hm2/hm2_5i20.0: IO Pin 014 (P2-29): Encoder #2, pin B (Input)
[91951.774120] hm2/hm2_5i20.0: IO Pin 015 (P2-31): Encoder #2, pin A (Input)
[91951.774127] hm2/hm2_5i20.0: IO Pin 016 (P2-33): IOPort
[91951.774132] hm2/hm2_5i20.0: IO Pin 017 (P2-35): Encoder #2, pin Index (Input)
[91951.774137] hm2/hm2_5i20.0: IO Pin 018 (P2-37): PWMGen #3, pin Out0 (PWM or Up) (Output)
[91951.774141] hm2/hm2_5i20.0: IO Pin 019 (P2-39): PWMGen #2, pin Out0 (PWM or Up) (Output)
[91951.774146] hm2/hm2_5i20.0: IO Pin 020 (P2-41): PWMGen #3, pin Out1 (Dir or Down) (Output)
[91951.774150] hm2/hm2_5i20.0: IO Pin 021 (P2-43): PWMGen #2, pin Out1 (Dir or Down) (Output)
[91951.774155] hm2/hm2_5i20.0: IO Pin 022 (P2-45): PWMGen #3, pin Not-Enable (Output)
[91951.774159] hm2/hm2_5i20.0: IO Pin 023 (P2-47): PWMGen #2, pin Not-Enable (Output)
[91951.774164] hm2/hm2_5i20.0: IO Pin 024 (P3-01): IOPort
[91951.774167] hm2/hm2_5i20.0: IO Pin 025 (P3-03): IOPort
[91951.774171] hm2/hm2_5i20.0: IO Pin 026 (P3-05): IOPort
[91951.774175] hm2/hm2_5i20.0: IO Pin 027 (P3-07): IOPort
[91951.774178] hm2/hm2_5i20.0: IO Pin 028 (P3-09): IOPort
Unsuprisingly, the gpio.010 thing produced a "PIN NOT FOUND" stylee error
Please Log in or Create an account to join the conversation.
06 Jun 2015 22:21 #59529
by andypugh
Actually that is quite surprising.
So all output pins, regardless of whether they are claimed by a module have an invert-output parameter.
Replied by andypugh on topic Axis Enables won't invert
Unsuprisingly, the gpio.010 thing produced a "PIN NOT FOUND" stylee error
Actually that is quite surprising.
andypugh@mill:~$ halrun
halcmd: loadrt hostmot2
halcmd: loadrt hm2_pci config="firmware=hm2/5i23/SVST8_4.BIT"
halcmd: show param *invert_output
Parameters:
Owner Type Dir Value Name
5 bit RW FALSE hm2_5i23.0.gpio.006.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.007.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.008.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.009.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.010.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.011.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.018.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.019.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.020.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.021.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.022.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.023.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.030.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.031.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.032.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.033.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.034.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.035.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.042.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.043.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.044.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.045.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.046.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.047.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.048.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.049.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.050.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.051.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.052.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.053.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.054.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.055.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.056.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.057.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.058.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.059.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.060.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.061.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.062.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.063.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.064.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.065.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.066.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.067.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.068.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.069.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.070.invert_output
5 bit RW FALSE hm2_5i23.0.gpio.071.invert_outputSo all output pins, regardless of whether they are claimed by a module have an invert-output parameter.
Please Log in or Create an account to join the conversation.
06 Jun 2015 22:42 #59532
by rszemeti
Replied by rszemeti on topic Axis Enables won't invert
OK, So my blonde moment is over ...
I was (stupidly) assigning the unused GPIO pin on that plug of the 5i20 as the drive enable ... when of course it is already inherently there as part of the PWM ... duh!
The reason I had spare GPIO's is now clear to me, I have a spindle drive PWM ... but no encoder assigned for that channel, so the encoder pins are "free" but of course not accesible as useful GPIO outputs on the 7i33 ....
So, with that out of the way, I added a line:
setp hm2_5i20.0.gpio.010.invert_output true
to my custom.hal .. I should have saved the typing, because at that point it then not only inverts the output (hurrah!) but promptly mutes the output of drive voltage when the drive is "enabled" as well ... it must not only be tied through to the drive enable pin, but be connected to some part of the PDM->analogue circuitry as well ...
sigh.
Looks like I shall have to bodge a transistor into it after all!
I suppose I could tie all 3 drives to the general "machine on" signal and use a spare ouput on the isolated IO card ...
I was (stupidly) assigning the unused GPIO pin on that plug of the 5i20 as the drive enable ... when of course it is already inherently there as part of the PWM ... duh!
The reason I had spare GPIO's is now clear to me, I have a spindle drive PWM ... but no encoder assigned for that channel, so the encoder pins are "free" but of course not accesible as useful GPIO outputs on the 7i33 ....
So, with that out of the way, I added a line:
setp hm2_5i20.0.gpio.010.invert_output true
to my custom.hal .. I should have saved the typing, because at that point it then not only inverts the output (hurrah!) but promptly mutes the output of drive voltage when the drive is "enabled" as well ... it must not only be tied through to the drive enable pin, but be connected to some part of the PDM->analogue circuitry as well ...
sigh.
Looks like I shall have to bodge a transistor into it after all!
I suppose I could tie all 3 drives to the general "machine on" signal and use a spare ouput on the isolated IO card ...
Please Log in or Create an account to join the conversation.
06 Jun 2015 23:01 #59534
by andypugh
I think the latter approach is possibly best. Though if you have access to both ends of the drive-enable opto you might be able to wire the enable output to the low-side. (I don't know if 7i33 outputs sink current)
Replied by andypugh on topic Axis Enables won't invert
Looks like I shall have to bodge a transistor into it after all!
I suppose I could tie all 3 drives to the general "machine on" signal and use a spare ouput on the isolated IO card ...
I think the latter approach is possibly best. Though if you have access to both ends of the drive-enable opto you might be able to wire the enable output to the low-side. (I don't know if 7i33 outputs sink current)
Please Log in or Create an account to join the conversation.
Moderators: cmorley
Time to create page: 0.103 seconds