When the CPU is isolated , the ISR is entered more reliably because the time to swap CPU does not have to be added? You obtained 1/2 sdev with a shorter base period and 1/4 sdev for the servo period. It makes sense. The Max Min numbers you are getting with a single cpu are quite acceptable in my view. What is your opinion?
Do you know if the interrupt to the ISR is routed through the APCI or is it direct? Depending on the hardware design irq3 and irq4 may get you into the ISR more quickly.
The processor can be disabled in the Live LinuxCNC 2.8 buster ISO by editing the Grub at boot and adding "isolcpus=1,2,3,4,5,6,7" where quiet and splash are shown from the in the menu.
This image is running on the I7-740 with wireless disabled and 1 processor enabled
This image is running on the I7-740 with wireless disabled and all 8 processor enabled