hostmot2 oneshot bitfile help

Parse bug fixed in master

I also changed the firmware a bit so the sw triggers work identically
to the external triggers, should not affect you but here is the
updated oneshot source:

 

PCW wrote:

Parse bug fixed in master
 

Does it belong in 2.9 too? 

Yes, its a simple bug fix

Trigger1 is configured to GPIO15 in the bitfile.

I send short pulses with a frequency of about 50 Hz to the input GPIO15.

But I don't get a usable signal at pin out1. I hoped to get a signal with approx. 50 Hz and fixed width.
   

Is this a bug or did I configure it wrong?

Not sure what's going on
Did you use the latest source I attached?

Here's what I get: 

that is exactly what I expected to get

yes, i used the latest source.

LinuxCNC is the current master (buildbot). Stanza "oneshots" works now.

But I will generate the bitfile again. I want to make sure that i have indeed used the latest sources.

I will report...

I have created the bitfile again with the latest sources. Same result.

Currently the signal comes from an optocoupler.
I use the encoder input on the 7i76 sigle ended. I checked the signal with the oscilloscope. The signal is not clean as expected.
With a short shielded cable the result was a little better. I think it is due to the electrical noise in the cabinet. 

With a differential signal it would probably work reliably.

I have to find a way to get a differential signal from my laser light barrier.

The input digital filter should deal with most noise issues unless the are really major,
and in that casem I would expect that to show up in the unfiltered (GPIO) input as random noise pulses.

(The input filterishould normally be set to about 1/2 the expected minimum input pulse width)

Did you reload the FPGA after updating it?

FPGA is reloaded.

yes, right. The signal at the gpio is clean. So the noise should not be the big problem.

Now i connected the signal from the optocoupler together to GPIO 15 and 16. 

Both signals (exttrigger1 and exttrigger2) are faulty. The two signals are not equal

The reason I asked about reloading is that is the exact issue
with the older code (external input filtering was faulty)

I will see if I can duplicate this on Xilinx (I tested with a 7I96S = Efinix chip)