New and Working RTAI debs for 2.9

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1 year 10 months ago #317039 by Onrddd
Hi everyone, total noob here. I'm experinenting the linuxcnc. I have an asrock j3355b board. I'm planning to use it with parallel port. I tried to install debian and linux cnc 2.9.2 but I cannot solve the kernel issue. When I install debian 12 it comes with kernel 6.x.x and all the RTAI kernel and other stuff is for kernel 5.4. as I understand that kernel and RTAI packages needs to be same. How do you install debian 12 RTAI, please help or direct me to correct direction.

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1 year 10 months ago #317044 by Elco
I assume that this procedure does not work when starting with a clean version of LMDE6? I tried on several systems, but I get long lists with missing python modules and the grub menu does not work.

Regards, Rob

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1 year 10 months ago #317285 by Elco
After installation of the 5.4.279 rtai kernel + the matching Lcnc version  and a reboot, applying rt_setup and rebooting again,
starting a the axis demo for the first time often causes the system to hang or the run to abort with errors.
This happened with about 7 tries on two different systems (a 4 core Intel - isolcpu=3 and a 6 core AMD - isolcpu=2,3,5).
Info attached, as well as a run of the RTAI testsuite (odt file).
The second start of the axis demo gives an RTAI warning, but ignoring that the demo works perfectly to the end.

Running the latency test for the first time usually shows permanent 0's for both fast clock and servo.
Starting the second time it works, but the servo thread is always 999725 at start, but clearing that both values stay below 10000 with multiple gears and browsing.

Edit: Any suggestions what is wrong here?
Thanks.

Robert



 

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1 year 8 months ago #321772 by MTTI
Hello,

I installed the debs in the pinned link (5.4.279) on fresh Debian 12 and booted on this kernel but when I launch LinuxCNC or even Latency test, the computer freeze...
I tried to disable many things in the BIOS...
I tried on another computer and it works, so I think this is hardware related...

sudo lscpu:
Code:
Architecture :                              x86_64   Mode(s) opératoire(s) des processeurs :   32-bit, 64-bit   Tailles des adresses:                     39 bits physical, 48 bits virtual   Boutisme :                                Little Endian Processeur(s) :                             4   Liste de processeur(s) en ligne :         0-3 Identifiant constructeur :                  GenuineIntel   Identifiant constructeur du BIOS :        Intel(R) Corporation   Nom de modèle :                           Intel(R) Core(TM) i7-8550U CPU @ 1.80GHz     Nom de modèle BIOS :                    Intel(R) Core(TM) i7-8550U CPU @ 1.80GHz To Be Filled By O.E.M. CPU @ 1.7GHz     Famille de processeur BIOS :            198     Famille de processeur :                 6     Modèle :                                142     Thread(s) par cœur :                    1     Cœur(s) par socket :                    4     Socket(s) :                             1     Révision :                              10     multiplication des MHz du/des CPU(s) :  99%     Vitesse maximale du processeur en MHz : 1800,0000     Vitesse minimale du processeur en MHz : 400,0000     BogoMIPS :                              3999,93     Drapeaux :                              fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp                                             lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl est tm2 ssse3 s                                             dbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb i                                             nvpcid_single pti ssbd ibrs ibpb stibp fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid mpx rdseed adx smap clflushopt intel_pt xsaveopt xsave                                             c xgetbv1 xsaves dtherm arat pln pts hwp hwp_notify hwp_act_window hwp_epp md_clear flush_l1d arch_capabilities Caches (somme de toutes) :                     L1d :                                     128 KiB (4 instances)   L1i :                                     128 KiB (4 instances)   L2 :                                      1 MiB (4 instances)   L3 :                                      8 MiB (1 instance) NUMA :                                         Nœud(s) NUMA :                            1   Nœud NUMA 0 de processeur(s) :            0-3 Vulnérabilités :                               Gather data sampling :                    Mitigation; Microcode   Itlb multihit :                           KVM: Mitigation: VMX unsupported   L1tf :                                    Mitigation; PTE Inversion   Mds :                                     Mitigation; Clear CPU buffers; SMT disabled   Meltdown :                                Mitigation; PTI   Mmio stale data :                         Mitigation; Clear CPU buffers; SMT disabled   Reg file data sampling :                  Not affected   Retbleed :                                Mitigation; IBRS   Spec rstack overflow :                    Not affected   Spec store bypass :                       Mitigation; Speculative Store Bypass disabled via prctl   Spectre v1 :                              Mitigation; usercopy/swapgs barriers and __user pointer sanitization   Spectre v2 :                              Mitigation; IBRS; IBPB conditional; RSB filling; PBRSB-eIBRS Not affected; BHI Not affected   Srbds :                                   Mitigation; Microcode   Tsx async abort :                         Not affected Do you have any suggestion? Thanks  

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1 year 8 months ago #321781 by NTULINUX
MTTI, some systems do not work on RTAI. I tried RTAI on my SO's laptop and it instantly kernel panicked each time.

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1 year 8 months ago #321784 by MTTI
Thanks for this answer.

I would like to install RTAI due to the jitter in my setup, which is around 70k.
I'm using 4 stepper motors with encoders (closed loop) and a USC board from PICO.

Sometimes, though not very often, I get an "Unexpected realtime delay" message.
Do you think this could be related to the jitter amount?

I've tried every optimization I could find in the BIOS...

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1 year 8 months ago #321792 by NTULINUX
Are you hitting 70K microseconds on RTAI or PREEMPT_RT?

Just in case, here are the options I've found to help:

github.com/NTULINUX/RTAI/blob/master/README.BIOS

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1 year 8 months ago #321798 by unknown

Thanks for this answer.

I would like to install RTAI due to the jitter in my setup, which is around 70k.
I'm using 4 stepper motors with encoders (closed loop) and a USC board from PICO.

Sometimes, though not very often, I get an "Unexpected realtime delay" message.
Do you think this could be related to the jitter amount?

I've tried every optimization I could find in the BIOS...
 
Just having a look at the PICO config, is the base thread used ? From a quick look nothing appears to attach to the base thread. Which would lead me to think that a simple RT_PREEMPT kernel would be suffice. The PICO board would seem to operate in a simialr way to a mesa 7i90 using the EPP protocol. IE using the parallel port to send timing info to a FPGA.

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1 year 8 months ago #321806 by MTTI

Are you hitting 70K microseconds on RTAI or PREEMPT_RT?

Just in case, here are the options I've found to help:

github.com/NTULINUX/RTAI/blob/master/README.BIOS
I only hit 70k jitter occasionally and only when the CPU usage is high, for example when running multiples GLXGEARS, playing HD videos on YouTube... Otherwise, my jitter stays around 50k.

I'm using PREEMPT_RT because RTAI doesn't work at all, even the latency test freezes the computer.

Thanks for the link, I already found it along with many others. 

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1 year 8 months ago #321808 by MTTI

Thanks for this answer.

I would like to install RTAI due to the jitter in my setup, which is around 70k.
I'm using 4 stepper motors with encoders (closed loop) and a USC board from PICO.

Sometimes, though not very often, I get an "Unexpected realtime delay" message.
Do you think this could be related to the jitter amount?

I've tried every optimization I could find in the BIOS...
 
Just having a look at the PICO config, is the base thread used ? From a quick look nothing appears to attach to the base thread. Which would lead me to think that a simple RT_PREEMPT kernel would be suffice. The PICO board would seem to operate in a simialr way to a mesa 7i90 using the EPP protocol. IE using the parallel port to send timing info to a FPGA.


 
You're right, into the HAL file, there is only mention of servo-thread:
Code:
# Generated by stepconf 1.1 at Tue Jan 28 10:21:07 2025 # Si vous modifiez ce fichier, il sera # écrasé quand vous relancerez Stepconf loadrt [KINS]KINEMATICS loadrt [EMCMOT]EMCMOT servo_period_nsec=[EMCMOT]SERVO_PERIOD num_joints=[KINS]JOINTS num_spindles=[TRAJ]SPINDLES # next load the PID module, for four PID loops loadrt pid num_chan=4 loadrt  plasmac loadrt hal_ppmc epp_dir=1  # make some signals for the scope for tuning. loadrt ddt count=4 # add components for E-stop logic loadrt estop_latch count=1 loadrt and2 count=1 # set up the realtime thread # read inputs first addf ppmc.0.read servo-thread # then run the motion controller addf motion-command-handler servo-thread addf and2.0 servo-thread addf estop-latch.0 servo-thread addf motion-controller servo-thread # then the PID loops addf pid.0.do-pid-calcs servo-thread addf pid.1.do-pid-calcs servo-thread addf pid.2.do-pid-calcs servo-thread addf pid.3.do-pid-calcs servo-thread # write outputs last addf ppmc.0.write servo-thread # ---PLASMA INPUT DEBOUNCE--- loadrt dbounce names=db_breakaway,db_float,db_ohmic,db_arc-ok addf db_float     servo-thread addf db_ohmic     servo-thread addf db_breakaway servo-thread addf db_arc-ok    servo-thread # ---JOINT ASSOCIATED WITH THE Z AXIS--- net plasmac:axis-position joint.2.pos-fb => plasmac.axis-z-position # ---PLASMA INPUTS--- # ---all modes--- net plasmac:float-switch   => db_float.in net plasmac:breakaway      => db_breakaway.in net plasmac:ohmic-probe    => db_ohmic.in net plasmac:ohmic-sense-in   => plasmac.ohmic-sense-in # ---modes 0 & 1 net plasmac:arc-voltage-in => plasmac.arc-voltage-in # ---modes 1 & 2 net plasmac:arc-ok-in      => db_arc-ok.in # ---mode 2 net plasmac:move-up        => plasmac.move-up net plasmac:move-down      => plasmac.move-down # ---PLASMA OUTPUTS--- # ---all modes--- net plasmac:ohmic-enable   <= plasmac.ohmic-enable net plasmac:scribe-arm     <= plasmac.scribe-arm net plasmac:scribe-on      <= plasmac.scribe-on # connect limit/home switch outputs to motion controller net Xminlim <= ppmc.0.din.01.in net Xminlim => joint.0.neg-lim-sw-in net Xmaxlim <= ppmc.0.din.02.in net Xmaxlim => joint.0.pos-lim-sw-in net Xhome <= ppmc.0.din.00.in net Xhome => joint.0.home-sw-in net Yminlim <= ppmc.0.din.05.in net Yminlim => joint.1.neg-lim-sw-in net Ymaxlim <= ppmc.0.din.06.in net Ymaxlim => joint.1.pos-lim-sw-in net Yhome <= ppmc.0.din.04.in net Yhome => joint.1.home-sw-in net Zminlim <= ppmc.0.din.09.in net Zminlim => joint.2.neg-lim-sw-in net Zmaxlim <= ppmc.0.din.10.in net Zmaxlim => joint.2.pos-lim-sw-in net Zhome <= ppmc.0.din.08.in net Zhome => joint.2.home-sw-in net Aminlim <= ppmc.0.din.12.in net Aminlim => joint.3.neg-lim-sw-in net Amaxlim <= ppmc.0.din.13.in net Amaxlim => joint.3.pos-lim-sw-in net Ahome <= ppmc.0.din.11.in net Ahome => joint.3.home-sw-in # connect index pulses to motion controller # uncomment these lines only if you have a Rev 2 USC board # newsig Xindex bit # newsig Yindex  bit # newsig Zindex bit # newsig Aindex bit # linksp Xindex <= ppmc.0.encoder.00.index-enable # linksp Xindex => joint.0.index-enable # linksp Yindex <= ppmc.0.encoder.01.index-enable # linksp Yindex => joint.1.index-enable # linksp Zindex <= ppmc.0.encoder.02.index-enable # linksp Zindex => joint.2.index-enable # linksp Aindex <= ppmc.0.encoder.03.index-enable # linksp Aindex => joint.3.index-enable # # Connect I/O controller I/Os # # connect e-stop write/sense to I/O controller # and univstep's fault with estop's output, so  estop FF is reset, but #      prevent continued estop signal from univstep from holding FF cleared net ppmcEstop ppmc.0.din.15.in-not net ppmcEstop and2.0.in0 net EstopOkIn estop-latch.0.fault-in net EstopOkIn and2.0.out net EstopOkOut <= ppmc.0.dout.07.out net EstopOkOut iocontrol.0.emc-enable-in net EstopOkOut estop-latch.0.ok-out net EstopOkOut and2.0.in1 net emc-estop-out iocontrol.0.user-enable-out net emc-estop-out estop-latch.0.ok-in net emc-estop-reset iocontrol.0.user-request-enable net emc-estop-reset estop-latch.0.reset net emc-estop-out estop-latch.0.ok-in  # connect spindle fwd/rev to I/O controller net SpindleFwd <= ppmc.0.dout.00.out net SpindleFwd => spindle.0.forward net SpindleRev <= ppmc.0.dout.01.out net SpindleRev => spindle.0.reverse # connect spindle brake to I/O controller net SpindleBrakeOn <= ppmc.0.dout.02.out net SpindleBrakeOn => spindle.0.brake # connect mist/flood coolant to I/O controller net MistOn <= ppmc.0.dout.03.out net MistOn => iocontrol.0.coolant-mist net FloodOn <= ppmc.0.dout.04.out net FloodOn => iocontrol.0.coolant-flood # connect position feedback signals to encoders net Xpos-fb <= ppmc.0.encoder.00.position net Ypos-fb <= ppmc.0.encoder.01.position net Zpos-fb <= ppmc.0.encoder.02.position net Apos-fb <= ppmc.0.encoder.03.position # get feedback scaling from ini file setp ppmc.0.encoder.00.scale [JOINT_0]INPUT_SCALE setp ppmc.0.encoder.01.scale [JOINT_1]INPUT_SCALE setp ppmc.0.encoder.02.scale [JOINT_2]INPUT_SCALE setp ppmc.0.encoder.03.scale [JOINT_3]INPUT_SCALE # connect PID output signals to step generators net Xoutput => ppmc.0.stepgen.00.velocity net Youtput => ppmc.0.stepgen.01.velocity net Zoutput => ppmc.0.stepgen.02.velocity net Aoutput => ppmc.0.stepgen.03.velocity # connect axis enables to step generators net Xenable => ppmc.0.stepgen.00.enable net Yenable => ppmc.0.stepgen.01.enable net Zenable => ppmc.0.stepgen.02.enable net Aenable => ppmc.0.stepgen.03.enable # set output scaling from ini file # input and output scales should (normally) be the same for a USC setp ppmc.0.stepgen.00.scale [JOINT_0]OUTPUT_SCALE setp ppmc.0.stepgen.01.scale [JOINT_1]OUTPUT_SCALE setp ppmc.0.stepgen.02.scale [JOINT_2]OUTPUT_SCALE setp ppmc.0.stepgen.03.scale [JOINT_3]OUTPUT_SCALE # add a couple of tuning test links # if these are useful will want to add them to the other axes as well # or make these setup with the tuning script # net Xoutput ddt.0.in # net Xpos-fb ddt.1.in # HAL config file for servos -- expanded from core_servo.hal # for a full four axis setup # create four position feedback signals # connect position feedback to PID loop net Xpos-fb => pid.0.feedback net Ypos-fb => pid.1.feedback net Zpos-fb => pid.2.feedback net Apos-fb => pid.3.feedback # connect position feedback to motion module net Xpos-fb => joint.0.motor-pos-fb net Ypos-fb => joint.1.motor-pos-fb net Zpos-fb => joint.2.motor-pos-fb net Apos-fb => joint.3.motor-pos-fb # create PID to DAC output signals # connect output signals to output of PID loops net Xoutput <= pid.0.output net Youtput <= pid.1.output net Zoutput <= pid.2.output net Aoutput <= pid.3.output # set PID loop output limits to +/-1.00 setp pid.0.maxoutput [JOINT_0]PID_MAX_VEL setp pid.1.maxoutput [JOINT_1]PID_MAX_VEL setp pid.2.maxoutput [JOINT_2]PID_MAX_VEL setp pid.3.maxoutput [JOINT_3]PID_MAX_VEL # set PID loop gains setp pid.0.Pgain [JOINT_0]P setp pid.0.Igain [JOINT_0]I setp pid.0.Dgain [JOINT_0]D setp pid.0.bias [JOINT_0]BIAS setp pid.0.FF0 [JOINT_0]FF0 setp pid.0.FF1 [JOINT_0]FF1 setp pid.0.FF2 [JOINT_0]FF2 setp pid.0.deadband [JOINT_0]DEADBAND setp pid.1.Pgain [JOINT_1]P setp pid.1.Igain [JOINT_1]I setp pid.1.Dgain [JOINT_1]D setp pid.1.bias [JOINT_1]BIAS setp pid.1.FF0 [JOINT_1]FF0 setp pid.1.FF1 [JOINT_1]FF1 setp pid.1.FF2 [JOINT_1]FF2 setp pid.1.deadband [JOINT_1]DEADBAND setp pid.2.Pgain [JOINT_2]P setp pid.2.Igain [JOINT_2]I setp pid.2.Dgain [JOINT_2]D setp pid.2.bias [JOINT_2]BIAS setp pid.2.FF0 [JOINT_2]FF0 setp pid.2.FF1 [JOINT_2]FF1 setp pid.2.FF2 [JOINT_2]FF2 setp pid.2.deadband [JOINT_2]DEADBAND setp pid.3.Pgain [JOINT_3]P setp pid.3.Igain [JOINT_3]I setp pid.3.Dgain [JOINT_3]D setp pid.3.bias [JOINT_3]BIAS setp pid.3.FF0 [JOINT_3]FF0 setp pid.3.FF1 [JOINT_3]FF1 setp pid.3.FF2 [JOINT_3]FF2 setp pid.3.deadband [JOINT_3]DEADBAND # create four position command signals # connect position commands to motion controller net Xpos-cmd <= joint.0.motor-pos-cmd net Ypos-cmd <= joint.1.motor-pos-cmd net Zpos-cmd <= joint.2.motor-pos-cmd net Apos-cmd <= joint.3.motor-pos-cmd # connect position commands to PID input net Xpos-cmd => pid.0.command net Ypos-cmd => pid.1.command net Zpos-cmd => pid.2.command net Apos-cmd => pid.3.command # create bit signals to enable/disable the PID loops # connect the signals to the motion controller net Xenable <= joint.0.amp-enable-out net Yenable <= joint.1.amp-enable-out net Zenable <= joint.2.amp-enable-out net Aenable <= joint.3.amp-enable-out # connect the signals to the PID blocks net Xenable => pid.0.enable net Yenable => pid.1.enable net Zenable => pid.2.enable net Aenable => pid.3.enable

But i'm not an expert in this type of configuration...

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