- Posts: 38
- Thank you received: 12
LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
1 year 10 months ago #316689
by kzali
Replied by kzali on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
What is the mod as marked in the attached photo?
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1 year 10 months ago #316694
by meister
Replied by meister on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
what exactly do you mean?What happened with enable and error hardware implementation in riocore?
The following user(s) said Thank You: Zayoo
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1 year 10 months ago #316695
by meister
Replied by meister on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
it lowers the voltage of the level shifters on the FPGA side to cope with the 1.8V on certain ports, is fixed in the current git for the boardWhat is the mod as marked in the attached photo?
The following user(s) said Thank You: kzali
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1 year 10 months ago #316705
by Zayoo
Replied by Zayoo on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
In old RIO there was error and enable pins that could be enable in configuration file.
In case of some error, lost communication with LinuxCNC or similar there need to be some pin on board that will indicate such event.
Thanks
Code:
"enable": {
"invert": true,
"pin": "69"
},
In case of some error, lost communication with LinuxCNC or similar there need to be some pin on board that will indicate such event.
Thanks
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1 year 10 months ago #316728
by meister
Replied by meister on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
now we have modifier's for all pin's:
seems more complicated at first glance, but is much more flexible
Code:
"enable": {
"name": "enable",
"type": "bitout",
"pins": {
"bit": {
"modifier": [
{
"type": "onerror",
"invert": false
}
]
}
}
}
The following user(s) said Thank You: Zayoo
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1 year 10 months ago #316736
by MirkoCNC
Replied by MirkoCNC on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
@meister
Tangbob board:
What is the reason to add the 10k resistors as pull-down or pull-up resistor?
The FPGA is not configured as open-drain or open-source output.
The standard output configuration of the FPGA would not need the resistors.
Correct?
I would like to leave them out, but the cannot be added later when the FPGA has been soldered. That's why I am asking.
Tangbob board:
What is the reason to add the 10k resistors as pull-down or pull-up resistor?
The FPGA is not configured as open-drain or open-source output.
The standard output configuration of the FPGA would not need the resistors.
Correct?
I would like to leave them out, but the cannot be added later when the FPGA has been soldered. That's why I am asking.
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