Our initialization script does the programming from the command line:

efx_run.py seveni95t.xml --flow program --pgm_opts mode=jtag

Pretty sure use this uses a .hex or .bit file (in the outflow directory)
 

the pin names in your XML are what are used in hal. Yours are completely different so it won't work. Bring them into line. 

Yes, I'm using 2.9.8 from 2.9.4 iso image,

there is a line.

raspi-firmware: missing /boot/firmware, did you forget to mout it ?
...　z50-raspi-firmware exited with return code 1



I'm not using raspberry pi, but N150 PC

What should I do ?

I do not think that I was able to program the FPGA.

I am stuck where programmer says "Device is in user mode!"

I do not know what is the next step

Did you manage to program the FPGA via JTAG?

This would be shown by the green LEDs flashing in sequence
and the link and speed LEDs lighting up on the 7I95T's RJ-45
jack.

Efinity software reported an error. After reviewing my wiring, I was able to make progress.

I can now connect via JTAG using the Efinity Programmer tool. When I click Start Program, it appears to detect the board, and I receive the message “Device is in user mode.”

At this point, I’m not sure what the next step should be.

I have jumpers W15 and W16 set to UP,UP position so I can attempt an Ethernet connection to 192.168.1.121 However, when I run the following command:

mesaflash --device Ethernet --addr 192.168.1.121 --verbose

No ETHERNET board found

Not sure, sounds like the PWM is not setup properly

Can you run your test (where you expect 1V)

and in a terminal type

halcmd show all | grep pwm > pwm.txt

and post pwm.txt here



 

Yes
The multimeter gave a jump to 0.5 volt in a glimpse . I don’t know for how long since the meter was set to store highest

I just tried to repeat the test.
This time the 0 was dead 0

Could it have any impact on the result that I also had the 24 v on the enable pin at the same time in the first test?

I should mention I show how to build for RIP but you can keep with the Debian way and build the debs and install with sudo dpkg -i on the folder above where you are.

I have done a video on this. There is a bookmark for cloning and compiling.
Master branch build process has been updated but I think there is a typo in the docs. Now getting dependencies is done the debian way with a single command line. This is an amazing improvement

So I reverted to Dominic's original component cia402.comp based on feedback here so I could get back to basics
Now I have learnt/refreshed my knowledge about ethercat, I used halshow to list all of the lcec pins and noticed the familiar value of 561 but it was on the wrong pin. Checking the XML, I had included a torque pin but there is no PDO or SDO for it (I had tested this earlier with raw ethercat command line commands). So I deleted the entry in my xml. Everything is now mapped correctly. But only Drive/Joint 0 works correctly. lcec and cia402 follow each other but motion only happens on X (Joint/Drive 0)
Joint position/fb follow lcec and cia402 when jogging but for some reason the 3 higher drives don't move.

I've attached the revised XML and my CIA402 hal and ini files. I don't tthink I have mapped anything incorrectly in hal

Tomorrow I'll do a new axis configuration to test and compare the hal and ini files again. Would my hal file be correct for normal operation?

Yeah, if you just used the seveni90 project you will get a EPP configuration.
if you used the seveni90spi project you will get a SPI configuration and if you used
the seveni90ssrm project you will get a SSerial configuration.
(There is one more 7I90 option: hm2serial)


So unless you made some build error its likely you have loaded EPP configurations

The best way out is probably to get  JTAG programmer, program the FPGA with a working
bitfile with the desired interface and then use mesaflash to restore the EEPROM contents