the only line i can see you have differently to mine is
net z-pos-fb <= hm2_7i43.0.resolver.01.position => pid.1.feedback
i.e linking the feedback ...
building the fpga source is not for the faint hearted , although i'm not ruling out the bit file , the 7i43-4 version i posted is from a working system
i'll check the latest resolver build into my scripts and see how that builds
unfortunatly , i dont have a resolver to hand to test localy .
iv'e posted here the working files just in case you can spot a typo or something similar
i'm wondering if you have too much voltage swing across the resolver and it's swamping the input to the mesa card ..
i'll bow to PCW having the answer on this one ..
i notice your showing a resolver scale of 4000 , this is to me a bit on the low side , as you can see in my files their a lot higher
have you details on the resolvers you have