final stages of custom firmware for 5i20 card

basdebruijn
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22 Aug 2014 06:03 #50166 by basdebruijn

final stages of custom firmware for 5i20 card was created by basdebruijn

Hi,

I recently had good help from Andy regarding compiling firmware for my mesa 5i20 card that I have had in the wrapper for almost 5 years. Time to use it at last. I'm nearly there but I've got 2 (at least for now) questions:

I want to run stepper motors and do a serial readout of a ADC component. For this I have added the BSPI module.

next to some nudges of Andy I have followed these posts on a similar subject
linuxcnc.org/lucid/index.php/english/for...esa-5i20--7i48--7i44
linuxcnc.org/lucid/index.php/english/for...irmware?limitstart=0

So far I have installed Xilinx ISE web pack 9.2 and made my custom PIN file.
The "run" with RMB on "Generate Programming File" in the left pane yields a green checked "Programming File Generation Report". Some warnings get generated. No errors though.

First Question:
Reading the linked posts I understand that now a "Top9030HostMot2.bit" file is generated. Do I need to do additional steps for generating a "my firmware.bit" file, or can I just rename the .bit file?

Second question:
in the PIN file I have added:

package PIN_WL_72 is
	constant ModuleID : ModuleIDType :=(
		(WatchDogTag,	x"00",	ClockLowTag,	x"01",	WatchDogTimeAddr&PadT,	WatchDogNumRegs,	x"00",	WatchDogMPBitMask),
		(IOPortTag,	x"00",	ClockLowTag,	x"03",	PortAddr&PadT,		IOPortNumRegs,		x"00",	IOPortMPBitMask),
		(StepGenTag,	x"02",	ClockLowTag,	x"08",	StepGenRateAddr&PadT,	StepGenNumRegs,		x"00",	StepGenMPBitMask),
		(BSPITag,	x"00",	ClockLowTag,	x"01",	BSPIDataAddr&PadT,	BSPINumRegs,		x"11",	BSPIMPBitMask),
		(PWMTag,	x"00",	ClockHighTag,	x"03",	PWMValAddr&PadT,	PWMNumRegs,		x"00",	PWMMPBitMask),
		(LEDTag,	x"00",	ClockLowTag,	x"01",	LEDAddr&PadT,		LEDNumRegs,		x"00",	LEDMPBitMask),

I understand the x”0..” after ClockLowTag, thats the number of instances.
What do the first x”0..” and the last one mean? in other words, Should I knowingly modify these?

Thanks in advance,
Bas

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PCW
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22 Aug 2014 07:10 #50169 by PCW

Replied by PCW on topic final stages of custom firmware for 5i20 card

1. Just copy/rename the bit file

2. The IDROMConst.vhd file has some info on the constant records

The number immediately after the tag is the module revision
and the one after the numregs constant is the strides constant
(which should probably be a named constant also)

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basdebruijn
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22 Aug 2014 16:00 #50177 by basdebruijn

Replied by basdebruijn on topic final stages of custom firmware for 5i20 card

Thanks!

now should I make the .xml file or is this only mandatory for pncconf?

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cncbasher
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22 Aug 2014 22:11 #50190 by cncbasher

Replied by cncbasher on topic final stages of custom firmware for 5i20 card

Bas,

I would make the xml , although it is only used for pncconf , some time it can be useful for checking
i'm interested in a serial or i2c input also , so let me know how you get on , i'll try it with a 7i48 and a 5i25

you only need xilinx 9.2 for the 5i20 all the other you can use higher versions
are you compiling under linux or windows ?

Dave

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PCW
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22 Aug 2014 22:52 #50191 by PCW

Replied by PCW on topic final stages of custom firmware for 5i20 card

Note that the latest version of mesaflash can make .pin files for documentation purposes:

sudo mesaflash --device 5i20 --readhmid > yourconfig.pin

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basdebruijn
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22 Aug 2014 22:57 #50192 by basdebruijn

Replied by basdebruijn on topic final stages of custom firmware for 5i20 card

yes, I would thinks so. I deduct it's manually done, and seems doable.
I compiled on windows7 and copied the .bit and the PIN file so I have the names and locations nearby to make the .xml file.

I'm planning on reading an ADC converter for readout of a thermistor. No high speed needed, 10Hz can be fast enough.

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basdebruijn
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22 Aug 2014 23:04 #50193 by basdebruijn

Replied by basdebruijn on topic final stages of custom firmware for 5i20 card

PCW wrote:
Note that the latest version of mesaflash can make .pin files for documentation purposes:

sudo mesaflash --device 5i20 --readhmid > yourconfig.pin

Thanks

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basdebruijn
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23 Aug 2014 06:01 #50197 by basdebruijn

Replied by basdebruijn on topic final stages of custom firmware for 5i20 card

Hi PCW and cncbasher,

The firmware I compiled works without problems (loading it, because I need to do the electrical wiring yet)

I used this in the ini:

CONFIG="firmware=hm2/5i20/WL_72.bit num_pwmgens=-1 num_stepgens=-1 num_bspis=-1"

from the log:

Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2: loading Mesa HostMot2 driver version 0.15
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2_pci: loading Mesa AnyIO HostMot2 driver version 0.7
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2_pci: discovered 5i20 at 0000:01:09.0
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0: 72 I/O Pins used:
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 000 (P2-01): StepGen #0, pin Step (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 001 (P2-03): StepGen #0, pin Direction (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 002 (P2-05): StepGen #1, pin Step (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 003 (P2-07): StepGen #1, pin Direction (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 004 (P2-09): StepGen #2, pin Step (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 005 (P2-11): StepGen #2, pin Direction (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 006 (P2-13): StepGen #3, pin Step (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 007 (P2-15): StepGen #3, pin Direction (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 008 (P2-17): StepGen #4, pin Step (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 009 (P2-19): StepGen #4, pin Direction (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 010 (P2-21): StepGen #5, pin Step (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 011 (P2-23): StepGen #5, pin Direction (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 012 (P2-25): StepGen #6, pin Step (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 013 (P2-27): StepGen #6, pin Direction (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 014 (P2-29): StepGen #7, pin Step (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 015 (P2-31): StepGen #7, pin Direction (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 016 (P2-33): PWMGen #0, pin Out0 (PWM or Up) (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 017 (P2-35): PWMGen #0, pin Out1 (Dir or Down) (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 018 (P2-37): PWMGen #1, pin Out0 (PWM or Up) (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 019 (P2-39): PWMGen #1, pin Out1 (Dir or Down) (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 020 (P2-41): PWMGen #2, pin Out0 (PWM or Up) (Output)
Aug 22 23:05:39 debianXW6600 msgd:0: hal_lib:22496:rt hm2/hm2_5i20.0:     IO Pin 021 (P2-43): PWMGen #2, pin Out1 (Dir or Down)

the bspi doesn't make HAL pins as I understood, so I can't see them in the linuxcnc.log.

I need to add the mesa_7i65 component ad a quick way of seeing in the log if the bspi channels are made. That should be visible in the log. work in progress.

Thanks for the help so far.
Regards,
Bas

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basdebruijn
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23 Aug 2014 20:30 #50206 by basdebruijn

Replied by basdebruijn on topic final stages of custom firmware for 5i20 card

After struggling to get a component installed (it was pretty late so I made stupid mistakes like forgetting rip-environment

) i have moderate success. part of the linuxcnc.log

Aug 23 15:19:14 debianXW6600 msgd:0: hal_lib:5723:rt hm2/hm2_5i20.0:     IO Pin 048 (P4-01): Buffered SPI Interface #0, pin /Frame (Output)
Aug 23 15:19:14 debianXW6600 msgd:0: hal_lib:5723:rt hm2/hm2_5i20.0:     IO Pin 049 (P4-03): Buffered SPI Interface #0, pin Serial Out (Output)
Aug 23 15:19:14 debianXW6600 msgd:0: hal_lib:5723:rt hm2/hm2_5i20.0:     IO Pin 050 (P4-05): Buffered SPI Interface #0, pin Clock (Output)
Aug 23 15:19:14 debianXW6600 msgd:0: hal_lib:5723:rt hm2/hm2_5i20.0:     IO Pin 051 (P4-07): Buffered SPI Interface #0, pin Serial In (Input)
Aug 23 15:19:14 debianXW6600 msgd:0: hal_lib:5723:rt hm2/hm2_5i20.0:     IO Pin 052 (P4-09): Buffered SPI Interface #0, pin CS2 (Output)
Aug 23 15:19:14 debianXW6600 msgd:0: hal_lib:5723:rt hm2/hm2_5i20.0:     IO Pin 053 (P4-11): Buffered SPI Interface #0, pin CS1 (Output)
Aug 23 15:19:14 debianXW6600 msgd:0: hal_lib:5723:rt hm2/hm2_5i20.0:     IO Pin 054 (P4-13): Buffered SPI Interface #0, pin CS0 (Output)

Thanks again,
Bas

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PCW
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23 Aug 2014 22:17 #50209 by PCW

Replied by PCW on topic final stages of custom firmware for 5i20 card

note this recent 7I65 patch:
psha.org.ru/irc/%23emc-devel/2014-05-09.html#16:36:29

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