Is P2 port on 75i25 board a parallel port

My mesa 5i25 board continues to randomly shutdown. Best I can figure it is probably a latency problem on the base thread. Have tried to address problem by reducing base thread latency but unsuccessful.

The only reason I have a base thread is to run stepper motor on fourth axis. I been told I could drive the stepper motor using the P2 port on the 5i25 and parallel port breakout board and get rid of base thread which may fix problem. I think I can do this by only changing some cables.

Fourth axis is driven using a sherline stepper driver box www.sherlinedirect.com/index.cfm?fuseact...ID=122248216&CFTOKEN
from current PC parallel port.


portion of hal file commands for sherline box thru parallel port are :

# first load the parport driver
loadrt hal_parport cfg="0x0378"
#
# next connect the parport functions to threads
# read inputs first
addf parport.0.read base-thread 1
# write outputs last
addf parport.0.write base-thread -1
#
# finally connect physical pins to the signals
net Astep parport.0.pin-09-out
net Adir parport.0.pin-08-out

Can I plug sherline box parallel cable, using adapter, into P2 port and then change code to look at P2 port instead of 0x0378 and will P2 port act like parallel port and work the fourth axis? If yes. Can I then delete base thread and if so, what do I do with the two addf parport commands in hal file?

You can use P2 like a parallel port (using it as GPIO only), but If you wish to eliminate
the base thread, you must use the hardware step generators in the 5i25

This means you must use firmware that supports your main daughtercard (on P3) _and_
has a Sherline compatible pinout on P2. Do you have the Sherline full pinout?

would that be the file you are talking about?

Yes (if that is a Sherline config) that gives me the parallel port pinout which make it possible to make matching firmware:

freeby.mesanet.com/5i25_7i77_Sher.bit

I tried to write the bit file and mesaflash said the bootsector is invalid.

The 7i77 should be exactly like it came from jt. I not even had mesaflash loaded until today. after sherline bit file would not write, I did the following.
shop@vertmill ~ $ sudo mesaflash --device 5i25 --readhmid
[sudo] password for shop:
Configuration Name: HOSTMOT2

General configuration information:

BoardName : MESA5I25
FPGA Size: 9 KGates
FPGA Pins: 144
Number of IO Ports: 2
Width of one I/O port: 17
Clock Low frequency: 33.3333 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256

Modules in configuration:

Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: IOPort
There are 2 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: MuxedQCount
There are 12 of MuxedQCount in configuration
Version: 3
Registers: 5
BaseAddress: 3600
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: MuxedQCountSel
There are 1 of MuxedQCountSel in configuration
Version: 0
Registers: 0
BaseAddress: 0000
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: SSerial
There are 1 of SSerial in configuration
Version: 0
Registers: 6
BaseAddress: 5B00
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 64 bytes

Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for P3
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

1 0 IOPort SSerial 0 TXEn3 (Out)
14 1 IOPort SSerial 0 TXData3 (Out)
2 2 IOPort SSerial 0 RXData3 (In)
15 3 IOPort SSerial 0 TXData2 (Out)
3 4 IOPort SSerial 0 RXData2 (In)
16 5 IOPort SSerial 0 TXData1 (Out)
4 6 IOPort SSerial 0 RXData1 (In)
17 7 IOPort MuxedQCountSel 0 MuxSel0 (Out)
5 8 IOPort MuxedQCount 0 MuxQ-A (In)
6 9 IOPort MuxedQCount 0 MuxQ-B (In)
7 10 IOPort MuxedQCount 0 MuxQ-IDX (In)
8 11 IOPort MuxedQCount 1 MuxQ-A (In)
9 12 IOPort MuxedQCount 1 MuxQ-B (In)
10 13 IOPort MuxedQCount 1 MuxQ-IDX (In)
11 14 IOPort MuxedQCount 2 MuxQ-A (In)
12 15 IOPort MuxedQCount 2 MuxQ-B (In)
13 16 IOPort MuxedQCount 2 MuxQ-IDX (In)

IO Connections for P2
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

1 17 IOPort SSerial 0 TXEn6 (Out)
14 18 IOPort SSerial 0 TXData6 (Out)
2 19 IOPort SSerial 0 RXData6 (In)
15 20 IOPort SSerial 0 TXData5 (Out)
3 21 IOPort SSerial 0 RXData5 (In)
16 22 IOPort SSerial 0 TXData4 (Out)
4 23 IOPort SSerial 0 RXData4 (In)
17 24 IOPort MuxedQCountSel 6 MuxSel0 (Out)
5 25 IOPort MuxedQCount 3 MuxQ-A (In)
6 26 IOPort MuxedQCount 3 MuxQ-B (In)
7 27 IOPort MuxedQCount 3 MuxQ-IDX (In)
8 28 IOPort MuxedQCount 4 MuxQ-A (In)
9 29 IOPort MuxedQCount 4 MuxQ-B (In)
10 30 IOPort MuxedQCount 4 MuxQ-IDX (In)
11 31 IOPort MuxedQCount 5 MuxQ-A (In)
12 32 IOPort MuxedQCount 5 MuxQ-B (In)
13 33 IOPort MuxedQCount 5 MuxQ-IDX (In)

shop@vertmill ~ $ sudo mesaflash --device 5i25 --verify 5i25_7i77x2.bit
Checking file... OK
File type: BIT file
Error: BootSector is invalid

readhmid looks to work, but I could not even verify 5i25_7i77x2.bit which is how the card was to be loaded. Can someone explain this bootsector is invalid thing?

What OS are you using? There is a bug with some mesaflash versions on 64 bit systems

If you are running on a 64 bit system, I would try fetching and building the latest
mesaflash version which I think fixes the 64 bit issue:

github.com/micges/mesaflash

Yes I am on 64 bit. I will give it a try.

Once the 5i25 is flashed, does it matter whether it is in a 32 or 64 machine? If I can not get a 64 bit mesaflash to work, can I put the board in a 32 bit system, flash it, and then move it back to the 64 system?