Mesa 7i43 (2port parallel) 400K with bitfile SVST2_4_7i47 using PnCConf

mane
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27 Feb 2019 16:17 #127257 by mane

Mesa 7i43 (2port parallel) 400K with bitfile SVST2_4_7i47 using PnCConf was created by mane

Hi,
i ordered a 7i43 card and want to use the pin file SVST2_4_7i47 because it fits best to my project.
Found some information here.
linuxcnc.org/docs/2.6/html/drivers/hostmot2.html

My system:
LinuxCNC/AXIS version 2.7.14
Linux linuxcnc 3.4-9-rtai-686-pae #1 SMP PREEMPT Debian 3.4.55-4linuxcnc i686 GNU/Linux

For testing purposes i used SVST4_4 to see if my card is working. And it is working.
In PnCConf is no SVST2_4_7i47 selectable. I downloaded 7i43.zip file from mesa.
Used the bit file "SVST2_4_7I47S.BIT" and copied it to /lib/firmware/hm2/7i43-4/
Copied the pin file "SVST2_4_7I47.PIN" to /usr/share/doc/hostmot2-firmware-7i43-4
But the file is not selectable in PnCConf.

Is this the right bit file (4Encoder/2PWM/4StepGen/24GIPO) as discribed in the documentation above?
And what do i have to do to make this file selectable in PnCConf?

Many thanks
Manfred

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pl7i92
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27 Feb 2019 16:32 #127259 by pl7i92

Replied by pl7i92 on topic Mesa 7i43 (2port parallel) 400K with bitfile SVST2_4_7i47 using PnCConf

loading the 7i43 with a 7i47 Bitfile is not in general a good idee as it is not build for this

pncconf does not automatic get the Bit and Pinfile
PLEASE ask cmorney if he got it inside
it is under constand Development

you can also ask in the Live Chatroom on IRC

PCW will help you Calafornia Timezone

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andypugh
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27 Feb 2019 16:47 #127264 by andypugh

Replied by andypugh on topic Mesa 7i43 (2port parallel) 400K with bitfile SVST2_4_7i47 using PnCConf

pl7i92 wrote:
loading the 7i43 with a 7i47 Bitfile is not in general a good idee as it is not build for this

The 7i47 is just a 50-pin daughter card. There is no reason that it wouldn't work perfectly well with the 7i43.

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PCW
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27 Feb 2019 18:22 - 27 Feb 2019 18:22 #127278 by PCW

Replied by PCW on topic Mesa 7i43 (2port parallel) 400K with bitfile SVST2_4_7i47 using PnCConf

I dont think pncconf supports that configuration but you can use pncconf to create a working
hal/ini file set for a similar configuration (say SVST4_4) and edit the hal file to make any 7I47 specific changes.

Note that since stepgens, pwmgens, and encoder hardware is accessed in hal by number, not pin, there is very little difference in configurations for different daughtercards that have have basic stepgens, encoders, pwmgens etc

Last edit: 27 Feb 2019 18:22 by PCW.

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mane
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27 Feb 2019 20:33 - 27 Feb 2019 20:35 #127288 by mane

Replied by mane on topic Mesa 7i43 (2port parallel) 400K with bitfile SVST2_4_7i47 using PnCConf

PCW wrote:
I dont think pncconf supports that configuration but you can use pncconf to create a working
hal/ini file set for a similar configuration (say SVST4_4) and edit the hal file to make any 7I47 specific changes.

Note that since stepgens, pwmgens, and encoder hardware is accessed in hal by number, not pin, there is very little difference in configurations for different daughtercards that have have basic stepgens, encoders, pwmgens etc

I don´t really understand, sorry.
Let´s say i use SVST4_4 configuration and use only 1Encoder, 1PWM, 4StepGen. Will this result in some GPIO?

Last edit: 27 Feb 2019 20:35 by mane. Reason: corretion done

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PCW
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27 Feb 2019 21:05 - 27 Feb 2019 21:07 #127294 by PCW

Replied by PCW on topic Mesa 7i43 (2port parallel) 400K with bitfile SVST2_4_7i47 using PnCConf

The hal setup for the stepgens and PWMs and encoders would be the same for any Mesa
FPGA card or firmware. The only difference would be any GPIO pins used as plain GPIO,
or inversion of PWM/Stepgen pins referenced by GPIO pin number (and the base FPGA card name)

That is if you just have 1 PWM generator, its always going to be referred to as PWM 0
in the hal file not by the pins its connected to.
Likewise, if you have 4 Stepgens, they will be accessed in hal as stepgen 0 to stepgen 3

Last edit: 27 Feb 2019 21:07 by PCW.

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mane
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28 Feb 2019 20:06 #127352 by mane

Replied by mane on topic Mesa 7i43 (2port parallel) 400K with bitfile SVST2_4_7i47 using PnCConf

Today i tried to make a very basic configuration with PnCConf.
Used SVST4_4 bitfile and created only 3 step generators. On the tabs for IO connector 3 and 4 i have now many unused inputs.
After starting my configuration i listed the pinout with

sudo mesaflash --device 7i43 --epp --addr 0x378 --readhmid

But the pins are not as expected. There are PWM, Encoder but no GIPO.

manfred@linuxcnc:~$ sudo mesaflash --device 7i43 --epp --addr 0x378 --readhmid
Configuration Name: HOSTMOT2

General configuration information:

  BoardName : MESA7I43
  FPGA Size: 400 KGates
  FPGA Pins: 144
  Number of IO Ports: 2
  Width of one I/O port: 24
  Clock Low frequency: 50.0000 MHz
  Clock High frequency: 100.0000 MHz
  IDROM Type: 3
  Instance Stride 0: 4
  Instance Stride 1: 64
  Register Stride 0: 256
  Register Stride 1: 256

Modules in configuration:

  Module: WatchDog
  There are 1 of WatchDog in configuration
  Version: 0
  Registers: 3
  BaseAddress: 0C00
  ClockFrequency: 50.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: IOPort
  There are 2 of IOPort in configuration
  Version: 0
  Registers: 5
  BaseAddress: 1000
  ClockFrequency: 50.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: QCount
  There are 4 of QCount in configuration
  Version: 2
  Registers: 5
  BaseAddress: 3000
  ClockFrequency: 50.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: PWM
  There are 4 of PWM in configuration
  Version: 0
  Registers: 5
  BaseAddress: 4000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: StepGen
  There are 4 of StepGen in configuration
  Version: 2
  Registers: 10
  BaseAddress: 2000
  ClockFrequency: 50.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: AddrX
  There are 1 of AddrX in configuration
  Version: 0
  Registers: 4
  BaseAddress: 7800
  ClockFrequency: 50.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: LED
  There are 1 of LED in configuration
  Version: 0
  Registers: 1
  BaseAddress: 0200
  ClockFrequency: 50.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for P4
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1      0   IOPort       QCount           1        Quad-B          (In)
 3      1   IOPort       QCount           1        Quad-A          (In)
 5      2   IOPort       QCount           0        Quad-B          (In)
 7      3   IOPort       QCount           0        Quad-A          (In)
 9      4   IOPort       QCount           1        Quad-IDX        (In)
11      5   IOPort       QCount           0        Quad-IDX        (In)
13      6   IOPort       PWM              1        PWM             (Out)
15      7   IOPort       PWM              0        PWM             (Out)
17      8   IOPort       PWM              1        Dir             (Out)
19      9   IOPort       PWM              0        Dir             (Out)
21     10   IOPort       PWM              1        /Enable         (Out)
23     11   IOPort       PWM              0        /Enable         (Out)
25     12   IOPort       QCount           3        Quad-B          (In)
27     13   IOPort       QCount           3        Quad-A          (In)
29     14   IOPort       QCount           2        Quad-B          (In)
31     15   IOPort       QCount           2        Quad-A          (In)
33     16   IOPort       QCount           3        Quad-IDX        (In)
35     17   IOPort       QCount           2        Quad-IDX        (In)
37     18   IOPort       PWM              3        PWM             (Out)
39     19   IOPort       PWM              2        PWM             (Out)
41     20   IOPort       PWM              3        Dir             (Out)
43     21   IOPort       PWM              2        Dir             (Out)
45     22   IOPort       PWM              3        /Enable         (Out)
47     23   (unknown-gtag)     (unknown-gtag)     Global    Unknown         (Out)

IO Connections for P3
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1     24   IOPort       StepGen          0        Step/Table1     (Out)
 3     25   IOPort       StepGen          0        Dir/Table2      (Out)
 5     26   IOPort       StepGen          0        Table3          (Out)
 7     27   IOPort       StepGen          0        Table4          (Out)
 9     28   IOPort       StepGen          0        Table5          (Out)
11     29   IOPort       StepGen          0        Table6          (Out)
13     30   IOPort       StepGen          1        Step/Table1     (Out)
15     31   IOPort       StepGen          1        Dir/Table2      (Out)
17     32   IOPort       StepGen          1        Table3          (Out)
19     33   IOPort       StepGen          1        Table4          (Out)
21     34   IOPort       StepGen          1        Table5          (Out)
23     35   IOPort       StepGen          1        Table6          (Out)
25     36   IOPort       StepGen          2        Step/Table1     (Out)
27     37   IOPort       StepGen          2        Dir/Table2      (Out)
29     38   IOPort       StepGen          2        Table3          (Out)
31     39   IOPort       StepGen          2        Table4          (Out)
33     40   IOPort       StepGen          2        Table5          (Out)
35     41   IOPort       StepGen          2        Table6          (Out)
37     42   IOPort       StepGen          3        Step/Table1     (Out)
39     43   IOPort       StepGen          3        Dir/Table2      (Out)
41     44   IOPort       StepGen          3        Table3          (Out)
43     45   IOPort       StepGen          3        Table4          (Out)
45     46   (unknown-gtag)     (unknown-gtag)     Global    Unknown         (Out)
47     47   IOPort       StepGen          3        Table6          (Out)

File Attachment:

File Name: 7i43.hal
File Size:10 KB

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PCW
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28 Feb 2019 20:15 - 28 Feb 2019 20:22 #127354 by PCW

Replied by PCW on topic Mesa 7i43 (2port parallel) 400K with bitfile SVST2_4_7i47 using PnCConf

That's expected, notice the first column ( Pri. func ) in mesaflashes pin list? ( IOPort )
All pins are available as GPIO if they are not claimed by an _enabled_ secondary function (Sec. func)

Edit
Also you should not run mesaflash when LinuxCNC is running ( notice the bad data on GPIO23?, this is likely due to a access collision )
To check available hardware pins, run

halcmd show pin hm2*
or
for gpio:
halcmd show pin *gpio*

Last edit: 28 Feb 2019 20:22 by PCW.

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andypugh
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28 Feb 2019 20:24 #127356 by andypugh

Replied by andypugh on topic Mesa 7i43 (2port parallel) 400K with bitfile SVST2_4_7i47 using PnCConf

mane wrote:
Today i tried to make a very basic configuration with PnCConf.
Used SVST4_4 bitfile and created only 3 step generators. On the tabs for IO connector 3 and 4 i have now many unused inputs.
After starting my configuration i listed the pinout with
sudo mesaflash --device 7i43 --epp --addr 0x378 --readhmid

Mesaflash lists the firmware pinout, not the pinout that is active in your configuration.

If you start LinuxCNC from the command line you should get the actual pinout that your config is using listed on the screen.

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mane
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01 Mar 2019 16:44 #127439 by mane

Replied by mane on topic Mesa 7i43 (2port parallel) 400K with bitfile SVST2_4_7i47 using PnCConf

andypugh wrote:
Mesaflash lists the firmware pinout, not the pinout that is active in your configuration.

If you start LinuxCNC from the command line you should get the actual pinout that your config is using listed on the screen.

Tried to start from command line, but nothing listed on the screen.

manfred@linuxcnc:~/linuxcnc/configs/7i43$ linuxcnc 7i43.ini
LINUXCNC - 2.7.14
Machine configuration directory is '/home/manfred/linuxcnc/configs/7i43'
Machine configuration file is '7i43.ini'
Running HAL shutdown script
Starting LinuxCNC...
.
Found file(REL): ./7i43.hal
Found file(REL): ./custom.hal

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Mesa 7i43 (2port parallel) 400K with bitfile SVST2_4_7i47 using PnCConf

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