SSerial hardware implementation?

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06 Jul 2019 00:42 #138714 by blazini36
I'm working on a daughtercard for a DE10-Nano, sort of a side project to get my machine running on MK to see how that goes. They've got hm2 running on the FPGA dev boards. Anyway, I've got 2 FPGA pins leftover and SSerial is the one useful thing I haven't implemented yet. Most of the example .vhd's I see only use the module's TX and RX pins, but I do see an enable pin in the module.

I'm not too upto snuff on serial communication or putting it on a board but I figured this would be the best place to ask for obvious reasons. Looks like the Mesa boards use differential signalling so I'm looking to use a chip like the LTC491 differential transceiver. Question is, can I just pull the receiver enable pin low and the driver enable pin high to keep the RX and TX lines open or is this a no-no? Looks like these would be for the CTS/RTS pins for flow control. Not sure I can spare FPGA pins to control enables or whether it matters or not. Just looking for the ability to talk to an 8i20 or simillar.

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06 Jul 2019 02:42 #138720 by PCW
Sserial is normally straight point to point RS-422 so the enable is not needed (just TX and RX)

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08 Jul 2019 01:26 #138830 by blazini36
Thanks PCW, that's what I figured.

I'm sort of learning this as I go so another question that pops up in my head is if the hm2 transmit enable were used with a chip that had a driver enable, would that technically make it RS485? 8i20's have jumpers for the bus termination resistors so would it be possible to run several of them on the same channel and just terminate the last? Would that work?

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08 Jul 2019 02:28 #138834 by PCW
No, the 8I20 firmware does not support multi drop
After initial experimentation we dropped all multi drop RS-485 support for high
speed links as they too succeptible to noise issues (its OK for slow links with lots
of digital filtering)

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16 Jul 2019 00:04 - 16 Jul 2019 00:06 #139518 by blazini36
I'm just going to settle on RS422, I can only dedicate to one device but then I was thinking that my stepgens are a differential line driver and my encoder inputs are differential recievers. I figured as a test I could repurpose a channel of each to an Rx and Tx channel for SSerial. I just swapped an in an rx and tx channel in the vhd and recompiled, then added the sserial_port_0x00xx line in my test hal file. then made a funny cable with a 120R resistor in each line. Unfortunately I wasn't able to get it to see my 8i20.

I'm sure you're not all that familiar with what MK's doing with HM2 but assuming it's not an issue with the implementation is there any simple way to test if sserial is actually working? Like setting up a serial console or something?
Last edit: 16 Jul 2019 00:06 by blazini36.

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16 Jul 2019 00:11 - 16 Jul 2019 00:12 #139520 by PCW
Well if you make a mistake with FPGA side RX/TX, remote side RX/TX and polarity of RX and TX,
you have only 1/16 of a chance of getting it right the first time...
Last edit: 16 Jul 2019 00:12 by PCW.

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16 Jul 2019 03:08 #139536 by blazini36
It's wired to match the 7i76e manual on the board side and the RJ45 connector is crimped as "B". It's not the ideal setup but I double checked the connections and it's still not autodetecting the 8i20. The firmware is based on the 5i25 with whatever MK magic is going on in there. Probably best I wait till I get the dedicated serial channel in there, just not sure how I can check whether it's working hardware wise vs a config mistake.

As is the differential encoder inputs count fine and the stepgens control stepper drivers with no issue, so I suppose I'd lean toward a config problem or driver issue.

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16 Jul 2019 03:22 - 16 Jul 2019 17:57 #139537 by PCW
My first guess would be a polarity or TX/RX swap issue
I'll dig up a schematic of a FPGA card with sserial on board for reference

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Last edit: 16 Jul 2019 17:57 by PCW.
The following user(s) said Thank You: tivoi, blazini36

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17 Jul 2019 03:10 #139668 by blazini36
Thanks PCW, The dual inverters between the transciever and the Rx line are just used as an amplifier right? I see a pull up on the + Rxinput and a pulldown on the -Rx input which I don't have going on with the encoder input. I have 4.7k pullups on all the FPGA GPIO pins on that side of the board that I depopulated for the encoder receivers. I have 150 ohm resistors between +/- on the rx and tx connectors (ran out of 120ohm). The receiver is a AM26LS32 and the driver is a SN75174. It'd be neat to be able to repurpose step and encoder channels for SS channels if it were necessary. The board I have getting fabbed now has the attached dedicated rs422 circuit so hopefully at least that will work.

The .vhd file I modified for 2 rx/tx channels on the step/encoder circuits. the pin descriptors and the module section is pretty much just a copy paste of something I found in another .vhd (.txt so I can upload it). Hal is instantiating the config line in the .ini (just a test setup). The MK list moves sloooow. I'm sure somebody will look into it for me but it'd be good to know if I'm doing something wrong.
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17 Jul 2019 04:27 #139669 by PCW
The two inverters on RX data are for 5V to 3.3V level shifting (and 2 because I had an inverter available but did not want inversion)

I see one minor mistake in the pinout file, you specify 2 sserial ports but
there is only one (port 0) in the configuration

Port0 has 2 channels in you pinout (one sserial instance can support 1 to 8 channels)

You can certainly use differential step/dir outputs as SSerial TX lines and non-muxed encoder inputs as SSerial RX lines

The pullup/pull downs are for RS-485 use where you want a valid state when the TXRX
pair is idle

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