Question about the Hal Configuration

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11 Aug 2020 01:08 #177853 by Emermogle
I am running a 7i92 with a 7I77 and 7I85S. I have an encoder successfully working on the 7I77. I am trying to get a servo to connect to the 7i85S but having no luck. I was looking thru the Hal Configuration menu and noticed I can see the 7I77 connected to Port 0 but don't see the 7i85S. I would have expected to see it on Port 1. Now am wondering if I don't have the 7i92 talking to the 7i85. I used the 7i92_7i77_7i85d.bit file. I am wondering if I need to do something in the HAL file to see both cards or am I missing something else?
I appreciate any guidance.
Thanks
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11 Aug 2020 12:00 #177886 by tommylight
Moved to "driver boards".
-
What does
mesaflash --device 7i92 --addr 192.168.1.121 --readhmid
or
mesaflash --device 7i92 --addr 10.10.10.10 --readhmid
in a terminal say ?

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11 Aug 2020 15:00 - 11 Aug 2020 16:55 #177901 by PCW
The 7I85S will not show up in hal names as it is a passive device.

If you have a 7I85S rather than a 7I85, you would need a 7i92_7i77_7i85sd.bit firmware
It does not look like that is in the distribution, so I will try to find it or make new bitfile:

freeby.mesanet.com/7i92_7785s.zip

Bitfile for 7I92 with 7I77 on P2 and 7I85S on P1
Last edit: 11 Aug 2020 16:55 by PCW.

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11 Aug 2020 22:19 #177950 by Emermogle
I double checked and I do have the 7I85S. I flashed it with the .bit file you provided. I did get different results when I ran the --readhmid command. I posted it below. It now shows Step/Dir Pin functions. I published the results from the --readhmid command below.

So now on to the next problem. I am using the same .HAL file as shown above. When I remove the comment on line 22.
setp hm2_7i92.0.pwmgen.pwm_frequency 15000
I get an error. I'm stumped on what its looking for
I put the error below as well.

BoardName : MESA7I92
FPGA Size: 9 KGates
FPGA Pins: 144
Number of IO Ports: 2
Width of one I/O port: 17
Clock Low frequency: 100.0000 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256

Modules in configuration:

Module: DPLL
There are 1 of DPLL in configuration
Version: 0
Registers: 7
BaseAddress: 7000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: IOPort
There are 2 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: MuxedQCount
There are 10 of MuxedQCount in configuration
Version: 4
Registers: 5
BaseAddress: 3600
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: MuxedQCountSel
There are 1 of MuxedQCountSel in configuration
Version: 0
Registers: 0
BaseAddress: 0000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: StepGen
There are 4 of StepGen in configuration
Version: 2
Registers: 10
BaseAddress: 2000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: SSerial
There are 1 of SSerial in configuration
Version: 0
Registers: 6
BaseAddress: 5B00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 64 bytes

Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for P2
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

1 0 IOPort SSerial 0 TXEn3 (Out)
14 1 IOPort SSerial 0 TXData3 (Out)
2 2 IOPort SSerial 0 RXData3 (In)
15 3 IOPort SSerial 0 TXData2 (Out)
3 4 IOPort SSerial 0 RXData2 (In)
16 5 IOPort SSerial 0 TXData1 (Out)
4 6 IOPort SSerial 0 RXData1 (In)
17 7 IOPort MuxedQCountSel 0 MuxSel0 (Out)
5 8 IOPort MuxedQCount 0 MuxQ-A (In)
6 9 IOPort MuxedQCount 0 MuxQ-B (In)
7 10 IOPort MuxedQCount 0 MuxQ-IDX (In)
8 11 IOPort MuxedQCount 1 MuxQ-A (In)
9 12 IOPort MuxedQCount 1 MuxQ-B (In)
10 13 IOPort MuxedQCount 1 MuxQ-IDX (In)
11 14 IOPort MuxedQCount 2 MuxQ-A (In)
12 15 IOPort MuxedQCount 2 MuxQ-B (In)
13 16 IOPort MuxedQCount 2 MuxQ-IDX (In)

IO Connections for P1
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

1 17 IOPort SSerial 0 RXData4 (In)
14 18 IOPort SSerial 0 TXData4 (Out)
2 19 IOPort StepGen 3 Step/Table1 (Out)
15 20 IOPort StepGen 3 Dir/Table2 (Out)
3 21 IOPort StepGen 2 Step/Table1 (Out)
16 22 IOPort StepGen 2 Dir/Table2 (Out)
4 23 IOPort StepGen 1 Step/Table1 (Out)
17 24 IOPort StepGen 1 Dir/Table2 (Out)
5 25 IOPort StepGen 0 Step/Table1 (Out)
6 26 IOPort StepGen 0 Dir/Table2 (Out)
7 27 IOPort MuxedQCountSel 6 MuxSel0 (Out)
8 28 IOPort MuxedQCount 3 MuxQ-A (In)
9 29 IOPort MuxedQCount 3 MuxQ-B (In)
10 30 IOPort MuxedQCount 3 MuxQ-IDX (In)
11 31 IOPort MuxedQCount 4 MuxQ-A (In)
12 32 IOPort MuxedQCount 4 MuxQ-B (In)
13 33 IOPort MuxedQCount 4 MuxQ-IDX (In)
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11 Aug 2020 22:28 #177951 by PCW
setp hm2_7i92.0.pwmgen.pwm_frequency 15000

Cannot work since the configuration has no PWM generators

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