7i85 show pin confusion
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26 Mar 2021 13:34 #203707
by Muzzer
7i85 show pin confusion was created by Muzzer
When I use show pin to show what pins are generated for my 5i25 / 7i76 / 7i85 combination, I am seeing quite a few more pins than I was expecting (see attached file).
While I understand that some signals are simply inverted (NOT) versions of others, I was expecting the 7i85 to be offering me 4 encoders and 5 RS-422 channels. Instead I seem to be seeing 6 encoders, as well as a load (32) of apparently additional GPIO I wasn't expecting.
I'm sure I just don't know what I'm looking at but would like to understand what's going on here. Bottom line is that I need to connect up 2 linear encoders (X and Z) through the 7i85. I could do this by trial and error using the hal tools but that wouldn't clear up my confusion.
I can't clear this up from my scan of the documentation - perhaps someone could point me in the right direction.
Many thanks
While I understand that some signals are simply inverted (NOT) versions of others, I was expecting the 7i85 to be offering me 4 encoders and 5 RS-422 channels. Instead I seem to be seeing 6 encoders, as well as a load (32) of apparently additional GPIO I wasn't expecting.
I'm sure I just don't know what I'm looking at but would like to understand what's going on here. Bottom line is that I need to connect up 2 linear encoders (X and Z) through the 7i85. I could do this by trial and error using the hal tools but that wouldn't clear up my confusion.
I can't clear this up from my scan of the documentation - perhaps someone could point me in the right direction.
Many thanks
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26 Mar 2021 13:48 #203710
by PCW
Replied by PCW on topic 7i85 show pin confusion
The 7I76 has an encoder so you have 5. Plus multiplexed encoders are always in pairs
so there is a dummy encoder. The GPIO is always available even if the pins are used for things a like encoders.
It might be clearer if you got the actual physical pinout with
sudo mesaflash --device 5i25 --readhmid
so there is a dummy encoder. The GPIO is always available even if the pins are used for things a like encoders.
It might be clearer if you got the actual physical pinout with
sudo mesaflash --device 5i25 --readhmid
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26 Mar 2021 15:59 #203729
by Muzzer
Replied by Muzzer on topic 7i85 show pin confusion
Aha. So I can see P3 (7i76) and P2 (7i85)
Configuration pin-out:
IO Connections for P3
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
1 0 IOPort StepGen 0 Dir/Table2 (Out)
14 1 IOPort StepGen 0 Step/Table1 (Out)
2 2 IOPort StepGen 1 Dir/Table2 (Out)
15 3 IOPort StepGen 1 Step/Table1 (Out)
3 4 IOPort StepGen 2 Dir/Table2 (Out)
16 5 IOPort StepGen 2 Step/Table1 (Out)
4 6 IOPort StepGen 3 Dir/Table2 (Out)
17 7 IOPort StepGen 3 Step/Table1 (Out)
5 8 IOPort StepGen 4 Dir/Table2 (Out)
6 9 IOPort StepGen 4 Step/Table1 (Out)
7 10 IOPort SSerial 0 TXData0 (Out)
8 11 IOPort SSerial 0 RXData0 (In)
9 12 IOPort SSerial 0 TXData1 (Out)
10 13 IOPort SSerial 0 RXData1 (In)
11 14 IOPort MuxedQCount 0 MuxQ-IDX (In)
12 15 IOPort MuxedQCount 0 MuxQ-B (In)
13 16 IOPort MuxedQCount 0 MuxQ-A (In)
IO Connections for P2
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
1 17 IOPort SSerial 0 RXData6 (In)
14 18 IOPort SSerial 0 TXData6 (Out)
2 19 IOPort SSerial 0 RXData5 (In)
15 20 IOPort SSerial 0 TXData5 (Out)
3 21 IOPort SSerial 0 RXData4 (In)
16 22 IOPort SSerial 0 TXData4 (Out)
4 23 IOPort SSerial 0 RXData3 (In)
17 24 IOPort SSerial 0 TXData3 (Out)
5 25 IOPort SSerial 0 RXData2 (In)
6 26 IOPort SSerial 0 TXData2 (Out)
7 27 IOPort MuxedQCountSel 2 MuxSel0 (Out)
8 28 IOPort MuxedQCount 1 MuxQ-A (In)
9 29 IOPort MuxedQCount 1 MuxQ-B (In)
10 30 IOPort MuxedQCount 1 MuxQ-IDX (In)
11 31 IOPort MuxedQCount 2 MuxQ-A (In)
12 32 IOPort MuxedQCount 2 MuxQ-B (In)
13 33 IOPort MuxedQCount 2 MuxQ-IDX (In)
I'm seeing 2 encoders, which may be because I somehow configured it thus, although I don't recall. Otherwise presumably I'd see another couple listed?
Thanks
Configuration pin-out:
IO Connections for P3
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
1 0 IOPort StepGen 0 Dir/Table2 (Out)
14 1 IOPort StepGen 0 Step/Table1 (Out)
2 2 IOPort StepGen 1 Dir/Table2 (Out)
15 3 IOPort StepGen 1 Step/Table1 (Out)
3 4 IOPort StepGen 2 Dir/Table2 (Out)
16 5 IOPort StepGen 2 Step/Table1 (Out)
4 6 IOPort StepGen 3 Dir/Table2 (Out)
17 7 IOPort StepGen 3 Step/Table1 (Out)
5 8 IOPort StepGen 4 Dir/Table2 (Out)
6 9 IOPort StepGen 4 Step/Table1 (Out)
7 10 IOPort SSerial 0 TXData0 (Out)
8 11 IOPort SSerial 0 RXData0 (In)
9 12 IOPort SSerial 0 TXData1 (Out)
10 13 IOPort SSerial 0 RXData1 (In)
11 14 IOPort MuxedQCount 0 MuxQ-IDX (In)
12 15 IOPort MuxedQCount 0 MuxQ-B (In)
13 16 IOPort MuxedQCount 0 MuxQ-A (In)
IO Connections for P2
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
1 17 IOPort SSerial 0 RXData6 (In)
14 18 IOPort SSerial 0 TXData6 (Out)
2 19 IOPort SSerial 0 RXData5 (In)
15 20 IOPort SSerial 0 TXData5 (Out)
3 21 IOPort SSerial 0 RXData4 (In)
16 22 IOPort SSerial 0 TXData4 (Out)
4 23 IOPort SSerial 0 RXData3 (In)
17 24 IOPort SSerial 0 TXData3 (Out)
5 25 IOPort SSerial 0 RXData2 (In)
6 26 IOPort SSerial 0 TXData2 (Out)
7 27 IOPort MuxedQCountSel 2 MuxSel0 (Out)
8 28 IOPort MuxedQCount 1 MuxQ-A (In)
9 29 IOPort MuxedQCount 1 MuxQ-B (In)
10 30 IOPort MuxedQCount 1 MuxQ-IDX (In)
11 31 IOPort MuxedQCount 2 MuxQ-A (In)
12 32 IOPort MuxedQCount 2 MuxQ-B (In)
13 33 IOPort MuxedQCount 2 MuxQ-IDX (In)
I'm seeing 2 encoders, which may be because I somehow configured it thus, although I don't recall. Otherwise presumably I'd see another couple listed?
Thanks
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26 Mar 2021 16:05 #203730
by PCW
Replied by PCW on topic 7i85 show pin confusion
Mesaflash shows all the hardware (its showing 6 encoders here)
Muxed encoders share a set of pins for 2 encoders
So
Muxed encoder 0 on the 7I76 = hal encoders 0 and 1 (1 is a dummy)
Muxed encoders 1 and 2 on the 7I85 = hal encoders 2,3,4,5
Muxed encoders share a set of pins for 2 encoders
So
Muxed encoder 0 on the 7I76 = hal encoders 0 and 1 (1 is a dummy)
Muxed encoders 1 and 2 on the 7I85 = hal encoders 2,3,4,5
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26 Mar 2021 21:07 #203752
by Muzzer
Replied by Muzzer on topic 7i85 show pin confusion
That makes sense. I've made the changes and will try it out tomorrow. It feels as if I'm getting there.
Can someone tell me why I have both of these scale parameters in my ini file [JOINT_0] stanza? They were both generated by PNCconf but the documentation seems to suggest they both address the same factor ie how many steps per machine unit. Surely I don't need both / which one do I need / is one of them redundant?
INPUT_SCALE = 4000
.....
STEP_SCALE = 400.0
Can someone tell me why I have both of these scale parameters in my ini file [JOINT_0] stanza? They were both generated by PNCconf but the documentation seems to suggest they both address the same factor ie how many steps per machine unit. Surely I don't need both / which one do I need / is one of them redundant?
INPUT_SCALE = 4000
.....
STEP_SCALE = 400.0
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26 Mar 2021 22:21 #203757
by PCW
Replied by PCW on topic 7i85 show pin confusion
STEP_SCALE is steps per unit
INPUT_SCALE is typically encoder counts per unit
INPUT_SCALE is typically encoder counts per unit
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26 Mar 2021 22:27 #203758
by Muzzer
Replied by Muzzer on topic 7i85 show pin confusion
Thanks - that makes sense.
Elsewhere in the documentation I saw an ENCODER_SCALE parameter being described, perhaps in v2.6. This one went in [TRAJ] but I'm guessing it was superseded by the INPUT_SCALE parameter.
Elsewhere in the documentation I saw an ENCODER_SCALE parameter being described, perhaps in v2.6. This one went in [TRAJ] but I'm guessing it was superseded by the INPUT_SCALE parameter.
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26 Mar 2021 22:33 #203759
by PCW
Replied by PCW on topic 7i85 show pin confusion
Most of these names are arbitrary
They just have to be consistent from file to file
in the same configuration (like signal names)
They just have to be consistent from file to file
in the same configuration (like signal names)
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