7i76e with g540 on connection p1

Let me start by apologizing if I’m posting in the wrong spot, or asking something obvious, I’m brand new to LinuxCNC and may have got myself in over my head.
I am trying to use a gecko g540 on the p1 port of a 7i76e and am lost as to what I’m doing wrong, or what my next steps should be. I managed to successfully flash the 7i76e using Mesa flash and the firmware from PCW in this topic.
forum.linuxcnc.org/10-advanced-configura...nsion-ports-on-7i76e
Now I’m trying to set it up using PNCconf, and I am stuck, it seems I have 2 options, I can set it up as “7i76e-internal data”, or use the discovery option. If I choose “7i76e-internal data” there is no way to set the pins on p1 as step gens, and it won’t allow me to set more than the 5 on board. If I choose the discovery option, it shows up as a 7176 instead of a 7i76e and that PNCconf doesn’t recognize the board name. It then has me enter the number of ports and pins (I entered 3 and 17), but when the configuration loads up it no longer shows the tab “7176 I/O (SS# 0), and I no longer have access to set the onboard I/O. I’m not sure what to try next?

I'm not sure what other information may be helpful or needed. i am running LinuxCNC 2.9.0-pre0.3759

This is the output of the PNCconf discovery option:
ETH device 7I76E-16 at ip=10.10.10.10
SSLBP port 0:
SSLBP Version: 1.43
SSLBP Channels: 2
SSLBP Baud Rate: 2500000
sserial device at channel 0: 7I76 (unit 0x1A000934)
SwRevision = 15
HwRevision = 1
NVBaudRate = 2.5Mb
NVUnitNumber = 0x1A000934
NVWatchDogTimeout = 50ms
SOFTWARE MODE IO_Spin [index 00]
SOFTWARE MODE IO_Ana_Spin [index 01]
SOFTWARE MODE IO_Enc_Ana_Spin_FV [index 02]
Configuration Name: HOSTMOT2

General configuration information:

BoardName : MESA7I76
FPGA Size: 16 KGates
FPGA Pins: 256
Number of IO Ports: 3
Width of one I/O port: 17
Clock Low frequency: 100.0000 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256

Modules in configuration:

Module: DPLL
There are 1 of DPLL in configuration
Version: 0
Registers: 7
BaseAddress: 7000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: IOPort
There are 3 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: StepGen
There are 10 of StepGen in configuration
Version: 2
Registers: 10
BaseAddress: 2000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: QCount
There are 2 of QCount in configuration
Version: 2
Registers: 5
BaseAddress: 3000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: PWM
There are 1 of PWM in configuration
Version: 0
Registers: 5
BaseAddress: 4100
ClockFrequency: 200.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: SSerial
There are 1 of SSerial in configuration
Version: 0
Registers: 6
BaseAddress: 5B00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 64 bytes

Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for on-card
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

TB2-4,5 0 IOPort StepGen 5 Dir/Table2 (Out)
TB2-2,3 1 IOPort StepGen 5 Step/Table1 (Out)
TB2-10,11 2 IOPort StepGen 6 Dir/Table2 (Out)
TB2-8,9 3 IOPort StepGen 6 Step/Table1 (Out)
TB2-16,17 4 IOPort StepGen 7 Dir/Table2 (Out)
TB2-14,15 5 IOPort StepGen 7 Step/Table1 (Out)
TB2-22,23 6 IOPort StepGen 8 Dir/Table2 (Out)
TB2-20,21 7 IOPort StepGen 8 Step/Table1 (Out)
TB3-4,5 8 IOPort StepGen 9 Dir/Table2 (Out)
TB3-2,3 9 IOPort StepGen 9 Step/Table1 (Out)
Internal 10 IOPort SSerial 0 TXData0 (Out)
Internal 11 IOPort SSerial 0 RXData0 (In)
TB3-18,19 12 IOPort SSerial 0 TXData1 (Out)
TB3-16,17 13 IOPort SSerial 0 RXData1 (In)
TB3-13,14 14 IOPort QCount 0 Quad-IDX (In)
TB3-10,11 15 IOPort QCount 0 Quad-B (In)
TB3-7,8 16 IOPort QCount 0 Quad-A (In)

IO Connections for P1
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

1 17 IOPort None
14 18 IOPort PWM 0 PWM (Out)
2 19 IOPort StepGen 0 Step/Table1 (Out)
15 20 IOPort None
3 21 IOPort StepGen 0 Dir/Table2 (Out)
16 22 IOPort StepGen 4 Step/Table1 (Out)
4 23 IOPort StepGen 1 Step/Table1 (Out)
17 24 IOPort None
5 25 IOPort StepGen 1 Dir/Table2 (Out)
6 26 IOPort StepGen 2 Step/Table1 (Out)
7 27 IOPort StepGen 2 Dir/Table2 (Out)
8 28 IOPort StepGen 3 Step/Table1 (Out)
9 29 IOPort StepGen 3 Dir/Table2 (Out)
10 30 IOPort QCount 1 Quad-A (In)
11 31 IOPort QCount 1 Quad-B (In)
12 32 IOPort QCount 1 Quad-IDX (In)
13 33 IOPort None

IO Connections for P2
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

1 34 IOPort None
14 35 IOPort None
2 36 IOPort None
15 37 IOPort None
3 38 IOPort None
16 39 IOPort None
4 40 IOPort None
17 41 IOPort None
5 42 IOPort None
6 43 IOPort None
7 44 IOPort None
8 45 IOPort None
9 46 IOPort None
10 47 IOPort None
11 48 IOPort None
12 49 IOPort None
13 50 IOPort None

If i run mesaflash --device 7i76e --addr 10.10.10.10 --readhmid:

Configuration Name: HOSTMOT2

General configuration information:

BoardName : MESA7I76
FPGA Size: 16 KGates
FPGA Pins: 256
Number of IO Ports: 3
Width of one I/O port: 17
Clock Low frequency: 100.0000 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256

Modules in configuration:

Module: DPLL
There are 1 of DPLL in configuration
Version: 0
Registers: 7
BaseAddress: 7000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: IOPort
There are 3 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: StepGen
There are 10 of StepGen in configuration
Version: 2
Registers: 10
BaseAddress: 2000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: QCount
There are 2 of QCount in configuration
Version: 2
Registers: 5
BaseAddress: 3000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: PWM
There are 1 of PWM in configuration
Version: 0
Registers: 5
BaseAddress: 4100
ClockFrequency: 200.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: SSerial
There are 1 of SSerial in configuration
Version: 0
Registers: 6
BaseAddress: 5B00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 64 bytes

Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for on-card
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

TB2-4,5 0 IOPort StepGen 5 Dir/Table2 (Out)
TB2-2,3 1 IOPort StepGen 5 Step/Table1 (Out)
TB2-10,11 2 IOPort StepGen 6 Dir/Table2 (Out)
TB2-8,9 3 IOPort StepGen 6 Step/Table1 (Out)
TB2-16,17 4 IOPort StepGen 7 Dir/Table2 (Out)
TB2-14,15 5 IOPort StepGen 7 Step/Table1 (Out)
TB2-22,23 6 IOPort StepGen 8 Dir/Table2 (Out)
TB2-20,21 7 IOPort StepGen 8 Step/Table1 (Out)
TB3-4,5 8 IOPort StepGen 9 Dir/Table2 (Out)
TB3-2,3 9 IOPort StepGen 9 Step/Table1 (Out)
Internal 10 IOPort SSerial 0 TXData0 (Out)
Internal 11 IOPort SSerial 0 RXData0 (In)
TB3-18,19 12 IOPort SSerial 0 TXData1 (Out)
TB3-16,17 13 IOPort SSerial 0 RXData1 (In)
TB3-13,14 14 IOPort QCount 0 Quad-IDX (In)
TB3-10,11 15 IOPort QCount 0 Quad-B (In)
TB3-7,8 16 IOPort QCount 0 Quad-A (In)

IO Connections for P1
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

1 17 IOPort None
14 18 IOPort PWM 0 PWM (Out)
2 19 IOPort StepGen 0 Step/Table1 (Out)
15 20 IOPort None
3 21 IOPort StepGen 0 Dir/Table2 (Out)
16 22 IOPort StepGen 4 Step/Table1 (Out)
4 23 IOPort StepGen 1 Step/Table1 (Out)
17 24 IOPort None
5 25 IOPort StepGen 1 Dir/Table2 (Out)
6 26 IOPort StepGen 2 Step/Table1 (Out)
7 27 IOPort StepGen 2 Dir/Table2 (Out)
8 28 IOPort StepGen 3 Step/Table1 (Out)
9 29 IOPort StepGen 3 Dir/Table2 (Out)
10 30 IOPort QCount 1 Quad-A (In)
11 31 IOPort QCount 1 Quad-B (In)
12 32 IOPort QCount 1 Quad-IDX (In)
13 33 IOPort None

IO Connections for P2
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

1 34 IOPort None
14 35 IOPort None
2 36 IOPort None
15 37 IOPort None
3 38 IOPort None
16 39 IOPort None
4 40 IOPort None
17 41 IOPort None
5 42 IOPort None
6 43 IOPort None
7 44 IOPort None
8 45 IOPort None
9 46 IOPort None
10 47 IOPort None
11 48 IOPort None
12 49 IOPort None
13 50 IOPort None

If you use the "7I76E with internal data" The P1 stepgens will be enabled
when you assign stepgen 0,1,2,3 (pncconf has no idea where the stepgens connect)
stepgen 4 is the G540 charge pump signal on P1 so pncconf can set this up also

The stepgens on the 7I76E would need to be assigned by hand editing the hal and ini files,
as would the G540s spindle PWM.

OK, I'll give that a shot. Thank You!

Thank you so much, I’ve have motion!