Mesa 6i25 encoder count speed.

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06 Sep 2021 18:04 #219777 by Roiki
How fast is the mesa 6i25 cards quadrature counter? I'd have a need for a very fast (~50mhz) quadrature signal counter and 6i25 would make it pretty easy. I looked at the specs of spartan-6 and it should be able to do that but can hostmot do it? The card wouldn't be doing anything else. Just an encoder interface.

Or could another mesa card do It(3x20?).

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06 Sep 2021 20:23 - 06 Sep 2021 20:25 #219788 by PCW
Replied by PCW on topic Mesa 6i25 encoder count speed.
The speed of the current counter is limited by the minimum digital input filter setting
which is 3 clocklow cycles.  The clocklow of a 6I25 is 33 MHz so the shortest detectable
pulse is 100 ns or about a 20 MHz quadrature count rate.

It would certainly be possible to make a custom counter that could count up
100 MHz or so using a GCLK input or perhaps 50 MHz on any input by using
a 200 MHz or so sample clock. At 50 MHz signal cleanliness and termination
are going to be significant issues.
Last edit: 06 Sep 2021 20:25 by PCW.

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06 Sep 2021 21:38 #219791 by Roiki
The signals are 5v RS422 differential signals. The rs422 should handle it for a few meters. At least if the receivers are decent. I've done 20mhz over about 8m with rs422.

Would a 3x20 or 4i69 be a better candidate? The 4i69 says it can run counters at 100mhz.

I would also likely make an isolation/termination board for them since they have db9s on them so differential inputs on the fpga isn't strictly a requirement.

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06 Sep 2021 23:01 #219801 by PCW
Replied by PCW on topic Mesa 6i25 encoder count speed.
A 6I25 should work but requires a high speed quadrature counter
module, You would probably want to use the I/O pins with the interleaved
grounds (pins 2,3,4,5,6,7,8,9 on the DB25) and use series termination
on the A/B signals from the isolator/receiver board.

I also assume you mean a 50 MHz quadrature count rate with 4X
decoding (2x 12.5 MHz square waves with 90 degrees phase shift)

I can take a quick look at what's required. I would probably bump the
counter size up to 32 bits since the current 16 bits would require
a faster than 1 KHz servo thread to have no uncertainly in the wrap logic
at 50 MHz

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07 Sep 2021 15:04 - 07 Sep 2021 15:06 #219858 by Roiki
Yea the counters probably should be 32bits, 16 bit would roll over quite fast if the speed is high enough. The encoders are renishaw tonics(not sure of the model) if you want to look at the specs. I'm also looking at rls hiLins. They both are in the 30mhz range but I'd like a bit of headroom for that. And also for future proofing.

As for the decoding frequency I'm not entirely sure. Rhe data sheet puts it as "receiver clock frequency" so I'd assume it's the needed clock signal for the quadrature counter. The data sheet should have all the specs.
Last edit: 07 Sep 2021 15:06 by Roiki.

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