No 7C81 board found

First try at setting up a Mesa card as well as a newby to Linuxcnc. Oops!
I mistakenly flashed my 7c81 with 7c81epp.bit ,( thinking it would be the best match to my existing Mach3 parallel port)
Now my board responds like this and I don't know how to get it back

sudo mesaflash --device 7c81 --addr /dev/spidev0.0 --spi --readhmid
unable to set bpw32, fallback to bpw8
Unexpected cookie at 0100..0110:
00000000 00000000 00000000
No 7C81 board found

Here is the complete mess I've made, can some kind soul help me put the genie back in the bottle?


pi@raspberrypi:~/hostmot2 $ sudo mesaflash --device 7c81 --addr /dev/spidev0.0 --spi --readhmid
unable to set bpw32, fallback to bpw8
Configuration Name: HOSTMOT2

General configuration information:

  BoardName : MESA7C81
  FPGA Size: 9 KGates
  FPGA Pins: 144
  Number of IO Ports: 3
  Width of one I/O port: 19
  Clock Low frequency: 100.0000 MHz
  Clock High frequency: 200.0000 MHz
  IDROM Type: 3
  Instance Stride 0: 4
  Instance Stride 1: 64
  Register Stride 0: 256
  Register Stride 1: 256

Modules in configuration:

  Module: DPLL
  There are 1 of DPLL in configuration
  Version: 0
  Registers: 7
  BaseAddress: 7000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: WatchDog
  There are 1 of WatchDog in configuration
  Version: 0
  Registers: 3
  BaseAddress: 0C00
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: IOPort
  There are 3 of IOPort in configuration
  Version: 0
  Registers: 5
  BaseAddress: 1000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: QCount
  There are 1 of QCount in configuration
  Version: 2
  Registers: 5
  BaseAddress: 3000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: SSerial
  There are 1 of SSerial in configuration
  Version: 0
  Registers: 6
  BaseAddress: 5B00
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 64 bytes

  Module: StepGen
  There are 10 of StepGen in configuration
  Version: 2
  Registers: 10
  BaseAddress: 2000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: PWM
  There are 3 of PWM in configuration
  Version: 0
  Registers: 5
  BaseAddress: 4100
  ClockFrequency: 200.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: LED
  There are 1 of LED in configuration
  Version: 0
  Registers: 1
  BaseAddress: 0200
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for P1+Serial
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 0      0   IOPort       PWM              0        PWM             (Out)
 0      1   IOPort       None           
 0      2   IOPort       StepGen          0        Step/Table1     (Out)
 0      3   IOPort       None           
 0      4   IOPort       StepGen          0        Dir/Table2      (Out)
 0      5   IOPort       None           
 0      6   IOPort       StepGen          1        Step/Table1     (Out)
 0      7   IOPort       None           
 0      8   IOPort       StepGen          1        Dir/Table2      (Out)
 0      9   IOPort       StepGen          2        Step/Table1     (Out)
 0     10   IOPort       StepGen          2        Dir/Table2      (Out)
 0     11   IOPort       StepGen          3        Step/Table1     (Out)
 0     12   IOPort       StepGen          3        Dir/Table2      (Out)
 0     13   IOPort       None           
 0     14   IOPort       QCount           0        Quad-A          (In)
 0     15   IOPort       QCount           0        Quad-B          (In)
 0     16   IOPort       QCount           0        Quad-IDX        (In)
 0     17   IOPort       SSerial          0        TXData0         (Out)
 0     18   IOPort       SSerial          0        TXData1         (Out)

IO Connections for P2+Serial
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 0     19   IOPort       PWM              1        PWM             (Out)
 0     20   IOPort       None           
 0     21   IOPort       StepGen          4        Step/Table1     (Out)
 0     22   IOPort       None           
 0     23   IOPort       StepGen          4        Dir/Table2      (Out)
 0     24   IOPort       None           
 0     25   IOPort       StepGen          5        Step/Table1     (Out)
 0     26   IOPort       None           
 0     27   IOPort       StepGen          5        Dir/Table2      (Out)
 0     28   IOPort       StepGen          6        Step/Table1     (Out)
 0     29   IOPort       StepGen          6        Dir/Table2      (Out)
 0     30   IOPort       None           
 0     31   IOPort       None           
 0     32   IOPort       None           
 0     33   IOPort       None           
 0     34   IOPort       None           
 0     35   IOPort       None           
 0     36   IOPort       SSerial          0        TXEn0           (Out)
 0     37   IOPort       SSerial          0        TXEn1           (Out)

IO Connections for P7+Serial
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 0     38   IOPort       PWM              2        PWM             (Out)
 0     39   IOPort       None           
 0     40   IOPort       StepGen          7        Step/Table1     (Out)
 0     41   IOPort       None           
 0     42   IOPort       StepGen          7        Dir/Table2      (Out)
 0     43   IOPort       None           
 0     44   IOPort       StepGen          8        Step/Table1     (Out)
 0     45   IOPort       None           
 0     46   IOPort       StepGen          8        Dir/Table2      (Out)
 0     47   IOPort       StepGen          9        Step/Table1     (Out)
 0     48   IOPort       StepGen          9        Dir/Table2      (Out)
 0     49   IOPort       None           
 0     50   IOPort       None           
 0     51   IOPort       None           
 0     52   IOPort       None           
 0     53   IOPort       None           
 0     54   IOPort       None           
 0     55   IOPort       SSerial          0        RXData0         (In)
 0     56   IOPort       SSerial          0        RXData1         (In)

pi@raspberrypi:~/hostmot2 $ ls
7c81_5abobx2d.bit        7c81_7i77x1_7i76x1d.pin  7c81_dmmbobx2d.bit
7c81_5abobx2d.pin        7c81_7i77x2d.bit         7c81epp.bit
7c81_5abobx3d.bit        7c81_7i77x2d.pin         7c81_fallback.bit
7c81_5abobx3d.pin        7c81_7i78x2d.bit         7c81_g540x2d.bit
7c81_7i76x2_7i89.bit     7c81_7i85sx2d.bit        7c81_g540x2d.pin
7c81_7i76x2d.bit         7c81_7i88ssx1d.bit       7c81_mx3660x2d.bit
7c81_7i76x2d.pin         7c81_c11gx2d.bit         7c81_mx3660x2d.pin
7c81_7i77x1_7i76x1d.bit  7c81_c11gx2d.pin         source
pi@raspberrypi:~/hostmot2 $ sudo mesaflash --device 7c81 --addr /dev/spidev0.0 --spi --verbose --write 7c81epp.bit
unable to set bpw32, fallback to bpw8
Checking file... OK
  File type: BIT file
  Design name: TopEPPSHostMot2.ncd;UserID=0xFFFFFFFF
  Part name: 6slx9tqg144
  Design date: 2018/10/10
  Design time: 16:07:30
  Config Length: 340604
Error: BootSector is invalid
pi@raspberrypi:~/hostmot2 $ sudo mesaflash --device 7c81 --addr /dev/spidev0.0 --spi --verbose --fix-boot-block --write 7c81epp.bit
unable to set bpw32, fallback to bpw8
Checking file... OK
  File type: BIT file
  Design name: TopEPPSHostMot2.ncd;UserID=0xFFFFFFFF
  Part name: 6slx9tqg144
  Design date: 2018/10/10
  Design time: 16:07:30
  Config Length: 340604
Erasing sector 0 for boot block
BootBlock installed
EEPROM sectors to write: 6, max sectors in area: 8
Erasing EEPROM sectors starting from 0x80000...
  |EEEEEE
  Erasing time: 1.35 seconds
Programming EEPROM sectors starting from 0x80000...
  |WWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWW
  Programming time: 25.47 seconds
Board configuration updated successfully.
Checking file... OK
  File type: BIT file
  Design name: TopEPPSHostMot2.ncd;UserID=0xFFFFFFFF
  Part name: 6slx9tqg144
  Design date: 2018/10/10
  Design time: 16:07:30
  Config Length: 340604
Boot sector OK
Verifying EEPROM sectors starting from 0x80000...
  |VVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVV
  Verification time: 36.02 seconds
Board configuration verified successfully.

You must power cycle the hardware or use the --reload command to load a new firmware.
pi@raspberrypi:~/hostmot2 $ sudo mesaflash --device 7c81 --addr /dev/spidev0.0 --spi --verbose --reload
unable to set bpw32, fallback to bpw8
Waiting for FPGA configuration...OK
pi@raspberrypi:~/hostmot2 $ sudo mesaflash --device 7c81 --addr /dev/spidev0.0 --spi --verbose --verify 7c81epp.bit
unable to set bpw32, fallback to bpw8
Unexpected cookie at 0100..0110:
00000000 00000000 00000000
No 7C81 board found
pi@raspberrypi:~/hostmot2 $ sudo mesaflash --device 7c81 --addr /dev/spidev0.0 --spi --readhmid
unable to set bpw32, fallback to bpw8
Unexpected cookie at 0100..0110:
00000000 00000000 00000000
No 7C81 board found
pi@raspberrypi:~/hostmot2 $ sudo poweroff
Connection to raspberrypi.local closed by remote host.
Connection to raspberrypi.local closed.
user@user-B450-AORUS-M:~$ ssh -X This email address is being protected from spambots. You need JavaScript enabled to view it.
pi@raspberrypi.local's password:
Linux raspberrypi 4.19.71-rt24-v7l+ #1 SMP PREEMPT RT Fri Jan 1 21:15:16 GMT 2021 armv7l

The programs included with the Debian GNU/Linux system are free software;
the exact distribution terms for each program are described in the
individual files in /usr/share/doc/*/copyright.

Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
permitted by applicable law.
Last login: Thu Aug 25 22:13:17 2022
pi@raspberrypi:~ $ sudo mesaflash --device 7c81 --addr /dev/spidev0.0 --spi --readhmid
unable to set bpw32, fallback to bpw8
Unexpected cookie at 0100..0110:
00000000 00000000 00000000
No 7C81 board found
pi@raspberrypi:~ $ halrun
halcmd: loadrt hostmot2
Note: Using POSIX realtime
hm2: loading Mesa HostMot2 driver version 0.15
halcmd: loadrt hm2_rpspi
hm2_rpspi: SPI0/CE0 Invalid cookie, read: 00000000 00000000 00000000, expected: 55aacafe 54534f48 32544f4d
hm2_rpspi: SPI0/CE0 No drive seen on MISO line (kept at pull-down level). No board connected or bad connection?
hm2_rpspi: rtapi_app_main: No such device (-19)
<stdin>:2: waitpid failed /usr/bin/rtapi_app hm2_rpspi
<stdin>:2: /usr/bin/rtapi_app exited without becoming ready
<stdin>:2: insmod for hm2_rpspi failed, returned -1
halcmd: show pin
Component Pins:
Owner   Type  Dir         Value  Name

halcmd: exit
hm2_rpspi: not loaded
<commandline>:0: exit value: 255
<commandline>:0: rmmod failed, returned -1
hm2: unloading
<commandline>:0: unloadrt failed
Note: Using POSIX realtime

 

Unless you have a JTAG cable, you likely have to send the card back
to Mesa to be reprogrammed.

Thanks for you quick reply.

Lots of experience making cables.
Which software would I need to program it.
Do I need addittional hardware to use with the JTAG?

For JTAG, you would need a Xilinx Impact compatible JTAG programmer
(the parallel port based one is cheap and workable)

Impact can be downloaded from Xilinx not sure if it can be downloaded
separately from Webpack (which is enormous)

Another option is to make a EPP cable fro the 7C81
and reflash the card via EPP (needs a PC with a EPP
capable parallel port running Linux and a funny cable)

Another possible option is to disrupt the firmware loading
at power up so a CRC error is created, the FPGA loader will
then load the fallback configuration (which has a  SPI interfce)

This would require say grounding the SPI flash's chips data out pin
very briefly at power up. If this is successful, you should get a blinking
/INIT light, indicating that the fallback configuration has been loaded.
 

Option 3 sounds simple. How do I identify the gata out pin required?

Well its tricky because you need to disrupt the user
image load but not subsequent the fallback load.

Don't have the data sheet in front of me but it's the
SOP8 W25W16 or W25Q32 chip

"Another option is to make a EPP cable fro the 7C81
and reflash the card via EPP (needs a PC with a EPP
capable parallel port running Linux and a funny cable)"

Can you give me details on this procedure?
By the way, thanks for all your help.

You would need an adapter cable like this:

 

The run mesaflash from a PC with EPP port and
reflash the card with the desired SPI firmware

Thank you PCW. Now I have three approaches to fix my mistake. I'll report back on which ways I try and my results.
Much better than mailing it back with the shipping charges being half the price of a new card.

A related question: what does the 7c81epp.bit file configure the board to do?