Question about custom BOB for a 7i92

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17 Apr 2023 16:22 #269313 by blazini36
Question about custom BOB for a 7i92 was created by blazini36
So in my adventure to build a PnP machine which realistically only needs a 3d printer style board, I've wound up where I usually wind up, LinuxCNC with a Mesa card. The field ready cards aren't quite suitable for this, it'll me a wiring mess in a small machine. Best bet is to use a 7i92H and make a custom BOB. I'm still determining what I need out of the available 34 IO bits but I have a couple of questions before I dig into all of that.

1, can I get a custom firmware written. I know Mesa's done many custom bitfiles, I started to dig through pin files but I'm probably not going to find exactly what I need.

2, does the 7i92 FPGA have a logic block limit that limits the amount of certain modules? I'd expect SS or maybe an encoder to require more logic blocks than I/O. I have no idea how many logic units each module requires or what the FPGAs have

3, what is the hm2 module for reading analog inputs? Is there a serial or SPI module for reading a 10 or 12bit ADC?

I've done the whole bitfile editing thing a long time ago when I was messing with machinekit but they had a few special hm2 modules for the targets, like the ADC module.

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17 Apr 2023 16:40 #269314 by PCW
Replied by PCW on topic Question about custom BOB for a 7i92
1. I can make a custom bitfiles pretty quickly (I've done it probably 1000 times or so)
or you can do it yourself. It really just amounts to creating a new pinout file, adding that file
to the project, and re-compiling.

2. Sure, there are logic limitations, but normally you would not run into these
on a 7I92 unless you had a lot of large modules (say more than 10 or so stepgens,
more than 8 sserial channels etc)

3. There is a SPI interface but it needs a custom hal component to interface to specific hardware (the 7i65 component is an example of this)
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17 Apr 2023 17:39 #269317 by blazini36
Replied by blazini36 on topic Question about custom BOB for a 7i92
The max31855 component is used for bitbanging gpio pins to simulate spi. Am I right in thinking this could probably be modified relatively easily to support hm2 spi? github.com/LinuxCNC/linuxcnc/blob/master...onents/max31855.comp
Realistically from the driver's point of view a pin is a pin right?

I would actually be using a pressure sensor, not an ADC. Something like this but not this specifically. www.mouser.com/datasheet/2/389/lps28dfw-2887780.pdf
I can figure the component details out later, I don't need that to work right away. I just need to put it on a PCB and know I can get it working down the road. I'm not sure if there's documentation on the SPI interface but does the module support multiple chips or is it a single instance? If it's a single instance I'd assume it omits the CS pin and the module is worth 3 IO bits? If it supports chip selects then each CS pin is another IO bit right? Depending on how SPI works I'd probably have to omit something else

I don't need all of these things but for future proofing I'd say it'd look something like
6 stepgens (12 IO bits)
1 SS (2 IO bits)
1 or 2 SPI for 2 devices (4-8 IO bits?)
the rest is just GPIO which I should have at least 12 IO bits left.

I can write the pin descriptors in the pinfile which would probably be easier since you don't have to map the pins. The portion above the pin descriptor section alludes me a bit.


 

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17 Apr 2023 17:58 #269319 by PCW
Replied by PCW on topic Question about custom BOB for a 7i92
A single hm2 SPI interface supports CS for up to 16 devices (either direct or decoded with an external decoder chip to save pins) and 16 sets of (per chip) transfer parameters. No GPIO pins are used.

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17 Apr 2023 18:11 - 17 Apr 2023 18:16 #269320 by blazini36
Replied by blazini36 on topic Question about custom BOB for a 7i92
So for 2 devices I use 4 IO bits for a MISO MOSI SCK and a single CS pin if I use an inverter on one device CS right? Otherwise 2 devices would require 5 IO bits and 2 CS pins.
Last edit: 17 Apr 2023 18:16 by blazini36. Reason: Clarify

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17 Apr 2023 18:23 #269321 by PCW
Replied by PCW on topic Question about custom BOB for a 7i92
Yeah 5 pins, you may get way with an inverter _if_
the chips are not picky about CS framing
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17 Apr 2023 19:06 #269324 by blazini36
Replied by blazini36 on topic Question about custom BOB for a 7i92
1 more questions and I'm done for now, I promise lol.

Can the 7i92H be powered through the 26pin headers for 5V or must it be powered by the 2pin connector?

 

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17 Apr 2023 19:26 #269327 by PCW
Replied by PCW on topic Question about custom BOB for a 7i92
You can backpower the 7I92 via its I/O connectors (make sure you use all 4 wires)

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20 Apr 2023 20:40 #269514 by blazini36
Replied by blazini36 on topic Question about custom BOB for a 7i92
I've got a 7i92th on the way, is there a mechanical drawing for the "h" version? Trying to get the pin headers lined up on my BOB but the manual shows the version with a DB25 in the 2nd position. Also, MOSI pin can be omitted from the pinfile if not in use right?

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20 Apr 2023 21:29 #269520 by PCW
Replied by PCW on topic Question about custom BOB for a 7i92
 

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You can drop the MOSI pin if the SPI devices do not require any data sent to them
(that is, they are read only devices and need only a clock and /CS  to output date)
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