Hello,
I prepared the bitstream under Xilinx ISE 14.7 according to the changes described in
github.com/q3k/chubby75/issues/85#issuecomment-1105762488
. Here are the changes compared to basic hostmot2 for 7i90 from MESA site:
github.com/golyakoff/hostmot2-rv901t-7i9...abf87a09ed5a3145c7d2
.
I could flash the RV901 directly via JTAG from ISE iMPACT with the generic 72 GPIO bitstream.
But I could not connect to the device from Raspberry using SPI0:
Raspberry PI with Debian 12 from linuxcnc:
Linux pi-cnc 6.1.77-rt24-v8-ago #1 SMP PREEMPT_RT Sat Mar 16 18:05:52 MSK 2024 aarch64 GNU/Linux
In boot/broadcom/config.txt I enabled SPI0 with custom CE/CS pin:
dtparam=spi=on
dtoverlay=spi0-1cs,cs0_pin=22
When running the command
ago@pi-cnc:~$ sudo mesaflash --device 7i90 --spi --addr /dev/spidev0.0 --readhmid
Is see:
unable to set bpw32, fallback to bpw8
Unexpected cookie at 0100..0110:
00000000 00000000 00000000
On the logic analyzer I see the following error:
The initial (idle) state of the CLK line does not match the settings (see attachments)
I used the short enough SPI cable (~50-70mm)
Could you please advise?