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[solved] Need help with RV901T as MESA 7i90: SPI isn't working

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2 years 7 months ago - 2 years 7 months ago #296774 by PCW
Replied by PCW on topic Need help with RV901T as MESA 7i90: SPI isn't working
The FPGA slave output looks bizarre (like a clock)
One way I can see this happening (assuming the pins are correct)
is that you have double clocking from SI issues

Do you have enough grounds between the cards?

Ground bumping is a huge issue here, for example, the 7C81 uses all 8 RPI grounds
and AC bypasses all unused power pins giving  a total of 12 HF ground returns to
avoid this issue.
Last edit: 2 years 7 months ago by PCW.
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2 years 7 months ago #296792 by Cant do this anymore bye all
Replied by Cant do this anymore bye all on topic Need help with RV901T as MESA 7i90: SPI isn't working
Did you change the values for he DCM sections to take into account the 25MHz clock ?

I just looked at my sources and notice that I had to change them as the 7i90 has a 50MHz clock and the rv901t has a 25Mhz clock.

I had to do the same, but the other way, when I used the Spartan dev board as that has a 100MHz clock.

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2 years 7 months ago - 2 years 7 months ago #296793 by ago_tm
Replied by ago_tm on topic Need help with RV901T as MESA 7i90: SPI isn't working

The FPGA slave output looks bizarre (like a clock)
One way I can see this happening (assuming the pins are correct)
is that you have double clocking from SI issues.

Do you have enough grounds between the cards?

Ground bumping is a huge issue here, for example, the 7C81 uses all 8 RPI grounds
and AC bypasses all unused power pins giving  a total of 12 HF ground returns to
avoid this issue.

Thanks, yes, the next step is to check the SPI clock — looks like I missed this:
forum.linuxcnc.org/27-driver-boards/4182...-on-dev-board#201885 .

About the common ground - I used the only wire, I will also try to improve this. Thanks!
Last edit: 2 years 7 months ago by ago_tm.

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2 years 7 months ago #296830 by ago_tm
Replied by ago_tm on topic Need help with RV901T as MESA 7i90: SPI isn't working
I did the changes related to the difference of crystal oscillator (25MHz instead of 50MHz in original 7i90):  github.com/golyakoff/hostmot2-rv901t-7i9...64f0c39f21bfd875f86c
But the result is the same: I still receive a kind of garbage bytes in MISO line, for example:
Code:
Time [s],     Packet ID,    MOSI,     MISO 0.0000028250,     0,    STX(0x02),    NUL(0x00) 0.0000032850,     0,    NUL(0x00),    NUL(0x00) 0.0000037500,     0,    P(0x50),    P(0x50) 0.0000042150,     0,    (128)(0x80),    (130)(0x82) 0.0000046750,     0,    NUL(0x00),    BS (0x08) 0.0000051400,     0,    NUL(0x00),    (SP)(0x20) 0.0000056000,     0,    NUL(0x00),    (129)(0x81) 0.0000060650,     0,    NUL(0x00),    EOT(0x04) 0.0000065250,     0,    NUL(0x00),    DLE(0x10) 0.0000069900,     0,    NUL(0x00),    @(0x40) 0.0000074550,     0,    NUL(0x00),    STX(0x02) 0.0000079150,     0,    NUL(0x00),    BS (0x08) 0.0000083800,     0,    NUL(0x00),    (SP)(0x20) 0.0000088400,     0,    NUL(0x00),    (129)(0x81) 0.0000093050,     0,    NUL(0x00),    NUL(0x00) 0.0000097650,     0,    NUL(0x00),    DLE(0x10) 0.0000102300,     0,    NUL(0x00),    @(0x40) 0.0000106950,     0,    NUL(0x00),    STX(0x02) 0.0000111550,     0,    NUL(0x00),    BS (0x08) 0.0000116200,     0,    NUL(0x00),    (SP)(0x20)
and bytes randomly differ each time.

I have no more ideas at this point...
What is the speed of SPI clock should be in the original 7i90? My is ~20 MHz...

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2 years 7 months ago #296833 by PCW
Replied by PCW on topic Need help with RV901T as MESA 7i90: SPI isn't working
Did you fix the grounding?.

I would expect that kind of behaviour with only one ground wire.

SI issues like this will not be solved by lower clock speeds
if you do not get one bit shifted out for each clock, you have a SI issue...
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2 years 7 months ago #296837 by ago_tm
Replied by ago_tm on topic Need help with RV901T as MESA 7i90: SPI isn't working
Hello sir,

Did you fix the grounding?.

I would expect that kind of behaviour with only one ground wire.

Yes, I added 3 more wires to the different corners of the board (see the attachment).
Not sure what is the result I get - the MISO line became without any noise - now it always 0x00 (straight line 3v3). Looks like the "garbage data" was just a noise... At least it become correlate to the message:
Code:
Unexpected cookie at 0100..0110: 00000000 00000000 00000000

SI issues like this will not be solved by lower clock speeds
if you do not get one bit shifted out for each clock, you have a SI issue...

Understand about the frequency. But I what you are meaning under "SI issues"? And how can I get one bit shifted? Could you kindly explain?

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