7i80db 7i77 + 7i76 serup Hal conf
- GDTH
-
Topic Author
- Offline
- Junior Member
-
Less
More
- Posts: 29
- Thank you received: 2
19 Apr 2025 11:31 #326684
by GDTH
7i80db 7i77 + 7i76 serup Hal conf was created by GDTH
Hello,
I am trying to get a 7i80db-25 working with a 7i77 and a 7i76. I have installed a bitfile that should make this possible. When I start up linuxcnc I am not able to find the 7i77 and 7i76 board in the Hal conf. I was expecting something like hm2_7i80.0.7i77.input.
Am I doing something wrong or is it normal to just have a gpio list. If so how do I know what is connected to what.
I am trying to get a 7i80db-25 working with a 7i77 and a 7i76. I have installed a bitfile that should make this possible. When I start up linuxcnc I am not able to find the 7i77 and 7i76 board in the Hal conf. I was expecting something like hm2_7i80.0.7i77.input.
Am I doing something wrong or is it normal to just have a gpio list. If so how do I know what is connected to what.
Please Log in or Create an account to join the conversation.
- tommylight
-
- Away
- Moderator
-
Less
More
- Posts: 20088
- Thank you received: 6836
19 Apr 2025 11:35 #326685
by tommylight
Replied by tommylight on topic 7i80db 7i77 + 7i76 serup Hal conf
What does
mesaflash --device ETHER --readhmid
report?
mesaflash --device ETHER --readhmid
report?
Please Log in or Create an account to join the conversation.
- GDTH
-
Topic Author
- Offline
- Junior Member
-
Less
More
- Posts: 29
- Thank you received: 2
19 Apr 2025 11:39 #326686
by GDTH
Replied by GDTH on topic 7i80db 7i77 + 7i76 serup Hal conf
mesaflash --device ETHER --readhmid --addr 192.168.1.121 gives:
Configuration Name: HOSTMOT2
General configuration information:
BoardName : MESA7I80
FPGA Size: 25 KGates
FPGA Pins: 256
Number of IO Ports: 4
Width of one I/O port: 17
Clock Low frequency: 100.0000 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256
Modules in configuration:
Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: IOPort
There are 4 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: MuxedQCount
There are 16 of MuxedQCount in configuration
Version: 3
Registers: 5
BaseAddress: 3500
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: MuxedQCountSel
There are 1 of MuxedQCountSel in configuration
Version: 0
Registers: 0
BaseAddress: 0000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: StepGen
There are 16 of StepGen in configuration
Version: 2
Registers: 10
BaseAddress: 2000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: SSerial
There are 2 of SSerial in configuration
Version: 0
Registers: 6
BaseAddress: 5A00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 64 bytes
Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Configuration pin-out:
IO Connections for J2
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
1 0 IOPort StepGen 0 Dir/Table2 (Out)
14 1 IOPort StepGen 0 Step/Table1 (Out)
2 2 IOPort StepGen 1 Dir/Table2 (Out)
15 3 IOPort StepGen 1 Step/Table1 (Out)
3 4 IOPort StepGen 2 Dir/Table2 (Out)
16 5 IOPort StepGen 2 Step/Table1 (Out)
4 6 IOPort StepGen 3 Dir/Table2 (Out)
17 7 IOPort StepGen 3 Step/Table1 (Out)
5 8 IOPort StepGen 4 Dir/Table2 (Out)
6 9 IOPort StepGen 4 Step/Table1 (Out)
7 10 IOPort SSerial 0 TXData0 (Out)
8 11 IOPort SSerial 0 RXData0 (In)
9 12 IOPort SSerial 0 TXData1 (Out)
10 13 IOPort SSerial 0 RXData1 (In)
11 14 IOPort MuxedQCount 6 MuxQ-IDX (In)
12 15 IOPort MuxedQCount 6 MuxQ-B (In)
13 16 IOPort MuxedQCount 6 MuxQ-A (In)
IO Connections for J3
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
1 17 IOPort StepGen 5 Dir/Table2 (Out)
14 18 IOPort StepGen 5 Step/Table1 (Out)
2 19 IOPort StepGen 6 Dir/Table2 (Out)
15 20 IOPort StepGen 6 Step/Table1 (Out)
3 21 IOPort StepGen 7 Dir/Table2 (Out)
16 22 IOPort StepGen 7 Step/Table1 (Out)
4 23 IOPort StepGen 8 Dir/Table2 (Out)
17 24 IOPort StepGen 8 Step/Table1 (Out)
5 25 IOPort StepGen 9 Dir/Table2 (Out)
6 26 IOPort StepGen 9 Step/Table1 (Out)
7 27 IOPort SSerial 0 TXData2 (Out)
8 28 IOPort SSerial 0 RXData2 (In)
9 29 IOPort SSerial 0 TXData3 (Out)
10 30 IOPort SSerial 0 RXData3 (In)
11 31 IOPort MuxedQCount 7 MuxQ-IDX (In)
12 32 IOPort MuxedQCount 7 MuxQ-B (In)
13 33 IOPort MuxedQCount 7 MuxQ-A (In)
IO Connections for J4
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
1 34 IOPort SSerial 1 TXEn2 (Out)
14 35 IOPort SSerial 1 TXData2 (Out)
2 36 IOPort SSerial 1 RXData2 (In)
15 37 IOPort SSerial 1 TXData1 (Out)
3 38 IOPort SSerial 1 RXData1 (In)
16 39 IOPort SSerial 1 TXData0 (Out)
4 40 IOPort SSerial 1 RXData0 (In)
17 41 IOPort MuxedQCountSel 0 MuxSel0 (Out)
5 42 IOPort MuxedQCount 0 MuxQ-A (In)
6 43 IOPort MuxedQCount 0 MuxQ-B (In)
7 44 IOPort MuxedQCount 0 MuxQ-IDX (In)
8 45 IOPort MuxedQCount 1 MuxQ-A (In)
9 46 IOPort MuxedQCount 1 MuxQ-B (In)
10 47 IOPort MuxedQCount 1 MuxQ-IDX (In)
11 48 IOPort MuxedQCount 2 MuxQ-A (In)
12 49 IOPort MuxedQCount 2 MuxQ-B (In)
13 50 IOPort MuxedQCount 2 MuxQ-IDX (In)
IO Connections for J5
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
1 51 IOPort SSerial 1 TXEn5 (Out)
14 52 IOPort SSerial 1 TXData5 (Out)
2 53 IOPort SSerial 1 RXData5 (In)
15 54 IOPort SSerial 1 TXData4 (Out)
3 55 IOPort SSerial 1 RXData4 (In)
16 56 IOPort SSerial 1 TXData3 (Out)
4 57 IOPort SSerial 1 RXData3 (In)
17 58 IOPort MuxedQCountSel 6 MuxSel0 (Out)
5 59 IOPort MuxedQCount 3 MuxQ-A (In)
6 60 IOPort MuxedQCount 3 MuxQ-B (In)
7 61 IOPort MuxedQCount 3 MuxQ-IDX (In)
8 62 IOPort MuxedQCount 4 MuxQ-A (In)
9 63 IOPort MuxedQCount 4 MuxQ-B (In)
10 64 IOPort MuxedQCount 4 MuxQ-IDX (In)
11 65 IOPort MuxedQCount 5 MuxQ-A (In)
12 66 IOPort MuxedQCount 5 MuxQ-B (In)
13 67 IOPort MuxedQCount 5 MuxQ-IDX (In)
Please Log in or Create an account to join the conversation.
- tommylight
-
- Away
- Moderator
-
Less
More
- Posts: 20088
- Thank you received: 6836
19 Apr 2025 11:42 #326688
by tommylight
Replied by tommylight on topic 7i80db 7i77 + 7i76 serup Hal conf
OK,
Mesa 7i76 to connector J2
Mesa 7i77 to connector J4
Mesa 7i76 to connector J2
Mesa 7i77 to connector J4
Please Log in or Create an account to join the conversation.
- GDTH
-
Topic Author
- Offline
- Junior Member
-
Less
More
- Posts: 29
- Thank you received: 2
19 Apr 2025 11:44 #326689
by GDTH
Replied by GDTH on topic 7i80db 7i77 + 7i76 serup Hal conf
i already have that.
Or able to see that from the data?
Or able to see that from the data?
Please Log in or Create an account to join the conversation.
- tommylight
-
- Away
- Moderator
-
Less
More
- Posts: 20088
- Thank you received: 6836
19 Apr 2025 11:48 #326691
by tommylight
Replied by tommylight on topic 7i80db 7i77 + 7i76 serup Hal conf
Do they show in "show hal configuration" from the "machine" menu?
Please Log in or Create an account to join the conversation.
- GDTH
-
Topic Author
- Offline
- Junior Member
-
Less
More
- Posts: 29
- Thank you received: 2
19 Apr 2025 11:48 #326692
by GDTH
Replied by GDTH on topic 7i80db 7i77 + 7i76 serup Hal conf
in case the hal and ini files are needed
Please Log in or Create an account to join the conversation.
- GDTH
-
Topic Author
- Offline
- Junior Member
-
Less
More
- Posts: 29
- Thank you received: 2
19 Apr 2025 11:52 #326693
by GDTH
Replied by GDTH on topic 7i80db 7i77 + 7i76 serup Hal conf
do you mean this?
Please Log in or Create an account to join the conversation.
- tommylight
-
- Away
- Moderator
-
Less
More
- Posts: 20088
- Thank you received: 6836
19 Apr 2025 11:52 #326694
by tommylight
Replied by tommylight on topic 7i80db 7i77 + 7i76 serup Hal conf
Try setting all sserial to 000000 instead of 000xxx in the loadrt line, to many sserials enabled in the firmware so might be disabled with x.
Please Log in or Create an account to join the conversation.
- GDTH
-
Topic Author
- Offline
- Junior Member
-
Less
More
- Posts: 29
- Thank you received: 2
19 Apr 2025 11:54 #326695
by GDTH
Replied by GDTH on topic 7i80db 7i77 + 7i76 serup Hal conf
just did that, made no difference to how to hal conf looks like :?
Please Log in or Create an account to join the conversation.
Moderators: PCW, jmelson
Time to create page: 0.068 seconds