Bitfile or help – Mesa 6i25 + 7i74 (BiSS-C) + 8i20 + 7i70/7i87

i am not making any progress so let take a step back.
i use a bit file PIN_7I76_7I74BISS3D_34 With the biss signal assigned to a 7i74 plugged on the port P2 with the pin configuration :
        IOPortTag & x"00" & BISSTag  & BISSDataPin,             -- I/O 17    PIN 1
        IOPortTag & x"01" & BISSTag  & BISSDataPin,             -- I/O 18    PIN 14
        IOPortTag & x"02" & BISSTag  & BISSDataPin,             -- I/O 19    PIN 2
        IOPortTag & x"00" & NullTag & x"00",                    -- I/O 20    PIN 15
        IOPortTag & x"00" & BISSTag  & BISSClkPin,            -- I/O 21    PIN 3
        IOPortTag & x"01" & BISSTag  & BISSClkPin,            -- I/O 22    PIN 16
        IOPortTag & x"02" & BISSTag  & BISSClkPin,            -- I/O 23    PIN 4
I dont understand yet why we have 3 pin for data and 3 for clock but its fine.

the objective now is to get the system to produce at least a clock. with the cnc project running i tried to locate where the clock where available but nothing. I tested each port rj45 on my 7i74 and even the pin from the cable between my two card and nothing relevant. i got power (5v) some signal but no clock. do i need a command in hal/init /bit/god? to indicate that the signal should be active?

i found it i got my clock.
i needed this two line:
setp hm2_5i25.0.biss.00.timer-number 1
setp hm2_5i25.0.biss.00.frequency-khz 8000.
i just want to know if it is ok to have 10 volt of amplitude between -5 clk- and +5 clk+ with spike to -10 +10 v? seem a bit much for a clock, WIll test other cable i may have made a mistake here.

There are 3 clocks because there are 3 BISS channels in that configuration

in addition you mast set the DPLL timer so that the BISS read completes before the nominal read time
something like:

setp hm2_5i25.0.dpll.01.timer-us -200

The 7I74 only outputs 5V signals so no 10V signal is possible other than
perhaps overshoot on an unterminated line.

The outputs swing from ground to +5V, so If you measure between
outputs, you could read +5V or -5V depending on the output state.

 

alright i got my encoder biss running! i started to assemble all cards and i wanted to know if it is possible to have both a biss signal on a port and a normal serial on the other port on a single 7i74?
if it is not possible i will use another solution but if it is a possibility I'll need a different bitfile.
my configuration is :
6i25
P3 =>7i76
->spindle -> variator - > motor
->field out 0 7 -> 4contactor
->field in 0 15
P2 =>7i74
-> biss
-> 7i87
-> 8i20

There are no constraints on HostMot2 FPGA pins, any pin can be any function
so a 7I74 ( 8 channel RS-422/-RS-485 interface) can have any mix of functions
that physically match the 7I74 pinout. That is, for example, you could have
SSI,BISS,Fanuc absolute encoders are sserial mixed on the same 7I74.
You could even have Step/Dir outputs on output channels and say period
measurement on input channels.

Ok so before i am breaking everything do i need something else apart for the hostmot2-firmware/tree/master from the git in order to compile a framework?

In the first file that you send to me PCW you added 4biss chanel insted of 3 and "IOPortTag & x"03" & BISSTag & BISSClkEnPin, -- I/O 16 PIN 13"
i was curious about this line?

I was going for a conf like that for 7i76_7i74biss3d depending on that this line does.

use work.IDROMConst.all;

package PIN_7I76_7I74BISS3D_34 is
constant ModuleID : ModuleIDType :=(
(HM2DPLLTag, x"00", ClockLowTag, x"01", HM2DPLLBaseRateAddr&PadT, HM2DPLLNumRegs, x"00", HM2DPLLMPBitMask),
(WatchDogTag, x"00", ClockLowTag, x"01", WatchDogTimeAddr&PadT, WatchDogNumRegs, x"00", WatchDogMPBitMask),
(IOPortTag, x"00", ClockLowTag, x"02", PortAddr&PadT, IOPortNumRegs, x"00", IOPortMPBitMask),
(BISSTag, x"00", ClockHighTag, x"03", BISSDataAddr&PadT, BISSNumRegs, x"00", BISSMPBitMask),
(QcountTag, x"02", ClockLowTag, x"01", QcounterAddr&PadT, QCounterNumRegs, x"00", QCounterMPBitMask),
(SSerialTag, x"00", ClockLowTag, x"01", SSerialCommandAddr&PadT, SSerialNumRegs, x"10", SSerialMPBitMask),
(StepGenTag, x"02", ClockLowTag, x"05", StepGenRateAddr&PadT, StepGenNumRegs, x"00", StepGenMPBitMask),
(LEDTag, x"00", ClockLowTag, x"01", LEDAddr&PadT, LEDNumRegs, x"00", LEDMPBitMask),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000")
);


constant PinDesc : PinDescType :=(
-- Base func sec unit sec func sec pin -- external DB25
IOPortTag & x"00" & StepGenTag & StepGenDirPin, -- I/O 00 PIN 1
IOPortTag & x"00" & StepGenTag & StepGenStepPin, -- I/O 01 PIN 14
IOPortTag & x"01" & StepGenTag & StepGenDirPin, -- I/O 02 PIN 2
IOPortTag & x"01" & StepGenTag & StepGenStepPin, -- I/O 03 PIN 15
IOPortTag & x"02" & StepGenTag & StepGenDirPin, -- I/O 04 PIN 3
IOPortTag & x"02" & StepGenTag & StepGenStepPin, -- I/O 05 PIN 16
IOPortTag & x"03" & StepGenTag & StepGenDirPin, -- I/O 06 PIN 4
IOPortTag & x"03" & StepGenTag & StepGenStepPin, -- I/O 07 PIN 17
IOPortTag & x"04" & StepGenTag & StepGenDirPin, -- I/O 08 PIN 5
IOPortTag & x"04" & StepGenTag & StepGenStepPin, -- I/O 09 PIN 6
IOPortTag & x"00" & SSerialTag & SSerialTX0Pin, -- I/O 10 PIN 7
IOPortTag & x"00" & SSerialTag & SSerialRX0Pin, -- I/O 11 PIN 8
IOPortTag & x"00" & SSerialTag & SSerialTX1Pin, -- I/O 12 PIN 9
IOPortTag & x"00" & SSerialTag & SSerialRX1Pin, -- I/O 13 PIN 10
IOPortTag & x"00" & QCountTag & x"03", -- I/O 14 PIN 11
IOPortTag & x"00" & QCountTag & x"02", -- I/O 15 PIN 12
IOPortTag & x"00" & QCountTag & x"01", -- I/O 16 PIN 13

-- 26 HDR -- IDC DB25
IOPortTag & x"00" & BISSTag & BISSDataPin, -- I/O 17 PIN 1
IOPortTag & x"01" & BISSTag & BISSDataPin, -- I/O 18 PIN 14
IOPortTag & x"02" & BISSTag & BISSDataPin, -- I/O 19 PIN 2
IOPortTag & x"01" & SSerialTag & SSerialRX3Pin, -- I/O 03 PIN 15
IOPortTag & x"00" & BISSTag & BISSClkPin, -- I/O 21 PIN 3
IOPortTag & x"01" & BISSTag & BISSClkPin, -- I/O 22 PIN 16
IOPortTag & x"02" & BISSTag & BISSClkPin, -- I/O 23 PIN 4
IOPortTag & x"01" & SSerialTag & SSerialTX3Pin, -- I/O 07 PIN 17
IOPortTag & x"01" & SSerialTag & SSerialRX4Pin, -- I/O 08 PIN 5
IOPortTag & x"01" & SSerialTag & SSerialRX5Pin, -- I/O 09 PIN 6
IOPortTag & x"01" & SSerialTag & SSerialRX6Pin, -- I/O 10 PIN 7
IOPortTag & x"01" & SSerialTag & SSerialRX7Pin, -- I/O 11 PIN 8
IOPortTag & x"01" & SSerialTag & SSerialTX4Pin, -- I/O 12 PIN 9
IOPortTag & x"01" & SSerialTag & SSerialTX5Pin, -- I/O 13 PIN 10
IOPortTag & x"01" & SSerialTag & SSerialTX6Pin, -- I/O 14 PIN 11
IOPortTag & x"01" & SSerialTag & SSerialTX7Pin, -- I/O 15 PIN 12
IOPortTag & x"01" & SSerialTag & SSerialTXEn7Pin, -- I/O 16 PIN 13

also i have issues accessing the analog and spindle part, don't know if it is linked to the framework or something else.