Mesa 5i25 and 7i76

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finemeca
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14 Jun 2016 08:43 #75967 by finemeca

Mesa 5i25 and 7i76 was created by finemeca

Hello,
I'm testing with a mesa 5i25 and 7i76

I flashed with the command:

sudo mesaflash --device 5I25 --write 5i25_7i76x2.bit

Control :

sudo mesaflash --device 5I25 --verify 5i25_7i76x2.bit

tour-mondial@tour-mondial:~/Téléchargements/5i25/configs/hostmot2$ sudo mesaflash --device 5I25 --verify 5i25_7i76x2.bit
Checking file... OK
File type: BIT file
Boot sector OK
Verifying EEPROM sectors starting from 0x100000...
|VVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVV
Board configuration verified successfully.

The CR1 and CR2 LEDs are illuminated

mesa 5i25 card:

W1 - UP
W2 - UP

mesa 7i76 card:

W2 - left --> power pc db 25
W1 - right--> power 24v ext

I run the command:

halrun
halcmd: loadrt threads name1=th period1=1000000
halcmd: loadrt hostmot2
halcmd: loadrt hm2_pci
halcmd: addf hm2_5i25.0.pet_watchdog th
HAL:[b] ERROR: function 'hm2_5i25.0.pet_watchdog' not found[/b]
<stdin>:4: addf failed
halcmd: addf hm2_5i25.0.read th
halcmd: addf hm2_5i25.0.write th
halcmd: start
halcmd: setp hm2_5i25.0.7i76.0.0.output-07 true
<[b]stdin>:8: parameter or pin 'hm2_5i25.0.7i76.0.0.output-07' not found[/b]

What is going on ????

A flashing problem ????

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andypugh
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14 Jun 2016 11:07 #75985 by andypugh

Replied by andypugh on topic Mesa 5i25 and 7i76

You no longer need to pet the watchdog, it is now self-petting through the write thread.

Try the sequence again, but try "show pin" to get a list of the pins.

The likely problem is that the GPIO system is powered by the field power. With no field power to the GPIO section those pins won't be enumerated.

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finemeca
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14 Jun 2016 11:32 #75991 by finemeca

Replied by finemeca on topic Mesa 5i25 and 7i76

Hello Andy,

Thank you for your help.

I do :

halcmd:  loadrt threads name1=th period1=1000000
halcmd: loadrt hostmot2
halcmd: loadrt hm2_pci
halcmd: show pin

Here's the answer :

No reference to 7i76 card
Why there are 24 V or 17.6v to terminal TB5 and TB6 ???

Warning: Spoiler!

Component Pins:
Owner Type Dir Value Name
7 s32 OUT 0 hm2_5i25.0.encoder.00.count
7 s32 OUT 0 hm2_5i25.0.encoder.00.count-latched
7 bit I/O FALSE hm2_5i25.0.encoder.00.index-enable
7 bit OUT FALSE hm2_5i25.0.encoder.00.input-a
7 bit OUT FALSE hm2_5i25.0.encoder.00.input-b
7 bit OUT FALSE hm2_5i25.0.encoder.00.input-index
7 bit IN FALSE hm2_5i25.0.encoder.00.latch-enable
7 bit IN FALSE hm2_5i25.0.encoder.00.latch-polarity
7 float OUT 0 hm2_5i25.0.encoder.00.position
7 float OUT 0 hm2_5i25.0.encoder.00.position-latched
7 bit OUT FALSE hm2_5i25.0.encoder.00.quad-error
7 bit IN FALSE hm2_5i25.0.encoder.00.quad-error-enable
7 s32 OUT 0 hm2_5i25.0.encoder.00.rawcounts
7 s32 OUT 0 hm2_5i25.0.encoder.00.rawlatch
7 bit IN FALSE hm2_5i25.0.encoder.00.reset
7 float OUT 0 hm2_5i25.0.encoder.00.velocity
7 s32 OUT 0 hm2_5i25.0.encoder.01.count
7 s32 OUT 0 hm2_5i25.0.encoder.01.count-latched
7 bit I/O FALSE hm2_5i25.0.encoder.01.index-enable
7 bit OUT TRUE hm2_5i25.0.encoder.01.input-a
7 bit OUT TRUE hm2_5i25.0.encoder.01.input-b
7 bit OUT FALSE hm2_5i25.0.encoder.01.input-index
7 bit IN FALSE hm2_5i25.0.encoder.01.latch-enable
7 bit IN FALSE hm2_5i25.0.encoder.01.latch-polarity
7 float OUT 0 hm2_5i25.0.encoder.01.position
7 float OUT 0 hm2_5i25.0.encoder.01.position-latched
7 bit OUT FALSE hm2_5i25.0.encoder.01.quad-error
7 bit IN FALSE hm2_5i25.0.encoder.01.quad-error-enable
7 s32 OUT 0 hm2_5i25.0.encoder.01.rawcounts
7 s32 OUT 0 hm2_5i25.0.encoder.01.rawlatch
7 bit IN FALSE hm2_5i25.0.encoder.01.reset
7 float OUT 0 hm2_5i25.0.encoder.01.velocity
7 u32 IN 0x00001FC8 hm2_5i25.0.encoder.sample-frequency
7 bit OUT FALSE hm2_5i25.0.gpio.000.in
7 bit OUT TRUE hm2_5i25.0.gpio.000.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.001.in
7 bit OUT TRUE hm2_5i25.0.gpio.001.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.002.in
7 bit OUT TRUE hm2_5i25.0.gpio.002.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.003.in
7 bit OUT TRUE hm2_5i25.0.gpio.003.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.004.in
7 bit OUT TRUE hm2_5i25.0.gpio.004.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.005.in
7 bit OUT TRUE hm2_5i25.0.gpio.005.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.006.in
7 bit OUT TRUE hm2_5i25.0.gpio.006.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.007.in
7 bit OUT TRUE hm2_5i25.0.gpio.007.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.008.in
7 bit OUT TRUE hm2_5i25.0.gpio.008.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.009.in
7 bit OUT TRUE hm2_5i25.0.gpio.009.in_not
7 bit OUT TRUE hm2_5i25.0.gpio.010.in
7 bit OUT FALSE hm2_5i25.0.gpio.010.in_not
7 bit IN FALSE hm2_5i25.0.gpio.010.out
7 bit OUT FALSE hm2_5i25.0.gpio.011.in
7 bit OUT TRUE hm2_5i25.0.gpio.011.in_not
7 bit IN FALSE hm2_5i25.0.gpio.011.out
7 bit OUT TRUE hm2_5i25.0.gpio.012.in
7 bit OUT FALSE hm2_5i25.0.gpio.012.in_not
7 bit IN FALSE hm2_5i25.0.gpio.012.out
7 bit OUT TRUE hm2_5i25.0.gpio.013.in
7 bit OUT FALSE hm2_5i25.0.gpio.013.in_not
7 bit IN FALSE hm2_5i25.0.gpio.013.out
7 bit OUT TRUE hm2_5i25.0.gpio.014.in
7 bit OUT FALSE hm2_5i25.0.gpio.014.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.015.in
7 bit OUT TRUE hm2_5i25.0.gpio.015.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.016.in
7 bit OUT TRUE hm2_5i25.0.gpio.016.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.017.in
7 bit OUT TRUE hm2_5i25.0.gpio.017.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.018.in
7 bit OUT TRUE hm2_5i25.0.gpio.018.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.019.in
7 bit OUT TRUE hm2_5i25.0.gpio.019.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.020.in
7 bit OUT TRUE hm2_5i25.0.gpio.020.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.021.in
7 bit OUT TRUE hm2_5i25.0.gpio.021.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.022.in
7 bit OUT TRUE hm2_5i25.0.gpio.022.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.023.in
7 bit OUT TRUE hm2_5i25.0.gpio.023.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.024.in
7 bit OUT TRUE hm2_5i25.0.gpio.024.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.025.in
7 bit OUT TRUE hm2_5i25.0.gpio.025.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.026.in
7 bit OUT TRUE hm2_5i25.0.gpio.026.in_not
7 bit OUT TRUE hm2_5i25.0.gpio.027.in
7 bit OUT FALSE hm2_5i25.0.gpio.027.in_not
7 bit IN FALSE hm2_5i25.0.gpio.027.out
7 bit OUT TRUE hm2_5i25.0.gpio.028.in
7 bit OUT FALSE hm2_5i25.0.gpio.028.in_not
7 bit IN FALSE hm2_5i25.0.gpio.028.out
7 bit OUT TRUE hm2_5i25.0.gpio.029.in
7 bit OUT FALSE hm2_5i25.0.gpio.029.in_not
7 bit IN FALSE hm2_5i25.0.gpio.029.out
7 bit OUT TRUE hm2_5i25.0.gpio.030.in
7 bit OUT FALSE hm2_5i25.0.gpio.030.in_not
7 bit IN FALSE hm2_5i25.0.gpio.030.out
7 bit OUT TRUE hm2_5i25.0.gpio.031.in
7 bit OUT FALSE hm2_5i25.0.gpio.031.in_not
7 bit OUT TRUE hm2_5i25.0.gpio.032.in
7 bit OUT FALSE hm2_5i25.0.gpio.032.in_not
7 bit OUT TRUE hm2_5i25.0.gpio.033.in
7 bit OUT FALSE hm2_5i25.0.gpio.033.in_not
7 bit IN FALSE hm2_5i25.0.led.CR01
7 bit IN FALSE hm2_5i25.0.led.CR02
7 s32 OUT 0 hm2_5i25.0.read.time
7 s32 OUT 0 hm2_5i25.0.read_gpio.time
7 bit IN FALSE hm2_5i25.0.stepgen.00.control-type
7 s32 OUT 0 hm2_5i25.0.stepgen.00.counts
7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.00.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.00.enable
7 float IN 0 hm2_5i25.0.stepgen.00.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.00.position-fb
7 float IN 0 hm2_5i25.0.stepgen.00.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.00.velocity-fb
7 bit IN FALSE hm2_5i25.0.stepgen.01.control-type
7 s32 OUT 0 hm2_5i25.0.stepgen.01.counts
7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.01.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.01.enable
7 float IN 0 hm2_5i25.0.stepgen.01.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.01.position-fb
7 float IN 0 hm2_5i25.0.stepgen.01.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.01.velocity-fb
7 bit IN FALSE hm2_5i25.0.stepgen.02.control-type
7 s32 OUT 0 hm2_5i25.0.stepgen.02.counts
7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.02.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.02.enable
7 float IN 0 hm2_5i25.0.stepgen.02.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.02.position-fb
7 float IN 0 hm2_5i25.0.stepgen.02.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.02.velocity-fb
7 bit IN FALSE hm2_5i25.0.stepgen.03.control-type
7 s32 OUT 0 hm2_5i25.0.stepgen.03.counts
7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.03.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.03.enable
7 float IN 0 hm2_5i25.0.stepgen.03.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.03.position-fb
7 float IN 0 hm2_5i25.0.stepgen.03.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.03.velocity-fb
7 bit IN FALSE hm2_5i25.0.stepgen.04.control-type
7 s32 OUT 0 hm2_5i25.0.stepgen.04.counts
7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.04.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.04.enable
7 float IN 0 hm2_5i25.0.stepgen.04.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.04.position-fb
7 float IN 0 hm2_5i25.0.stepgen.04.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.04.velocity-fb
7 bit IN FALSE hm2_5i25.0.stepgen.05.control-type
7 s32 OUT 0 hm2_5i25.0.stepgen.05.counts
7 float OUT 0 hm2_5i25.0.stepgen.05.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.05.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.05.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.05.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.05.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.05.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.05.enable
7 float IN 0 hm2_5i25.0.stepgen.05.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.05.position-fb
7 float IN 0 hm2_5i25.0.stepgen.05.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.05.velocity-fb
7 bit IN FALSE hm2_5i25.0.stepgen.06.control-type
7 s32 OUT 0 hm2_5i25.0.stepgen.06.counts
7 float OUT 0 hm2_5i25.0.stepgen.06.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.06.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.06.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.06.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.06.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.06.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.06.enable
7 float IN 0 hm2_5i25.0.stepgen.06.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.06.position-fb
7 float IN 0 hm2_5i25.0.stepgen.06.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.06.velocity-fb
7 bit IN FALSE hm2_5i25.0.stepgen.07.control-type
7 s32 OUT 0 hm2_5i25.0.stepgen.07.counts
7 float OUT 0 hm2_5i25.0.stepgen.07.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.07.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.07.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.07.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.07.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.07.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.07.enable
7 float IN 0 hm2_5i25.0.stepgen.07.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.07.position-fb
7 float IN 0 hm2_5i25.0.stepgen.07.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.07.velocity-fb
7 bit IN FALSE hm2_5i25.0.stepgen.08.control-type
7 s32 OUT 0 hm2_5i25.0.stepgen.08.counts
7 float OUT 0 hm2_5i25.0.stepgen.08.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.08.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.08.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.08.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.08.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.08.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.08.enable
7 float IN 0 hm2_5i25.0.stepgen.08.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.08.position-fb
7 float IN 0 hm2_5i25.0.stepgen.08.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.08.velocity-fb
7 bit IN FALSE hm2_5i25.0.stepgen.09.control-type
7 s32 OUT 0 hm2_5i25.0.stepgen.09.counts
7 float OUT 0 hm2_5i25.0.stepgen.09.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.09.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.09.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.09.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.09.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.09.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.09.enable
7 float IN 0 hm2_5i25.0.stepgen.09.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.09.position-fb
7 float IN 0 hm2_5i25.0.stepgen.09.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.09.velocity-fb
7 bit I/O FALSE hm2_5i25.0.watchdog.has_bit
7 s32 OUT 0 hm2_5i25.0.write.time
7 s32 OUT 0 hm2_5i25.0.write_gpio.time
5 s32 OUT 0 th.time

halcmd:

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andypugh
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Moderator

14 Jun 2016 11:53 #75995 by andypugh

Replied by andypugh on topic Mesa 5i25 and 7i76

finemeca wrote:
Why there are 24 V or 17.6v to terminal TB5 and TB6 ???

You need to wire TB1 to the power supply. (correctly, and carefully).
See page 10 of www.mesanet.com/pdf/parallel/7i76man.pdf
To be absolutely sure you have the correct polarity, pin 1 has a square solder pad.
You don't need to connect all VFIELD, they are commoned on the board.

Look also at the W1 setting and VIN power source paragraph on Page 2.

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finemeca
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14 Jun 2016 12:17 #75998 by finemeca

Replied by finemeca on topic Mesa 5i25 and 7i76

I attach a photo of the card.

The black wire is ground TB1
Red is the + 24v

Can there be a malfunction of the card ???

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andypugh
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14 Jun 2016 12:43 #76000 by andypugh

Replied by andypugh on topic Mesa 5i25 and 7i76

You could try it with jumper W1 to the left.

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PCW
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Moderator

14 Jun 2016 13:09 #76004 by PCW

Replied by PCW on topic Mesa 5i25 and 7i76

Right, unless you have separate VIN and VFIELD, W1 must be in the left hand position

Also, if the 5I25 firmware needed updating (if you got the cards as a set, this is not necessary)
you need to power cycle the PC to load the new firmware, or use mesaflash's --reload command:

sudo mesaflash --device 5i25 --reload

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finemeca
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14 Jun 2016 13:36 #76009 by finemeca

Replied by finemeca on topic Mesa 5i25 and 7i76

Wow, does it work.

I second flight the example here:

softsolder.com/?s=mesa

Andy thank you et PCW.

English is not my Maternal language.
Not easy to understand the mesa system.
After my tests, I'll be ok

I surely will come back later to ask more questions

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Mesa 5i25 and 7i76

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