RPI4 + 7C81 + DMB4250-8B BreakOut Board
01 Mar 2021 00:04 #200487
by cmorley
Replied by cmorley on topic RPI4 + 7C81 + DMB4250-8B BreakOut Board
hmm that doesn't look like the usual --readhmid output.
Pncconf can try to piece together internal data from a --readhmid --sserial output.
Pncconf can try to piece together internal data from a --readhmid --sserial output.
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01 Mar 2021 00:22 - 01 Mar 2021 00:24 #200489
by PCW
Replied by PCW on topic RPI4 + 7C81 + DMB4250-8B BreakOut Board
That's the hm2 driver startup output
If the OP doesn't post a pinout file, I can do it tomorrow
(don't have a 7C81 or RPI at home, and stopping by work
this close to dinner time was vetoed by the boss)
If the OP doesn't post a pinout file, I can do it tomorrow
(don't have a 7C81 or RPI at home, and stopping by work
this close to dinner time was vetoed by the boss)
Last edit: 01 Mar 2021 00:24 by PCW.
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01 Mar 2021 00:32 #200491
by cmorley
Replied by cmorley on topic RPI4 + 7C81 + DMB4250-8B BreakOut Board
Happy wife - happy life!
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01 Mar 2021 06:04 #200507
by brianvg
Replied by brianvg on topic RPI4 + 7C81 + DMB4250-8B BreakOut Board
Here is what I get with the --readhmid command:
mesaflash --device 7C81 --spi --addr /dev/spidev0.0 --readhmid
unable to set bpw32, fallback to bpw8
Configuration Name: HOSTMOT2
General configuration information:
BoardName : MESA7C81
FPGA Size: 9 KGates
FPGA Pins: 144
Number of IO Ports: 3
Width of one I/O port: 19
Clock Low frequency: 100.0000 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256
Modules in configuration:
Module: DPLL
There are 1 of DPLL in configuration
Version: 0
Registers: 7
BaseAddress: 7000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: IOPort
There are 3 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: QCount
There are 2 of QCount in configuration
Version: 2
Registers: 5
BaseAddress: 3000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: SSerial
There are 1 of SSerial in configuration
Version: 0
Registers: 6
BaseAddress: 5B00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 64 bytes
Module: StepGen
There are 8 of StepGen in configuration
Version: 2
Registers: 10
BaseAddress: 2000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: PWM
There are 2 of PWM in configuration
Version: 0
Registers: 5
BaseAddress: 4100
ClockFrequency: 200.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Configuration pin-out:
IO Connections for P1+Serial
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
0 0 IOPort PWM 0 PWM (Out)
0 1 IOPort None
0 2 IOPort StepGen 0 Dir/Table2 (Out)
0 3 IOPort None
0 4 IOPort StepGen 0 Step/Table1 (Out)
0 5 IOPort None
0 6 IOPort StepGen 1 Dir/Table2 (Out)
0 7 IOPort None
0 8 IOPort StepGen 1 Step/Table1 (Out)
0 9 IOPort StepGen 2 Dir/Table2 (Out)
0 10 IOPort StepGen 2 Step/Table1 (Out)
0 11 IOPort StepGen 3 Dir/Table2 (Out)
0 12 IOPort StepGen 3 Step/Table1 (Out)
0 13 IOPort None
0 14 IOPort QCount 0 Quad-A (In)
0 15 IOPort QCount 0 Quad-B (In)
0 16 IOPort QCount 0 Quad-IDX (In)
0 17 IOPort SSerial 0 TXData0 (Out)
0 18 IOPort SSerial 0 TXData1 (Out)
IO Connections for P2+Serial
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
0 19 IOPort PWM 1 PWM (Out)
0 20 IOPort None
0 21 IOPort StepGen 4 Dir/Table2 (Out)
0 22 IOPort None
0 23 IOPort StepGen 4 Step/Table1 (Out)
0 24 IOPort None
0 25 IOPort StepGen 5 Dir/Table2 (Out)
0 26 IOPort None
0 27 IOPort StepGen 5 Step/Table1 (Out)
0 28 IOPort StepGen 6 Dir/Table2 (Out)
0 29 IOPort StepGen 6 Step/Table1 (Out)
0 30 IOPort StepGen 7 Dir/Table2 (Out)
0 31 IOPort StepGen 7 Step/Table1 (Out)
0 32 IOPort None
0 33 IOPort QCount 1 Quad-A (In)
0 34 IOPort QCount 1 Quad-B (In)
0 35 IOPort QCount 1 Quad-IDX (In)
0 36 IOPort SSerial 0 TXEn0 (Out)
0 37 IOPort SSerial 0 TXEn1 (Out)
IO Connections for P7+Serial
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
0 38 IOPort None
0 39 IOPort None
0 40 IOPort None
0 41 IOPort None
0 42 IOPort None
0 43 IOPort None
0 44 IOPort None
0 45 IOPort None
0 46 IOPort None
0 47 IOPort None
0 48 IOPort None
0 49 IOPort None
0 50 IOPort None
0 51 IOPort None
0 52 IOPort None
0 53 IOPort None
0 54 IOPort None
0 55 IOPort SSerial 0 RXData0 (In)
0 56 IOPort SSerial 0 RXData1 (In)Please Log in or Create an account to join the conversation.
01 Mar 2021 14:31 #200695
by PCW
Replied by PCW on topic RPI4 + 7C81 + DMB4250-8B BreakOut Board
If you update mesaflash to the latest, it should print out the DB25 pin numbers in the first column.
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01 Mar 2021 14:49 #200699
by brianvg
Replied by brianvg on topic RPI4 + 7C81 + DMB4250-8B BreakOut Board
Ok, checked out the repo and built it, then it produces this output:
Which looks very much like what I expect. I suppose I will need to generate the configuration, and then besides changing the board name and the command, I will need to also change the pin mappings after I run through pncconf. Still not really sure what I need to enter and where in pncconf.
Thanks,
Brian
./mesaflash --device 7C81 --spi --addr /dev/spidev0.0 --readhmid
unable to set bpw32, fallback to bpw8
Configuration Name: HOSTMOT2
General configuration information:
BoardName : MESA7C81
FPGA Size: 9 KGates
FPGA Pins: 144
Number of IO Ports: 3
Width of one I/O port: 19
Clock Low frequency: 100.0000 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256
Modules in configuration:
Module: DPLL
There are 1 of DPLL in configuration
Version: 0
Registers: 7
BaseAddress: 7000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: IOPort
There are 3 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: QCount
There are 2 of QCount in configuration
Version: 2
Registers: 5
BaseAddress: 3000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: SSerial
There are 1 of SSerial in configuration
Version: 0
Registers: 6
BaseAddress: 5B00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 64 bytes
Module: StepGen
There are 8 of StepGen in configuration
Version: 2
Registers: 10
BaseAddress: 2000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: PWM
There are 2 of PWM in configuration
Version: 0
Registers: 5
BaseAddress: 4100
ClockFrequency: 200.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Configuration pin-out:
IO Connections for P1+Serial
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
P1 1 0 IOPort PWM 0 PWM (Out)
P1 14 1 IOPort None
P1 2 2 IOPort StepGen 0 Dir/Table2 (Out)
P1 15 3 IOPort None
P1 3 4 IOPort StepGen 0 Step/Table1 (Out)
P1 16 5 IOPort None
P1 4 6 IOPort StepGen 1 Dir/Table2 (Out)
P1 17 7 IOPort None
P1 5 8 IOPort StepGen 1 Step/Table1 (Out)
P1 6 9 IOPort StepGen 2 Dir/Table2 (Out)
P1 7 10 IOPort StepGen 2 Step/Table1 (Out)
P1 8 11 IOPort StepGen 3 Dir/Table2 (Out)
P1 9 12 IOPort StepGen 3 Step/Table1 (Out)
P1 10 13 IOPort None
P1 11 14 IOPort QCount 0 Quad-A (In)
P1 12 15 IOPort QCount 0 Quad-B (In)
P1 13 16 IOPort QCount 0 Quad-IDX (In)
P5 3,6 17 IOPort SSerial 0 TXData0 (Out)
P6 3,6 18 IOPort SSerial 0 TXData1 (Out)
IO Connections for P2+Serial
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
P2 1 19 IOPort PWM 1 PWM (Out)
P2 14 20 IOPort None
P2 2 21 IOPort StepGen 4 Dir/Table2 (Out)
P2 15 22 IOPort None
P2 3 23 IOPort StepGen 4 Step/Table1 (Out)
P2 16 24 IOPort None
P2 4 25 IOPort StepGen 5 Dir/Table2 (Out)
P2 17 26 IOPort None
P2 5 27 IOPort StepGen 5 Step/Table1 (Out)
P2 6 28 IOPort StepGen 6 Dir/Table2 (Out)
P2 7 29 IOPort StepGen 6 Step/Table1 (Out)
P2 8 30 IOPort StepGen 7 Dir/Table2 (Out)
P2 9 31 IOPort StepGen 7 Step/Table1 (Out)
P2 10 32 IOPort None
P2 11 33 IOPort QCount 1 Quad-A (In)
P2 12 34 IOPort QCount 1 Quad-B (In)
P2 13 35 IOPort QCount 1 Quad-IDX (In)
P5 TXEN 36 IOPort SSerial 0 TXEn0 (Out)
P6 TXEN 37 IOPort SSerial 0 TXEn1 (Out)Which looks very much like what I expect. I suppose I will need to generate the configuration, and then besides changing the board name and the command, I will need to also change the pin mappings after I run through pncconf. Still not really sure what I need to enter and where in pncconf.
Thanks,
Brian
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