New to LinuxCNC - How to setup 6i25 with 7i77 and 7i76

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18 Jul 2021 15:49 #215230 by mloser
I have the 6i25, 7i77 and 7i76 hooked up with the Mesa cables and 5i25_7i77_7i76 firmware loaded.  I ran the PnCConf wizard and saved the configuration.  But when I run LinuxCNC, I receive an error message about a pin hm2_5i25.0.7i77.0.0.input-00
does not exist.  I am brand new to LinuxCNC, so I apologize if I'm not posting this correctly.  I configured both 7i77 and 7i76 to get field power from the 6i25, but neither  board has the "Field Power" LED illuminated.

 
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18 Jul 2021 19:48 #215246 by tommylight
7i77 and 7i76 can not get field power from 6i25, the get logic power from it.
Field power must be from 8 to 24V and is on a separate connector on each daughter card.
Please check the manual before wiring power to them.
Another thing to check:
mesaflash --device 5i25 --readhmid
post the output here and also pictures of the cards and where they are wired to the 6i25.

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18 Jul 2021 20:56 #215253 by PCW
Yes, the field power is applied to the orange connectors on the 7I77 and 7I76
This is completely separate from the logic side power

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18 Jul 2021 21:06 #215256 by tommylight
FYI, i have 2 of the 7i77 that came with green power connectors, everything else including 7i77 came with orange ones, bought about 3 years ago from www.eusurplus.com.
Hence why i did not mention color.

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19 Jul 2021 01:00 #215278 by PCW
Might be older, we changed from green to orange at least 6 years ago
The following user(s) said Thank You: tommylight

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20 Jul 2021 23:55 #215448 by mloser
Thank you! Once I got the field power and +5 hooked up, it looks good now.
debianrt@debianrt:/home/debianrt>sudo mesaflash --device 5i25 --readhmid
[sudo] password for debianrt:
Configuration Name: HOSTMOT2

General configuration information:

BoardName : MESA5I25
FPGA Size: 9 KGates
FPGA Pins: 144
Number of IO Ports: 2
Width of one I/O port: 17
Clock Low frequency: 33.3333 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256

Modules in configuration:

Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: IOPort
There are 2 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: MuxedQCount
There are 8 of MuxedQCount in configuration
Version: 3
Registers: 5
BaseAddress: 3600
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: MuxedQCountSel
There are 1 of MuxedQCountSel in configuration
Version: 0
Registers: 0
BaseAddress: 0000
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: SSerial
There are 1 of SSerial in configuration
Version: 0
Registers: 6
BaseAddress: 5B00
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 64 bytes

Module: StepGen
There are 5 of StepGen in configuration
Version: 2
Registers: 10
BaseAddress: 2000
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for P3
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

1 0 IOPort SSerial 0 TXEn2 (Out)
14 1 IOPort SSerial 0 TXData2 (Out)
2 2 IOPort SSerial 0 RXData2 (In)
15 3 IOPort SSerial 0 TXData1 (Out)
3 4 IOPort SSerial 0 RXData1 (In)
16 5 IOPort SSerial 0 TXData0 (Out)
4 6 IOPort SSerial 0 RXData0 (In)
17 7 IOPort MuxedQCountSel 0 MuxSel0 (Out)
5 8 IOPort MuxedQCount 0 MuxQ-A (In)
6 9 IOPort MuxedQCount 0 MuxQ-B (In)
7 10 IOPort MuxedQCount 0 MuxQ-IDX (In)
8 11 IOPort MuxedQCount 1 MuxQ-A (In)
9 12 IOPort MuxedQCount 1 MuxQ-B (In)
10 13 IOPort MuxedQCount 1 MuxQ-IDX (In)
11 14 IOPort MuxedQCount 2 MuxQ-A (In)
12 15 IOPort MuxedQCount 2 MuxQ-B (In)
13 16 IOPort MuxedQCount 2 MuxQ-IDX (In)

IO Connections for P2
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

1 17 IOPort StepGen 0 Dir/Table2 (Out)
14 18 IOPort StepGen 0 Step/Table1 (Out)
2 19 IOPort StepGen 1 Dir/Table2 (Out)
15 20 IOPort StepGen 1 Step/Table1 (Out)
3 21 IOPort StepGen 2 Dir/Table2 (Out)
16 22 IOPort StepGen 2 Step/Table1 (Out)
4 23 IOPort StepGen 3 Dir/Table2 (Out)
17 24 IOPort StepGen 3 Step/Table1 (Out)
5 25 IOPort StepGen 4 Dir/Table2 (Out)
6 26 IOPort StepGen 4 Step/Table1 (Out)
7 27 IOPort SSerial 0 TXData3 (Out)
8 28 IOPort SSerial 0 RXData3 (In)
9 29 IOPort SSerial 0 TXData4 (Out)
10 30 IOPort SSerial 0 RXData4 (In)
11 31 IOPort MuxedQCount 3 MuxQ-IDX (In)
12 32 IOPort MuxedQCount 3 MuxQ-B (In)
13 33 IOPort MuxedQCount 3 MuxQ-A (In)

debianrt@debianrt:/home/debianrt>

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20 Jul 2021 23:57 #215449 by mloser
Thanks, I was confused about the +5 coming from the 5i25, VIN and Field Power.
Now it makes sense.

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