5i25 & 7i85 new install

I had an old setup using a simple stepper board and wanted to upgrade to a Mesa card setup. I got a 5i25 / 7i25 bundle from Mesa but struggling to understand the install. Do I just use the Pconfig tool and get a basic setup and then edit the Hal file? I don't see a 7i85 in the list. Or did I make a mistake and get the wrong card bundle? 

A more common and supported card set would be a 5I25+7I76
Typically a 7I85 is added where encoder feedback to LinuxCNC is desired

Do you have a 7I85 or 7I85S?

(the plain 7I85 has no step/dir outputs)

It is the 7i85S, I got the cards about 6 months ago and just now getting around to getting it setup. I wish I would of got the 7i76 bundle as there is much more information about its setup. Being able to add encoders would be great but not a have too at this point. 

First get a list of all the pins and parameters that your setup creates.
At the command line:
Now you can create a config, but maybe lying about the card if pncconf doesn't know about the 7i85. A 7i76 config should be close.

I think that Pncconf uses INI substitution for the card name, so you probably mainly have to change the [HOSTMOT2]CARD in the INI to 7i85.

Then try loading the config, look at the error message, work out what the missing pin is really called, and iterate through the HAL file.

It's not exactly fun, but it is more tedious than difficult.

The card name would still be would still be "5i25"

I suspect choosing a simpler breakout with pncconf
(say a probrfx2) would make a file set that pretty close

I'm a bit overwhelmed, So let me see if I'm on the right track and/or understanding correctly. Also if this is documented somewhere. I'm happy to do some reading before asking newbie questions.

My brain is locked up on the following.
-Where do I put the wired into the 7i85s for step gen and dir for example
-In the hal file I think I ses where to map functions to a pins (not sure that is the correct term)

net estop-out => parport.0.pin-01-out
net xstep => parport.0.pin-02-out

I found another post about this setup.
mill@DESKTOP-MILL:~$ sudo mesaflash --device 5i25 --readhmid
Configuration Name: HOSTMOT2

General configuration information:

BoardName : MESA5I25
FPGA Size: 9 KGates
FPGA Pins: 144
Number of IO Ports: 2
Width of one I/O port: 17
Clock Low frequency: 33.3333 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256

Modules in configuration:

Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: IOPort
There are 2 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: MuxedQCount
There are 8 of MuxedQCount in configuration
Version: 3
Registers: 5
BaseAddress: 3600
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: MuxedQCountSel
There are 1 of MuxedQCountSel in configuration
Version: 0
Registers: 0
BaseAddress: 0000
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: SSerial
There are 1 of SSerial in configuration
Version: 0
Registers: 6
BaseAddress: 5B00
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 64 bytes

Module: StepGen
There are 8 of StepGen in configuration
Version: 2
Registers: 10
BaseAddress: 2000
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for P3
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

1 0 IOPort SSerial 0 RXData0 (In)
14 1 IOPort SSerial 0 TXData0 (Out)
2 2 IOPort StepGen 3 Step/Table1 (Out)
15 3 IOPort StepGen 3 Dir/Table2 (Out)
3 4 IOPort StepGen 2 Step/Table1 (Out)
16 5 IOPort StepGen 2 Dir/Table2 (Out)
4 6 IOPort StepGen 1 Step/Table1 (Out)
17 7 IOPort StepGen 1 Dir/Table2 (Out)
5 8 IOPort StepGen 0 Step/Table1 (Out)
6 9 IOPort StepGen 0 Dir/Table2 (Out)
7 10 IOPort MuxedQCountSel 0 MuxSel0 (Out)
8 11 IOPort MuxedQCount 0 MuxQ-A (In)
9 12 IOPort MuxedQCount 0 MuxQ-B (In)
10 13 IOPort MuxedQCount 0 MuxQ-IDX (In)
11 14 IOPort MuxedQCount 1 MuxQ-A (In)
12 15 IOPort MuxedQCount 1 MuxQ-B (In)
13 16 IOPort MuxedQCount 1 MuxQ-IDX (In)

IO Connections for P2
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

1 17 IOPort SSerial 0 RXData1 (In)
14 18 IOPort SSerial 0 TXData1 (Out)
2 19 IOPort StepGen 7 Step/Table1 (Out)
15 20 IOPort StepGen 7 Dir/Table2 (Out)
3 21 IOPort StepGen 6 Step/Table1 (Out)
16 22 IOPort StepGen 6 Dir/Table2 (Out)
4 23 IOPort StepGen 5 Step/Table1 (Out)
17 24 IOPort StepGen 5 Dir/Table2 (Out)
5 25 IOPort StepGen 4 Step/Table1 (Out)
6 26 IOPort StepGen 4 Dir/Table2 (Out)
7 27 IOPort MuxedQCountSel 4 MuxSel0 (Out)
8 28 IOPort MuxedQCount 2 MuxQ-A (In)
9 29 IOPort MuxedQCount 2 MuxQ-B (In)
10 30 IOPort MuxedQCount 2 MuxQ-IDX (In)
11 31 IOPort MuxedQCount 3 MuxQ-A (In)
12 32 IOPort MuxedQCount 3 MuxQ-B (In)
13 33 IOPort MuxedQCount 3 MuxQ-IDX (In)