How do PnCConf's Mesa Card 0 I/O tabs' pin numbers correspond to stepconf's?

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4 years 3 months ago - 4 years 2 months ago #248717 by clunc
I see that the question posed in the Subject: has been amply answered[1]. I don't want to pollute the thread more with further questions about my particular config.

I'll start another, probably by begging...

[1] It's, only, in the pinouts list generated by:
mesaflash --device <boardname> --readhmid
In PnCConf, three-digit numbers are GPIO numbers, one-digit numbers are channel numbers.
Last edit: 4 years 2 months ago by clunc.

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4 years 3 months ago #248718 by tommylight

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4 years 3 months ago - 4 years 3 months ago #248732 by PCW
As tommylight says, those pins (with secondary function=none)  can be outputs (or inputs)

Even pins that have a secondary function can be used as GPIO (either input or output) if the
secondary function is disabled in hal. For example, in the DMMBOB config, the encoder pins
(DB-25 pins 11,12,13) are available as inputs but if you disable the encoder in the hal file,
they become available as outputs also.

Basically all pins have GPIO capability (on all Mesa FPGA cards and all hostmot2 configurations).
If a pin has an _enabled_ secondary function the, GPIO capability of the pin is lost as the secondary
function takes control of the pin.

For example if you specified (num_stepgens=0 num_pwmgens=0 num_encoders=0) with the DMMBOB
configuration, all pins would revert to GPIO, with any pin be assignable as an input or output.
 
Last edit: 4 years 3 months ago by PCW.
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4 years 1 month ago - 4 years 1 month ago #250999 by clunc
I am returning to my quest to configure a new Mesa 6i25 (PCIe variant of Mesa 5i25) to work with my existing wiring, for which I have configuration information available in the .stepconf file. (I am constantly being batted from pillar to post--the latest distraction was dealing with 70-something locust tree I felled on one of my sheds while attempting to "protect" it from same... :eyeroll:) Each time I am able to return, I face another bout of "re-education." I am sorry for being so dense.

I flashed (and --reloaded) the 6i25 with 5i25_5ABOBx2.bit to get a PWM on pin1, and stepgen/dirs on 2/3, 4/5, 6/7, 8/9.

In PnCConf, I selected Board Name 5i25 and Firmware 5i25_5ABOBx2 and then set "Num of encoders, Num of pwm generators, Num of step generators" to "0,1,4" and Accepted Component Changes.

The original qd1212xyz.stepconf is attached. [TLDR: pin 1: spindle-pwm-inv pins 2/3: xstep-inv/xdir pins 4/5: ystep-inv/ydir pins 6/7: zstep-inv/zdir pins 8/9: astep-inv/adir pin 11: probe-in-inv pin 12: home-x-inv pin 13: home-y-inv pin 15: home-z-inv pin 17: spindle-enable]

(Of the attachments, lower-case names indicate the old, parport-/software-stepper configuration; UPPER-CASE signifies the new, Mesa-5i25/6i25 configuration.)

I have also attached the corresponding qd1212xyz.hal, from the same software-stepper approach, and QD1212XYZ.HAL, the .hal intended for the 6i25, edited to match, I hope, the pinouts found in qd1212xyz.hal.

I'm also attaching screenshots from PnCConf, showing the choices I made.

If anyone has time to comment, please do.  In particular, if you'll pardon my obsession with the topic, why is the information about which DB25 pins the step-generator signals occupy not shown in PnCConf? And why aren't some DB25 pins listed; for example, pins 11, 12, and 17, which I need for my setup? It bothers me that I'm changing pin assignments in .hal that are not listed in PnCConf.

(I am very fearful of blowing up the electronics in the CNC by mis-configuration, creating yet-another emergency, and one I might never live to see repaired. That is why I want very much to understand what I'm doing.)

Anyway, I'm happy to have this out there for you to look at, and I'm still grateful for all the help. Thank you. I will continue plodding.
 
Last edit: 4 years 1 month ago by clunc.

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4 years 1 month ago - 4 years 1 month ago #251003 by PCW
The numbers shown on pncconf (and in the hal file) are the GPIO or channel numbers,
not the DB25 numbers, so for example GPIO 7 corresponds to DB25 pin 17 and
GPIO 14,15 correspond to DB25 pins 11,12:

The numbers shown on pncconf (and in the hal file) are the GPIO or channel numbers,
not the DB25 numbers, so for example GPIO 7 corresponds to DB25 pin 17 and
GPIO 14,15 correspond to DB25 pins 11,12:

IO Connections for P3
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1      0   IOPort       PWMGen           0        PWM             (Out)
14      1   IOPort       None
 2      2   IOPort       StepGen          0        Step            (Out)
15      3   IOPort       None
 3      4   IOPort       StepGen          0        Dir             (Out)
16      5   IOPort       StepGen          8        Step            (Out)
 4      6   IOPort       StepGen          1        Step            (Out)
17      7   IOPort       StepGen          8        Dir             (Out)
 5      8   IOPort       StepGen          1        Dir             (Out)
 6      9   IOPort       StepGen          2        Step            (Out)
 7     10   IOPort       StepGen          2        Dir             (Out)
 8     11   IOPort       StepGen          3        Step            (Out)
 9     12   IOPort       StepGen          3        Dir             (Out)
10     13   IOPort       None
11     14   IOPort       QCount           0        Quad-A          (In)
12     15   IOPort       QCount           0        Quad-B          (In)
13     16   IOPort       QCount           0        Quad-IDX        (In)

 
Last edit: 4 years 1 month ago by PCW.

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4 years 1 month ago - 4 years 1 month ago #251098 by clunc
The numbers shown on pncconf (and in the hal file) are the GPIO or channel numbers,
not the DB25 numbers, so for example GPIO 7 corresponds to DB25 pin 17 and
GPIO 14,15 correspond to DB25 pins 11,12:

The numbers shown on pncconf (and in the hal file) are the GPIO or channel numbers,
not the DB25 numbers, so for example GPIO 7 corresponds to DB25 pin 17 and
GPIO 14,15 correspond to DB25 pins 11,12:



IO Connections for P3
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1      0   IOPort       PWMGen           0        PWM             (Out)
14      1   IOPort       None
 2      2   IOPort       StepGen          0        Step            (Out)
15      3   IOPort       None
 3      4   IOPort       StepGen          0        Dir             (Out)
16      5   IOPort       StepGen          8        Step            (Out)
 4      6   IOPort       StepGen          1        Step            (Out)
17      7   IOPort       StepGen          8        Dir             (Out)
 5      8   IOPort       StepGen          1        Dir             (Out)
 6      9   IOPort       StepGen          2        Step            (Out)
 7     10   IOPort       StepGen          2        Dir             (Out)
 8     11   IOPort       StepGen          3        Step            (Out)
 9     12   IOPort       StepGen          3        Dir             (Out)
10     13   IOPort       None
11     14   IOPort       QCount           0        Quad-A          (In)
12     15   IOPort       QCount           0        Quad-B          (In)
13     16   IOPort       QCount           0        Quad-IDX        (In) 

I believe I have it now. [EDIT: I almost had it--see EDITs]

The answer to the original question:
"Q. How do PnConf's Mesa Card 0 I/O tabs' pin numbers correspond to stepconf's?"
"A. It depends."
  • "It depends on what firmware has been flashed into the Mesa card, and reloaded, and what pin information is in the .hal file."
  • "mesaflash --readhmid --device <cardtype> (in .pin file format) will show how GPIO numbers (in the 'I/O' column of the .pin file) correspond to the DB25 pins (the 'Pin#' column). [the core answer]"
  • "The .hal file, typically initially created by newusers with PnCConf, can be edited to change the DB25 pin numbers ('pin#') to which inputs or outputs have been/will be assigned." b]EDIT:[/b] [b][i]GPIO numbers[/i][/b
  • "The lines-of-interest to be changed look like, for example, 'net probe-in     <=  hm2_5i25.0.gpio.011.in'."
  • "Unfortunately, the lines contain the word 'gpio' although the number is a DB25 'pin#'." [EDIT: Wrong. Numbers in lines like that are, always, and only, GPIO numbers. Edit carefully accordingly.]
  • "Another line of particular interest--'loadrt hm2_pci config=" num_encoders=0 num_pwmgens=1 num_stepgens=4"'--determines when more 'gpio' pins are available when they are freed from use for encoders, stepgens, etc."
  • "In the .pin file listing above for example, 'pin#-I/O' 11-14, 12-15, and 13-16 will be available to be assigned as input or output pins in the .hal file IF 'num_encoders=0' is also specified therein."
From the .pin file listing above, and my .hal file previously attached then, the DB25 pinout will be,
sorted by DB25 pin#: [EDIT: It's okay to sort by DB25 pin#, BUT the numbers to focus on are the GPIO#s, the ones that need to be changed in the .hal file]
IO Connections for P3[DB25]
DB25 GPIO MY.HAL
Pin# I/O                 Pri. func    Sec. func       Chan     Pin func        Pin Dir
 1      0   Spindle     IOPort       PWMGen          0        PWM             (Out)
 2      2   Xstep        IOPort       StepGen          0        Step            (Out)
 3      4   Xdir           IOPort       StepGen          0        Dir             (Out)
 4      6   Ystep        IOPort       StepGen          1        Step            (Out)
 5      8   Ydir           IOPort       StepGen          1        Dir             (Out)
 6      9   Zstep        IOPort       StepGen          2        Step            (Out)
 7     10   Zdir          IOPort       StepGen          2        Dir             (Out)
 8     11   Astep       IOPort       StepGen          3        Step            (Out)
 9     12   Adir          IOPort       StepGen          3        Dir             (Out)
10     13  N/A          IOPort       None
11     14  Probe-in                  IOPort       QCount           0        Quad-A          (In) [EDIT: example follows]
12     15  Both-home-X-in      IOPort       QCount           0        Quad-B          (In)
13     16  Both-home-Y-in       IOPort       QCount           0        Quad-IDX        (In)
14      1   N/A                         IOPort       None
15      3   Both-home-Z-in      IOPort       None
16      5   N/A                         IOPort       StepGen          8        Step            (Out)
17      7   Spindle-enable-out IOPort       StepGen          8        Dir             (Out)

[EDIT: one example: DB-25 pin11, I want to be "probe-in".  I find it referenced in the .hal as:

net probe-in     <=  hm2_5i25.0.gpio.003.in
I edit it, using the GPIO# corresponding to the DB25 pin# I want to see it on, 014 from the table:
net probe-in     <=  hm2_5i25.0.gpio.014.in
Simple.]

Thank you very much for your patience in helping me, even as I mis-read and mis-interpreted and mis-understood, and now state the obvious, to veterans. I have to say that there are enough curve-balls in the process that it's understandable to me that a bush-leaguer's likely to strikeout the first several times at the plate in the majors. (I'll characterize my case perhaps as an intentional walk after a few beanballs that sent me out or the game to recover.)

[EDIT: That goes double for me.]
Last edit: 4 years 1 month ago by clunc. Reason: Correct. Clarify for following readers.
The following user(s) said Thank You: tommylight

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