7i96E + 7i85S + AC Servo - encoder feedback

mesaflash --device 7i96 --readhmid Configuration Name: HOSTMOT2 General configuration information: BoardName : MESA7I96 FPGA Size: 9 KGates FPGA Pins: 144 Number of IO Ports: 3 Width of one I/O port: 17 Clock Low frequency: 100.0000 MHz Clock High frequency: 200.0000 MHz IDROM Type: 3 Instance Stride 0: 4 Instance Stride 1: 64 Register Stride 0: 256 Register Stride 1: 256 Modules in configuration: Module: DPLL There are 1 of DPLL in configuration Version: 0 Registers: 7 BaseAddress: 7000 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: WatchDog There are 1 of WatchDog in configuration Version: 0 Registers: 3 BaseAddress: 0C00 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: IOPort There are 3 of IOPort in configuration Version: 0 Registers: 5 BaseAddress: 1000 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: StepGen There are 8 of StepGen in configuration Version: 2 Registers: 10 BaseAddress: 2000 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: MuxedQCount There are 6 of MuxedQCount in configuration Version: 3 Registers: 5 BaseAddress: 3600 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: MuxedQCountSel There are 1 of MuxedQCountSel in configuration Version: 0 Registers: 0 BaseAddress: 0000 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: SSerial There are 1 of SSerial in configuration Version: 0 Registers: 6 BaseAddress: 5B00 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 64 bytes Module: SSR There are 1 of SSR in configuration Version: 0 Registers: 2 BaseAddress: 7D00 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: LED There are 1 of LED in configuration Version: 0 Registers: 1 BaseAddress: 0200 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Configuration pin-out: IO Connections for TB3 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 0 IOPort None 14 1 IOPort None 2 2 IOPort None 15 3 IOPort None 3 4 IOPort None 16 5 IOPort None 4 6 IOPort None 17 7 IOPort None 5 8 IOPort None 6 9 IOPort None 7 10 IOPort None 8 11 IOPort SSR 0 Out-00 (Out) 9 12 IOPort SSR 0 Out-01 (Out) 10 13 IOPort SSR 0 Out-02 (Out) 11 14 IOPort SSR 0 Out-03 (Out) 12 15 IOPort SSR 0 Out-04 (Out) 13 16 IOPort SSR 0 Out-05 (Out) IO Connections for TB1/TB2 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 17 IOPort StepGen 0 Step/Table1 (Out) 14 18 IOPort StepGen 0 Dir/Table2 (Out) 2 19 IOPort StepGen 1 Step/Table1 (Out) 15 20 IOPort StepGen 1 Dir/Table2 (Out) 3 21 IOPort StepGen 2 Step/Table1 (Out) 16 22 IOPort StepGen 2 Dir/Table2 (Out) 4 23 IOPort StepGen 3 Step/Table1 (Out) 17 24 IOPort StepGen 3 Dir/Table2 (Out) 5 25 IOPort StepGen 4 Step/Table1 (Out) 6 26 IOPort StepGen 4 Dir/Table2 (Out) 7 27 IOPort MuxedQCount 0 MuxQ-IDX (In) 8 28 IOPort MuxedQCount 0 MuxQ-B (In) 9 29 IOPort MuxedQCount 0 MuxQ-A (In) 10 30 IOPort SSerial 0 RXData0 (In) 11 31 IOPort SSerial 0 TXData0 (Out) 12 32 IOPort SSerial 0 TXEn0 (Out) 13 33 IOPort SSR 0 AC Ref (Out) IO Connections for P1 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 34 IOPort SSerial 0 RXData1 (In) 14 35 IOPort SSerial 0 TXData1 (Out) 2 36 IOPort None 15 37 IOPort None 3 38 IOPort StepGen 7 Step/Table1 (Out) 16 39 IOPort StepGen 7 Dir/Table2 (Out) 4 40 IOPort StepGen 6 Step/Table1 (Out) 17 41 IOPort StepGen 6 Dir/Table2 (Out) 5 42 IOPort StepGen 5 Step/Table1 (Out) 6 43 IOPort StepGen 5 Dir/Table2 (Out) 7 44 IOPort MuxedQCountSel 2 MuxSel0 (Out) 8 45 IOPort MuxedQCount 1 MuxQ-A (In) 9 46 IOPort MuxedQCount 1 MuxQ-B (In) 10 47 IOPort MuxedQCount 1 MuxQ-IDX (In) 11 48 IOPort MuxedQCount 2 MuxQ-A (In) 12 49 IOPort MuxedQCount 2 MuxQ-B (In) 13 50 IOPort MuxedQCount 2 MuxQ-IDX (In)